Semiconductor Storage Word Line Level Fixing Circuit
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Solution Overview
Problem
The existing power-on sequence rules for semiconductor storage devices, which require the peripheral circuit supply voltage to be turned on before the memory array supply voltage, can lead to issues like through-current and malfunction if not followed, imposing design burdens on circuit designers.
Innovation Solution
A semiconductor storage device with separate power supplies for memory cells and peripheral circuits, featuring a word line level fixing circuit that sets word lines to a fixed level upon memory cell power supply activation, independent of the peripheral circuit power supply status, preventing through-current and ensuring stable operation regardless of power-on sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a power-on sequence rule is established to prevent through-current and malfunction, then reliability is improved, but device complexity increases due to design constraints
Solution Approach 1:
The word line level fixing circuit is activated in advance upon detection of memory cell power supply turn-on, before the peripheral circuit power supply is turned on. This preliminary action fixes the word lines to a predetermined level, preventing through-current and malfunction that would otherwise occur due to improper power-on sequencing.
Solution Approach 2:
The word line level fixing circuit acts as an intermediary mechanism between the memory cell power supply and the peripheral circuit power supply. It mediates the power-on sequence by controlling the word line levels during the transition period, ensuring safe operation regardless of the actual power-on order.
2Use of energy by moving object
If separate power supplies are used for memory cells and peripheral circuits to reduce standby current, then energy efficiency is improved, but reliability deteriorates due to power-on sequence constraints
Solution Approach 1:
The word line level fixing circuit automatically detects the turn-on state of the memory cell power supply and activates itself without external control. It self-regulates the word line levels based on the power supply status, eliminating the need for external sequencing control and ensuring reliable operation with separate power supplies.
Solution Approach 2:
The level fixing control circuit monitors the power supply voltage level and provides feedback control to the level fixing transistors. When the memory cell power supply is turned on, the feedback mechanism detects this change and automatically adjusts the word line levels accordingly, ensuring stable operation regardless of power-on sequence.
Data Source
AI summary
The disclosed invention provides a semiconductor storage device that creates no trouble, independently of power-on sequence. A semiconductor storage device includes a first power supply for the memory cells, a second power supply which is turned on independently of the first power supply and provided for a peripheral circuit which is electrically coupled to the memory cells, and a word line level fixing circuit for fixing the level of the word lines, which operates in accordance with turn-on of the first power supply. The word line level fixing circuit includes multiple level fixing transistors which are provided to correspond respectively to the word lines and provided between one of the word lines and a fixed potential and a level fixing control circuit which controls the level fixing transistors in accordance with input of a signal responding to turn-on of the second power supply.