Buried Word Line Insulating Trenches for Dense DRAM Isolation
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Solution Overview
Problem
Current semiconductor memory devices with buried gate structures face challenges in manufacturing and performance due to reduced size and increased integration density, requiring improved structural design and manufacturing methods to enhance electrical isolation and reliability.
Innovation Solution
The implementation of an insulating structure with its bottom surface extending into the gate cap layer of a word line, forming insulating trenches and structures between bit lines to enhance electrical isolation and prevent leakage current between storage contacts of capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the size of DRAM unit is reduced and integration density is increased, then the miniaturization requirement is met, but the electrical isolation between storage contacts deteriorates and leakage current occurs
Solution Approach 1:
The insulating structure extends in the vertical dimension by penetrating through the gate cap layer into the gate electrode layer, creating a three-dimensional isolation path. This vertical extension into multiple layers provides enhanced electrical isolation between adjacent storage contacts while maintaining horizontal miniaturization of the DRAM unit cell.
Solution Approach 2:
The insulating structure acts as an intermediary element positioned between adjacent storage contacts and bit lines. By introducing this intermediate insulating layer that extends through the gate cap layer, electrical isolation is achieved without directly modifying the storage contacts or bit lines themselves.
2Ease of manufacture
If conventional insulating structures are used between bit lines, then the fabrication process is simple, but the electrical isolation effect is insufficient to prevent leakage current
Solution Approach 1:
The insulating structure is formed preliminarily during the gate electrode formation process, extending through the gate cap layer before subsequent processing steps. This preliminary formation of the insulating structure ensures that isolation is established early in the fabrication sequence, preventing leakage current from developing in later stages.
Data Source
AI summary
A semiconductor memory device includes a substrate, at least one word line, a plurality of bit lines and a plurality of insulating structures. The word line is disposed in the substrate, extends along a first direction, and includes a gate cap layer. The bit lines are disposed on the substrate and respectively extend along a second direction. The bit line crosses the word line, and includes a conductive layer. The insulating structures are disposed on the word line and respectively disposed between the bit lines. The bottom surface of the insulating structure is located in the gate cap layer. The area of the top surface of the insulating structure is larger than the area of the bottom surface of the insulating structure.