Word Line Voltage Control for Low-Power SPI Flash Sensing
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Solution Overview
Problem
The high memory cell current in SPI flash memory devices leads to increased power consumption, which is a disadvantage in the trend towards low energy consumption, especially when the serial clock frequency increases, requiring faster sensing rates that are not efficiently managed by existing technologies.
Innovation Solution
A memory device with a frequency-to-voltage converter that adjusts the word line voltage based on the clock signal frequency, allowing for reduced voltage and current consumption during low-frequency operations, thereby synchronizing detection speed with clock frequency while minimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the voltage of the word line is increased to increase the memory cell current and improve the detection speed of the sense amplifier, then the detection speed is improved, but the total current consumption of the memory increases
Solution Approach 1:
The patent implements dynamic adjustment of the word line voltage based on the serial clock frequency. The frequency-to-voltage converter continuously adapts the voltage level to match the current operating frequency, making the system's electrical characteristics dynamic rather than static. This resolves the contradiction by allowing the system to operate at high voltage (and thus high speed) only when necessary (high frequency mode), and at low voltage (low power) during low frequency operations.
Solution Approach 2:
The patent changes the voltage parameter of the word line based on the clock frequency parameter. By using a frequency-to-voltage converter, the system transforms the frequency parameter into a corresponding voltage parameter, enabling the memory cell current and detection speed to be optimized for each frequency point while minimizing power consumption when high speed is not required.
2Productivity
If the sensing rate of the sense amplifier is increased to synchronize with higher serial clock frequencies, then the productivity is improved, but the memory cell current must be increased which leads to higher power consumption
Solution Approach 1:
The sensing rate is made dynamic by coupling it to the serial clock frequency through the frequency-to-voltage converter. The system automatically adjusts the word line voltage to provide the appropriate memory cell current for the current sensing rate requirement, ensuring high productivity only when high clock frequencies are used, while conserving power during low frequency operations.
3Speed
If the voltage of the word line is continuously kept high to ensure fast detection speed, then the detection speed is maintained, but the power consumption increases even during low frequency operations
Solution Approach 1:
The system employs periodic adjustment of the word line voltage that corresponds to the periodic nature of the serial clock signal. The frequency-to-voltage converter ensures that high voltage is applied only during the periods when high-frequency data transmission is occurring, and low voltage is applied during low-frequency periods, eliminating energy waste while maintaining detection speed when needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption by adjusting word line voltage in response to clock signal frequency, enhancing detection speed during high-frequency operations while conserving energy during low-frequency operations, thus optimizing power management in SPI flash memory devices.
Implementation Method 1
The frequency-to-voltage converter receives a clock signal and correspondingly outputs different voltages to the word line in accordance with the frequency of the clock signal
Data Source
AI summary
A memory device includes a memory array and a frequency-to-voltage converter. The memory array includes a plurality of memory cells arranged in rows and columns, and gates of the memory cells in the same row are coupled to each other and connected to a word line. The frequency-to-voltage converter coupled between the word line and a clock signal source outside the memory device receives a clock signal, and correspondingly outputs different voltages to the word line in accordance with the frequency of the clock signal.