Integrated Wordline Driver With Level Shifting for Leakage Cutoff
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Solution Overview
Problem
Conventional memory circuits with power-gated power supplies suffer from constant power leakage due to limited cut-off capability of power-gated transistors, affecting wordline rise time and requiring improved wordline driver designs.
Innovation Solution
The implementation of high-speed wordline drivers with integrated level shifters and programmable power cut-off capabilities to reduce DC current leakage, enabling low voltage designs for on-chip applications and improving level-shifting range without impacting wordline clock rise or fall timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power-gated transistors are used to reduce power consumption, then power saving is improved, but DC current leakage increases due to limited cut-off capability
Solution Approach 1:
The power supply is divided into multiple independently controllable voltage domains (first voltage domain and second voltage domain) with separate power-gated transistors. This segmentation allows selective power gating to specific regions, improving the ability to cut off DC current leakage paths while maintaining power saving benefits in active regions.
Solution Approach 2:
Level shifter circuitry is introduced as an intermediary between the first voltage domain and the second voltage domain. The level shifter includes transfer transistors that can be controlled to isolate voltage domains, preventing DC current leakage while enabling controlled power distribution. This intermediary structure resolves the contradiction by providing precise control over power flow between domains.
2Adaptability or versatility
If level shifters are integrated into wordline drivers, then level-shifting range is extended, but device complexity increases
Solution Approach 1:
The level shifter circuitry is merged with the wordline driver circuitry to form an integrated high-speed wordline driver. The transfer transistors are combined with the driver transistors, sharing common circuit elements and control logic. This merging extends the level-shifting range while minimizing the increase in device complexity through efficient resource sharing.
Solution Approach 2:
The integrated wordline driver is designed to operate in multiple voltage domains and support both level-shifting and direct driving modes. The same circuit structure handles both functions by controlling the state of transfer transistors, providing multi-functionality without requiring separate dedicated circuits for each mode, thus limiting complexity growth.
Data Source
AI summary
Various implementations described herein are related to a device with a wordline driver that provides a wordline signal to a wordline based on a row selection signal and a row clock signal. The device may have row selector logic that provides the row selection signal to the wordline driver based on first input signals in a periphery voltage domain. The device may also have level shifter circuitry that provides the row clock signal to the wordline driver in a core voltage domain based on second input signals in the periphery voltage domain.


