3D Wrap-Around Gate High Frequency Transistor
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Solution Overview
Problem
Current high frequency transistors with planar gate MOSFET structures, particularly those using Silicon on Insulator (SOI) technology, have limitations in achieving optimal switching characteristics and current capacity for high-frequency applications.
Innovation Solution
The design incorporates a semiconductor layer with specific conductivity regions and a control electrode structure that extends over the semiconductor layer's upper and side surfaces, with insulating films to enhance electrical insulation and current capacity, including a unique arrangement of contact regions and extension regions to improve electron density distribution and transconductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a planar gate MOSFET structure with SOI is used, then high-speed switching characteristics are achieved, but there is room for improvement in overall characteristics
Solution Approach 1:
The control electrode extends not only in the planar direction but also vertically to cover the side surface of the semiconductor layer, transitioning from a 2D planar gate to a 3D wrap-around gate structure. This dimensional extension improves electrical insulation and current capacity without sacrificing switching speed.
Solution Approach 2:
The semiconductor layer is divided into multiple conductivity type regions (first, second, and third regions) with different doping types and concentrations. This segmentation allows optimized electrical characteristics in different areas, improving overall device performance while maintaining high-speed switching.
2Device complexity
If the control electrode covers only the upper surface, then the structure is simple, but electrical insulation and current capacity are limited
Solution Approach 1:
The control electrode extends vertically to cover the side surface of the semiconductor layer in addition to the upper surface. This 3D configuration enhances electrical insulation between the control electrode and underlying structures while increasing current capacity, justified by the performance improvements.
Solution Approach 2:
An insulating film is introduced between the control electrode and the semiconductor layer to provide electrical insulation. This intermediary layer allows the control electrode to extend closer to the channel region without direct contact, enabling improved insulation and current capacity while maintaining structural integrity.
3Ease of manufacture
If the semiconductor layer has uniform conductivity, then manufacturing is simple, but electron density distribution and transconductance are suboptimal
Solution Approach 1:
The semiconductor layer is doped with different conductivity types and concentrations in different regions (first region with first conductivity type, second and third regions with second conductivity type). This local variation in electrical properties optimizes electron density distribution and transconductance in the channel region while remaining manufacturable through standard doping processes.
Data Source
AI summary
A high frequency transistor includes a first semiconductor layer, a first insulating film and a control electrode. The first semiconductor layer on the first insulating film extends in a first direction along an upper surface of the first insulating film. The first semiconductor layer has a first layer thickness in a second direction perpendicular to the upper surface, and a first width in a third direction orthogonal to the first direction. The first width is greater than the first layer thickness. The control electrode covers upper and side surfaces of the first semiconductor layer. The first semiconductor layer includes a first region of a first conductivity type, second and third regions of a second conductivity type. The first to third regions are arranged in the first direction. The first region is provided between the second and third region. The control electrode covers the first region.