Write Amplifier Pull-Up Drivers for DRAM Write Speed

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Solution Overview

Problem

In semiconductor memory devices, particularly DRAM, charging memory lines to high voltages for writing high charge values is slower and more power-consuming due to increased impedance from shared elements, which prolongs write operations.

Innovation Solution

Incorporating additional pull-up drivers in the write amplifier to assist the pull-up/down driver in charging memory lines to appropriate voltages, activating only when high charge values need to be written, thereby reducing charge time and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If additional pull-up drivers are added to assist charging memory lines to high voltages, then the charge time is reduced and write speed is improved, but the device complexity increases

Engineering Contradiction:
Improvewrite operation speedVSAvoidwrite amplifier complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The write amplifier is segmented into multiple independent pull-up drivers (first pull-up driver and second pull-up driver) that can be selectively activated. Each driver handles specific charging tasks for memory lines, allowing parallel operation to reduce overall charge time while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically activates only the necessary pull-up drivers based on the write operation requirements. When writing high charge values requiring high voltages, both pull-up drivers are activated; for other operations, only the pull-up/down driver operates, adapting the device complexity to the actual operational needs

Inventive Principle:
Principle #15Dynamics

2Loss of time

If pull-up drivers are activated to charge memory lines to high voltages, then the write operation time is decreased, but the power consumption increases

Engineering Contradiction:
Improvewrite operation timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The system applies partial action by activating additional pull-up drivers only when absolutely necessary (during high charge value writes requiring high voltages). For standard write operations, only the essential pull-up/down driver is activated, avoiding unnecessary power consumption while maintaining adequate write performance for common cases

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes the voltage parameter dynamically by activating different driver configurations based on the required charge level. When high voltages are needed for high charge values, additional pull-up drivers are engaged; otherwise, the system operates at standard voltage levels with reduced power consumption

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces the time required to charge memory lines to high voltages, enhancing the efficiency and speed of write operations while minimizing power usage during high charge value writes.

Implementation Method 1

charging the capacitive element to a high charge value may require additional time and/or power

Methodology Applied
Scientific EffectElectrical charge: Conduction (electrical)

Data Source

PatentUS10811081B2Apparatuses for decreasing write pull-up time and methods of use
Publication Date: 2020.10.20 MICRON TECHNOLOGY INC
  • US10811081B2 patent drawing
  • US10811081B2 patent drawing
  • US10811081B2 patent drawing

AI summary

Embodiments of the disclosure are drawn to apparatuses and methods for charging memory data lines when a high charge level is to be written to a memory. The apparatus may include a write amplifier that includes one or more additional pull-up drivers for charging the memory data lines. Control logic may control when additional pull-up drivers are activated. Control logic may control when main data lines are coupled to shared data lines. Methods for charging memory data lines may include providing control signals that indicate which main data lines are coupled to shared data lines and when a write command is received. Methods may include providing a signal that is indicative of the data to be written. The control signals and signal indicative of the data to be written may be used to activate one or more pull-up drivers to charge one or more data lines.