Write Driving Circuit Detecting Unit Sharing Design

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Solution Overview

Problem

Conventional semiconductor memory apparatus face challenges in controlling the cell core due to increased storage capacity, leading to space inefficiencies and reduced layout efficiency as the number of write drivers increases with capacity, making it difficult to layout and reducing cell efficiency.

Innovation Solution

A write driving circuit with a detecting-unit-sharing design, where multiple driving units share a detecting unit, reducing the number of driving units required in each memory bank, and optimizing the layout by determining activation based on control signals, allowing for efficient data writing across memory banks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of write drivers is increased to accommodate increased storage capacity, then the storage capacity is improved, but the area occupied by write drivers increases and layout efficiency deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidarea occupied by write drivers
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

Multiple driving units share a common detecting unit, merging detection functionality that would otherwise be duplicated in each write driver. This reduces the total area occupied by write drivers while maintaining the ability to support increased storage capacity across multiple memory banks.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared detecting unit serves multiple driving units simultaneously, making it a universal component that performs detection functions for the entire array of memory banks rather than being dedicated to a single write driver. This multi-functionality reduces redundancy and improves layout efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If the number of write drivers is increased to accommodate increased storage capacity, then the storage capacity is improved, but the layout efficiency deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidlayout efficiency
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

By merging the detecting unit functionality across multiple driving units, the patent reduces the number of discrete components that need to be laid out and connected. This simplification improves layout efficiency and ease of manufacture while still supporting high storage capacity through the multi-bank architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the memory system into multiple banks with shared detection resources, allowing for more flexible and efficient layout arrangements compared to having fully independent write drivers for each bank. This segmentation enables better space utilization and manufacturing efficiency.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If detecting units are shared among multiple driving units, then the area required for write drivers is reduced, but the complexity of control signals increases

Engineering Contradiction:
Improvearea required for write driversVSAvoidcomplexity of control signals
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent introduces control signal lines that act as intermediaries between the shared detecting unit and multiple driving units. These intermediary control lines manage the coordination and timing of operations across the shared architecture, handling the increased complexity of control while enabling area reduction through resource sharing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7804725B2Write driving circuit and semiconductor memory apparatus using the same
Publication Date: 2010.09.28 SK HYNIX INC
  • US7804725B2 patent drawing
  • US7804725B2 patent drawing
  • US7804725B2 patent drawing

AI summary

A write driving circuit includes a plurality of driving units that write data corresponding to detection signals on memory banks, and at least one detecting unit that detects data input from the outside, and outputs the detection signals to two or more driving units among the plurality of driving units.