WSe2 Negative Transconductance Memory for Stable Multi-Valued States
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Solution Overview
Problem
Existing binary devices face challenges in miniaturization and integration due to increased power consumption and signal delay, and multi-valued devices with stable three or more logical states are difficult to implement with conventional materials due to limited peak-to-valley current ratios.
Innovation Solution
A negative transconductance device is developed using a monolithic WSe2 semiconductor thin film with n-i-p double lateral homojunction structure, achieved through selective surface charge transfer doping with CH3 radicals and Au2Cl6, enabling double negative differential transconductance and stable multi-valued memory operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If binary elements are used for miniaturization and integration, then device size is reduced, but power consumption increases and signal delay occurs
Solution Approach 1:
The patent changes the fundamental operating parameter from binary (0/1) to multi-valued (multiple logical states) to reduce the number of elements required. By implementing a device that can store multiple logical states (e.g., ternary or quaternary), the system achieves higher integration density while reducing power consumption and signal delay compared to binary elements.
Solution Approach 2:
The patent employs a composite structure combining 2D semiconductor materials (such as MoS2, WS2, WSe2) with conventional 3D semiconductor materials (Si, Ge) to create a heterostructure that enables multi-valued memory operation. This composite approach leverages the high surface-area-to-volume ratio and quantum confinement effects of 2D materials while maintaining compatibility with existing semiconductor processing techniques.
2Productivity
If multi-valued device is implemented to reduce number of elements, then integration density is improved, but stable multi-valued operation with three or more logical states is difficult to achieve
Solution Approach 1:
The patent introduces local quality by creating distinct doped regions within the semiconductor structure. Specifically, n-type and p-type doped regions are formed in specific areas of the 2D semiconductor material, creating localized potential wells and barriers that enable stable formation of multiple logical states. This spatial variation in material properties (doping concentration, carrier type) provides the necessary conditions for reliable multi-valued memory operation.
Solution Approach 2:
The patent segments the semiconductor structure into distinct functional regions: n-type doped regions, p-type doped regions, and intrinsic regions. This segmentation creates multiple potential energy wells that can store different logical states. The segmentation is achieved through selective doping processes that create spatially separated regions with different electrical properties, enabling stable multi-valued operation.
3Ease of manufacture
If conventional Si material or 2D semiconductor material is used for negative transconductance device, then device fabrication is simplified, but peak-to-valley current ratio is limited to 1 or low
Solution Approach 1:
The patent changes the doping parameters by introducing both n-type and p-type dopants in specific regions of the 2D semiconductor material. This dual-doping approach creates sharp current peaks and deep valleys in the transfer characteristics, achieving high peak-to-valley current ratios (greater than 10) while maintaining the simplicity of 2D material fabrication processes.
Solution Approach 2:
The patent combines 2D semiconductor materials (MoS2, WS2, WSe2) with doped regions to create a composite structure that leverages the high surface-area-to-volume ratio and quantum confinement effects of 2D materials. This composite approach achieves high peak-to-valley current ratios while maintaining fabrication simplicity through existing 2D material synthesis and doping techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The WSe2-based device achieves higher peak-to-valley current ratios, allowing for stable multi-valued memory operations with three or more logic states, reducing the need for multiple elements and minimizing power consumption and signal delay.
Implementation Method 1
selective surface charge transfer doping
Implementation Method 2
selective surface charge transfer doping
Implementation Method 3
double negative differential transconductance (NDT)
Data Source
AI summary
Disclosed are a negative transconductance device and a multi-valued memory device using the same. The negative transconductance includes a monolithic WSe2 semiconductor thin film; a first doped layer disposed on a first area of the WSe2 semiconductor thin film; a second doped layer disposed on a second area of the WSe2 semiconductor thin film so as to supply holes to the second area, wherein the second area is spaced apart from the first area; a first electrode electrically connected to the first area of the WSe2 semiconductor thin film; a second electrode electrically connected to the second area of the WSe2 semiconductor thin film; and a third electrode for applying a gate voltage to the first area and the second area of the WSe2 semiconductor thin film, and to a third area thereof located between the first and second areas.