XLBIST Clock Selection for Test Coverage
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Solution Overview
Problem
Existing Logic Built In Self-Test (LBIST) systems face limitations in test coverage due to random-resistant faults and unknown input values (Xs), which can mask test results and diminish the effectiveness of test patterns, especially when limited to single or two clock cycles.
Innovation Solution
The implementation of an X-tolerant LBIST (XLBIST) system that allows multiple test system clocks and clock cycles, with selective clock selection and staggering of clock pulses to prevent disturb conditions, enabling increased test observability and coverage across clock domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple test system clocks are provided to the logic during system clock capture cycle, then test coverage and fault detection capability are improved, but the complexity of the LBIST system increases
Solution Approach 1:
The patent segments the clock selection process into multiple categories (primary clocks, secondary clocks, tertiary clocks) based on their usage frequency and disturbance characteristics. This segmentation allows the system to manage multiple clocks in an organized manner, improving test coverage while controlling complexity through structured classification.
Solution Approach 2:
The patent implements dynamic clock selection where the LBIST system automatically adjusts which clocks to use based on real-time monitoring of disturbance conditions and unknown input values. The system adapts its clock selection strategy during testing, optimizing test coverage dynamically while managing system complexity through automated decision-making.
2Measurement precision
If clock pulses are staggered to prevent disturb conditions, then test accuracy is improved, but the time required for testing increases
Solution Approach 1:
The patent applies periodic staggering of clock pulses where clocks are activated in sequential time slots rather than simultaneously. This periodic activation pattern prevents disturb conditions by ensuring only one clock is active at a time, improving test accuracy while the periodic nature allows for efficient time management through structured testing intervals.
Solution Approach 2:
The patent performs preliminary identification and classification of clocks into different categories before the actual testing begins. By pre-determining which clocks are primary, secondary, or tertiary based on their disturbance characteristics, the system prepares a structured testing schedule that prevents disturbs in advance, improving accuracy without significantly increasing testing time through proactive planning.
3Reliability
If clocks with high usage frequency are selected, then test coverage is improved, but the number of unknown inputs and disturbs increases
Solution Approach 1:
The patent assigns different qualities and characteristics to different clocks based on their specific properties and disturbance histories. Primary clocks are selected for high coverage with low disturbance, secondary clocks for moderate coverage with moderate disturbance, and tertiary clocks for supplemental coverage. This local quality differentiation allows the system to optimize test coverage while minimizing harmful unknown inputs by selecting clocks with appropriate local characteristics.
Solution Approach 2:
The patent implements feedback mechanisms where the LBIST system continuously monitors the number of unknown inputs and disturbance conditions associated with each clock during testing. Based on this feedback, the system dynamically adjusts clock selection, favoring clocks with lower disturbance histories and fewer unknown inputs. This feedback-driven approach improves test coverage while actively reducing harmful factors through data-driven decision-making.
Data Source
AI summary
A system and method are provided for testing logic using a logic built in self-test (LBIST) system, and in particular where the LBIST system tolerates unknown inputs (Xs) to the logic cells forming an XLBIST system. The system allows for providing multiple test system clocks from the LBIST system to the logic during a system clock capture cycle of a system clock during testing of the logic, wherein the system clock is separate from the multiple test system clocks of the LBIST system. Further, timing of an application of clock cycles of the multiple test system clocks of the LBIST system is controlled and provided to the logic during the system clock capture cycle.


