Zone-Dependent Pre-Charge Voltage for NAND Flash Vt Window Stability
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Solution Overview
Problem
NAND flash memory experiences Vt window degradation due to elevated upper tails at lower physical word lines, leading to reduced programming efficiency and increased current consumption.
Innovation Solution
Decoupling the programming parameter PROGSRC_PCH into multiple pre-charge voltages based on word line zones, with increased pre-charge voltage applied to word lines WL0-WL20 and reduced voltage applied to higher word lines, to mitigate upper tail erosion and enhance Vt window stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single pre-charge voltage is applied to all word lines, then the device complexity is reduced, but the Vt window degrades due to elevated upper tails at lower physical word lines
Solution Approach 1:
The patent segments the word line array into multiple zones (e.g., first zone including WL0-WL20, second zone including higher word lines) and applies different pre-charge voltages to each zone. This segmentation resolves the contradiction by allowing tailored voltage optimization for each zone while maintaining manageable device complexity through systematic zoning.
Solution Approach 2:
The patent implements local quality by applying different pre-charge voltage levels to different word line zones based on their specific characteristics. Lower word lines receive one pre-charge voltage level while higher word lines receive another, optimizing the Vt window for each local region rather than using a uniform approach.
2Reliability
If increased pre-charge voltage is applied to lower word lines to reduce upper tail erosion, then the Vt window integrity is improved, but the average current consumption increases
Solution Approach 1:
The patent applies local quality by providing increased pre-charge voltage only to lower word lines (first zone) that require it for Vt window integrity, while higher word lines (second zone) receive a reduced pre-charge voltage. This localized approach improves Vt window integrity where needed while minimizing average current consumption across the entire array.
Solution Approach 2:
The patent changes the pre-charge voltage parameter based on word line zone, using different voltage levels (e.g., first CELSRC voltage for lower zones, second CELSRC voltage for higher zones) to optimize both Vt window integrity and current consumption by matching voltage levels to specific zone requirements.
3Reliability
If zone-dependent pre-charge voltages are applied to different word line zones, then the Vt window is enhanced and upper tail erosion is mitigated, but the device complexity increases
Solution Approach 1:
The patent manages the increased device complexity by systematically segmenting word lines into zones with clear boundaries (e.g., WL0-WL20 for first zone, higher word lines for second zone) and assigning specific pre-charge voltages to each zone, making the complex parameter structure manageable and implementable.
4Productivity
If multiple pre-charge voltage levels are used for different word line zones, then the programming efficiency is improved and programming time is reduced, but the ease of operation decreases
Solution Approach 1:
The patent improves programming efficiency through zone-dependent pre-charge voltages while managing operational complexity by establishing clear zone boundaries and systematic voltage assignment rules, making the multi-voltage operation controllable and predictable.
Data Source
AI summary
A memory device that uses different programming parameters base on the word line(s) to be programmed is described. The programming parameter PROGSRC_PCH provides a pre-charge voltage to physical word lines. In some instances, the PROGSRC_PCH voltage is decoupled, and a new PROGSRC_PCH represents an adjusted (e.g., increased) pre-charge voltage for a certain physical word line or word line zone (i.e., predetermined group of word lines). Using different PROGSRC_PCH voltages can limit or prevent Vt distribution window degradation, particularly for relatively low physical word lines. Additionally, the overall programming time and average current consumed can also be reduced.


