ZQ Calibration Circuit for Fast, Precise Memory Termination Matching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional impedance adjusting circuits in semiconductor memory devices face challenges in accurately matching the termination resistance to the target range, leading to inefficiencies and inaccuracies in signal transfer due to limitations in resistance adjustment precision and time requirements for calibration.
Innovation Solution
The proposed impedance adjusting circuit includes a reference range supplying unit, a termination resistance supplying unit, and code generating units that adjust the output resistance within a normal and micro target range using control codes, with a normal shift detecting unit to generate micro target signals for precise resistance adjustments, allowing for efficient and accurate impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional impedance adjusting circuits are used, then the termination resistance can be adjusted, but the resistance adjustment precision is insufficient and calibration time is excessive
Solution Approach 1:
The patent divides the impedance adjustment process into two distinct stages: a first stage with a first adjustment granularity for coarse adjustment, and a second stage with a second adjustment granularity for fine adjustment. This segmentation allows the system to quickly reach near-optimal impedance values in the first stage, then precisely fine-tune in the second stage, thereby improving both adjustment precision and reducing overall calibration time compared to using a single adjustment mechanism.
2Reliability
If the output impedance of the input pad mismatches with the transmission line impedance, then signal transfer efficiency is reduced, but adding complex matching circuits increases device complexity
Solution Approach 1:
The patent implements dynamic impedance adjustment by providing multiple adjustable impedance values for the input pad through a combination of first and second adjustment mechanisms. Instead of using a fixed complex matching circuit, the system dynamically adjusts the impedance to match the transmission line characteristics, improving signal transfer efficiency while keeping the circuit structure relatively simple and flexible.
Data Source
AI summary
An impedance adjusting circuit of semiconductor memory devices is able to adjusting its termination resistance stably. The semiconductor memory device includes a reference range supplying unit for supplying a normal target range corresponding to a ZQ resistance and supplying a micro target range in response to a micro target signal, a termination resistance supplying unit for supplying an output resistance corresponding to a plurality of control codes, a code generating unit for generating the plurality of control codes in order to shift the output resistance within the normal target range and for adjusting the plurality of control codes to shift the output resistance within the micro target range in response to the micro target signal, and a normal shift detecting unit for detecting the output resistance arranged within the normal target range to generate the micro target signal.