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Home»TRIZ Case»Cobalt Gate Fill for Lower Threshold Voltage in Semiconductors

Cobalt Gate Fill for Lower Threshold Voltage in Semiconductors

May 22, 20263 Mins Read
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Cobalt Gate Fill for Lower Threshold Voltage in Semiconductors

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Summary

Problems

As semiconductor integrated circuits scale down, reducing threshold voltage becomes challenging without adversely affecting other transistor aspects, particularly due to difficulties in increasing the thickness of the work function metal layer.

Innovation solutions

A gate structure using a cobalt fill instead of a tungsten fill, formed through a process involving Physical Vapor Deposition, Chemical Vapor Deposition, and Electro-Chemical Plating, with a glue layer for better adhesion, allows for a lower threshold voltage without increasing the work-function metal layer size.

TRIZ Analysis

Specific contradictions:

threshold voltage control
vs
manufacturing complexity

General conflict description:

Reliability
vs
Device complexity
TRIZ inspiration library
35 Parameter changes
Try to solve problems with it

Principle concept:

If the thickness of the work function metal layer is increased to reduce threshold voltage, then the threshold voltage is reduced, but the manufacturing complexity and difficulty increase due to scaling constraints

Why choose this principle:

The patent changes the material parameter from traditional work function metals (titanium nitride, tungsten) to cobalt, which has different physical and chemical properties including lower contact resistance and better adhesion characteristics. This material substitution allows achieving the same electrical function with different structural requirements, resolving the contradiction between threshold voltage control and manufacturing complexity

TRIZ inspiration library
27 Cheap short-living objects (Disposable)
Try to solve problems with it

Principle concept:

If the thickness of the work function metal layer is increased to reduce threshold voltage, then the threshold voltage is reduced, but the manufacturing complexity and difficulty increase due to scaling constraints

Why choose this principle:

The patent employs a multi-layer structure where a thin cobalt layer is deposited and then selectively removed in non-active areas through wet etching. This approach uses a temporary, easily removable material that simplifies the overall manufacturing process by enabling simple wet etch release rather than requiring complex patterning of the work function layer itself

Application Domain

cobalt fill threshold voltage semiconductor scaling

Data Source

Patent US11996328B2 Cobalt fill for gate structures
Publication Date: 28 May 2024 TRIZ 电器元件
FIG 01
US11996328-D00001
FIG 02
US11996328-D00002
FIG 03
US11996328-D00003
Login to view Image

AI summary:

A gate structure using a cobalt fill instead of a tungsten fill, formed through a process involving Physical Vapor Deposition, Chemical Vapor Deposition, and Electro-Chemical Plating, with a glue layer for better adhesion, allows for a lower threshold voltage without increasing the work-function metal layer size.

Abstract

A method for forming a gate structure includes forming a trench within an interlayer dielectric layer (ILD) that is disposed on a semiconductor substrate, the trench exposing a top surface of the semiconductor substrate, forming an interfacial layer at a bottom of the trench, forming a dielectric layer within the trench, forming a work function metal layer on the dielectric layer, forming an in-situ nitride layer on the work function metal layer in the trench, performing a first cobalt deposition process to form a cobalt layer within the trench, performing a second cobalt deposition process to increase a thickness of the cobalt layer within the trench, and performing an electrochemical plating (ECP) process to fill the trench with cobalt.

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    cobalt fill semiconductor scaling threshold voltage
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    Table of Contents
    • Cobalt Gate Fill for Lower Threshold Voltage in Semiconductors
      • Summary
      • TRIZ Analysis
      • Data Source
      • Accelerate from idea to impact
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