Energy analysis attack mitigation method, electronic device, and storage medium

By randomizing the location and number of algorithm interfaces in embedded security products, energy fluctuations are masked, solving the problem of preventing energy analysis attacks in embedded security products and improving security and reliability.

CN115774879BActive Publication Date: 2025-11-28CHINA FINANCIAL CERTIFICATION AUTHORITY
1 Cites 0 Cited by

Patent Information

Application Number
CN202211487488.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-21
Publication Date
2025-11-28
Estimated Expiration
2042-11-21

AI Technical Summary

Technical Problem

Embedded security products lack the ability to defend against power analysis attacks due to the lack of protection in existing processor hardware designs, resulting in high costs and cumbersome operation, requiring the replacement of processor chips and hardware designs.

Method used

By determining the number of interference algorithm interfaces and the target location number based on a random number sequence and a preset length of the algorithm interface list, an index number queue is generated, and the position of the target algorithm interface in the list of interfaces to be run is randomized to mask energy fluctuations and reduce the success rate of energy analysis attacks.

Benefits of technology

It effectively reduces the success rate of power analysis attacks, ensures the security and reliability of embedded security products, and avoids the high cost and complex operation of replacing processor chips.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The application relates to an energy analysis attack mitigation method, an electronic device and a storage medium. The energy analysis attack mitigation method comprises the following steps: determining the number of interference algorithm interfaces and the target position number of a target algorithm interface in a to-be-run algorithm interface list based on a random number sequence and a preset list length of the to-be-run algorithm interface list; determining an index number queue based on the random number sequence, the number of interference algorithm interfaces and a pointer list length of an algorithm interface function list; each algorithm interface in the algorithm interface function list is provided with a corresponding index number; and determining the to-be-run algorithm interface list based on the target position number, the index number queue and the algorithm interface function list. The scheme provided by the application can effectively reduce the success rate of energy analysis attacks and ensure the safety and reliability of embedded security products.
Need to check novelty before this filing date? Find Prior Art