Chaotic system circuit with multipath wide-range offset boosting

Abstract

The invention discloses a chaotic system circuit with multipath wide-range offset boosting, which introduces an offset constant into a three-dimensional chaotic system, and realizes polarity change of a chaotic signal by adjusting the offset constant through the circuit. All variables in the system have offset boosting behaviors, any single-variable polarity change or any multi-variable polarity change can be realized by introducing one or more offset constants, and the offset constants have a great value range, so that a chaotic signal with a great range of offset can be generated; and great convenience is provided for chaotic signal engineering application.

Description

Technical Field

[0001] The invention belongs to the technical field of chaotic signal application, and in particular relates to a chaotic system circuit with multi-channel large-range offset boosting. Background Art

[0002] In engineering applications, signals of different polarities are often used, such as bipolar signals, positive polarity signals, and negative polarity signals. Chaotic signals in ordinary chaotic systems are generally bipolar or unipolar. It is difficult to change the polarity of chaotic signals by changing parameters or initial values, which causes inconvenience to the use of signals in engineering. Some systems can achieve the offset of a certain variable of the system by changing the system parameters. This operation requires changing the resistance value in the circuit, which is inconvenient to operate and inflexible to implement. By introducing an offset constant in the system, the system attractor can be easily moved in a certain direction, thereby realizing the transformation of a bipolar signal to a positive or negative polarity signal, which facilitates the engineering application of chaotic signals. At present, the offset boost in chaotic systems only involves a single or a few variables in the system, and the offset boost range is small, and there is a lack of multi-channel large-range offset boost systems. Summary of the invention

[0003] In order to solve the above technical problems, the present invention proposes a chaotic system circuit with multi-channel large-range offset boosting, so as to solve the problem that the offset boosting in the current chaotic system only involves a single or a few variables in the system, the offset boosting range is small, and there is a lack of a multi-channel large-range offset boosting system.

[0004] To achieve the above object, the present invention provides a chaotic system circuit with multi-channel large-range offset boosting, the chaotic system circuit comprising a first channel, a second channel and a third channel;

[0005] The first channel controls a first offset constant in the chaotic system based on a mechanical switch and a DC voltage source;

[0006] The second channel controls a second offset constant in the chaotic system based on a mechanical switch and a DC voltage source;

[0007] The third channel controls a third offset constant in the chaotic system based on a mechanical switch and a DC voltage source.

[0008] Preferably, the state equation of the chaotic system is:

[0009]

[0010] Wherein, x, y, z represent system variables, a, b, c, d, α represent system parameters, n represents the first offset constant, m represents the second offset constant, and p represents the third offset constant.

[0011] Preferably, one end of the first resistor in the first channel is connected to the inverting input terminal of the first operational amplifier, the other end of the first resistor is connected to the output terminal of the third operational amplifier, one end of the second resistor is connected to the inverting input terminal of the first operational amplifier, the other end of the second resistor is connected to the inverting input terminal of the fifth operational amplifier, one end of the third resistor is connected to the inverting input terminal of the first operational amplifier, the other end of the third resistor is connected to the output terminal of the first multiplier, two inputs of the first multiplier are respectively connected to the output terminals of the third operational amplifier and the fifth operational amplifier, one end of the first capacitor is connected to the inverting input terminal of the first operational amplifier, the other end of the first capacitor is connected to the output terminal of the first operational amplifier, and one end of the fourth resistor is connected to the inverting input terminal of the first operational amplifier. The first operational amplifier is connected to the output end of the first operational amplifier, the other end of the fourth resistor is connected to the inverting input end of the second operational amplifier, one end of the fifth resistor is connected to the inverting input end of the second operational amplifier, the other end of the fifth resistor is connected to the output end of the second operational amplifier, one end of the first mechanical switch is connected to the inverting input end of the second operational amplifier, the other end of the first mechanical switch is connected to one end of the sixth resistor, the other end of the sixth resistor is connected to the positive electrode of the first offset voltage, the negative electrode of the first offset voltage is grounded, one end of the seventh resistor is connected to the output end of the second operational amplifier, the other end of the seventh resistor is connected to the inverting input end of the third operational amplifier, one end of the eighth resistor is connected to the inverting input end of the third operational amplifier, and the other end of the eighth resistor is connected to the output end of the third operational amplifier.

[0012] Preferably, one end of a ninth resistor in the second channel is connected to the output end of the third operational amplifier, the other end of the ninth resistor is connected to the inverting input end of the fourth operational amplifier, one end of a tenth resistor is connected to the output end of the fifth operational amplifier, the other end of the tenth resistor is connected to the inverting input end of the fourth operational amplifier, one end of an eleventh resistor is connected to the inverting input end of the fourth operational amplifier, the other end of the eleventh resistor is connected to the output end of the second multiplier, two input ends of the second multiplier are respectively connected to the output end of the third operational amplifier and the output end of the eighth operational amplifier, one end of a second capacitor is connected to the inverting input end of the fourth operational amplifier, the other end of the second capacitor is connected to the output end of the fourth operational amplifier, one end of a twelfth resistor is connected to the output end of the fourth operational amplifier, the other end of the twelfth resistor is connected to the inverting input end of the fifth operational amplifier, one end of a thirteenth resistor is connected to the inverting input end of the fifth operational amplifier, the other end of the thirteenth resistor is connected to the output end of the fifth operational amplifier, one end of a second mechanical switch is connected to the inverting input end of the fifth operational amplifier, the other end of the second mechanical switch is connected to one end of a fourteenth resistor, the other end of the fourteenth resistor is connected to the positive electrode of the second offset voltage, and the negative electrode of the second offset voltage is grounded.

[0013] Preferably, in the third channel, one end of a fifteenth resistor is connected to the output end of the first multiplier, the other end of the fifteenth resistor is connected to the inverting input end of the sixth operational amplifier, one end of a sixteenth resistor is connected to the output end of the eighth operational amplifier, the other end of the sixteenth resistor is connected to the inverting input end of the sixth operational amplifier, one end of a third capacitor is connected to the inverting input end of the sixth operational amplifier, the other end of the third capacitor is connected to the output end of the sixth operational amplifier, one end of a seventeenth resistor is connected to the output end of the sixth operational amplifier, the other end of the seventeenth resistor is connected to the inverting input end of the seventh operational amplifier, one end of an eighteenth resistor is connected to the inverting input end of the seventh operational amplifier, the other end of the eighteenth resistor is connected to the output end of the seventh operational amplifier, one end of a third mechanical switch is connected to the inverting input end of the seventh operational amplifier, the other end of the third mechanical switch is connected to one end of a nineteenth resistor, the other end of the nineteenth resistor is connected to the positive electrode of the third offset voltage, and the negative electrode of the third offset voltage is grounded, one end of a twentieth resistor is connected to the output end of the seventh operational amplifier, the other end of the twentieth resistor is connected to the inverting input end of the eighth operational amplifier, one end of a twenty-first resistor is connected to the inverting input end of the eighth operational amplifier, and the other end of the twenty-first resistor is connected to the output end of the eighth operational amplifier.

[0014] Compared with the prior art, the present invention has the following advantages and technical effects:

[0015] The present invention discloses a chaotic system circuit with multi-channel large-range offset boosting, the chaotic system circuit includes a first channel, a second channel and a third channel; the first channel controls the first offset constant in the chaotic system based on a mechanical switch and a DC voltage source; the second channel controls the second offset constant in the chaotic system based on a mechanical switch and a DC voltage source; the third channel controls the third offset constant in the chaotic system based on a mechanical switch and a DC voltage source. The present invention introduces an offset constant in a three-dimensional chaotic system, and realizes the polarity change of a chaotic signal by adjusting the offset constant through a circuit. All variables in the system have an offset boosting behavior, and any single variable polarity change or any multivariable polarity change can be realized by introducing a single or multiple offset constants, and the offset constants have a very large value range, which provides great convenience for the application of chaotic signal engineering. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 A system offset boost control circuit diagram according to an embodiment of the present invention;

[0018] Figure 2 A schematic diagram of a system offset boost phenomenon caused by a first voltage constant according to an embodiment of the present invention;

[0019] Figure 3 A schematic diagram of a system offset boost phenomenon caused by a second voltage constant according to an embodiment of the present invention;

[0020] Figure 4 A schematic diagram of a system offset boost phenomenon caused by a third voltage constant according to an embodiment of the present invention;

[0021] Figure 5 It is a schematic diagram of the coexistence phenomenon of the first voltage constant and the second voltage constant causing the system to offset and boost in the x and y directions according to an embodiment of the present invention;

[0022] Figure 6 It is a schematic diagram of the coexistence phenomenon of the first voltage constant and the third voltage constant causing the system to offset and boost in the x and z directions according to an embodiment of the present invention;

[0023] Figure 7 It is a schematic diagram of the coexistence phenomenon of the second voltage constant and the third voltage constant causing the system to shift and boost in the y and z directions according to an embodiment of the present invention;

[0024] Figure 8 Schematic diagram of the Lyapunov exponent spectrum and variable mean value of the chaotic system with multi-path offset boosting according to an embodiment of the present invention as the maximum offset constant n changes, wherein (a) is a schematic diagram of the Lyapunov exponent spectrum; (b) is a schematic diagram of the system variable mean value;

[0025] Fig. 9 Schematic diagram of the offset boost phenomenon of the system variable x in an embodiment of the present invention when the maximum offset constant n=1000000000, n=1000000050, wherein (a) is an xz plane phase diagram; (b) is a time domain diagram of the variable x;

[0026] Fig.10 Schematic diagram of the offset boost phenomenon of the system variable x in an embodiment of the present invention when the maximum offset constant n=-1000000000, n=-1000000050, wherein (a) is an xz plane phase diagram; (b) is a time domain diagram of the variable x;

[0027] Among them, R1 is the first resistor; R2 is the second resistor; R3 is the third resistor; R4 is the fourth resistor; R5 is the fifth resistor; R6 is the sixth resistor; R7 is the seventh resistor; R8 is the eighth resistor; R9 is the ninth resistor; R 10 , the tenth resistor; R 11 , eleventh resistor; R 12 , the twelfth resistor; R 13 , Thirteenth resistor; R 14 , the fourteenth resistor; R 15 , the fifteenth resistor; R 16 , sixteenth resistor; R17 , the seventeenth resistor; R 18 , eighteenth resistor; R 19 , nineteenth resistor; R 20 , the 20th resistor; R 21 , the twenty-first resistor; J1, the first mechanical switch; J2, the second mechanical switch; J3, the third mechanical switch; U1A, the first operational amplifier; U2A, the second operational amplifier; U3A, the third operational amplifier; U4A, the fourth operational amplifier; U5A, the fifth operational amplifier; U6A, the sixth operational amplifier; U7A, the seventh operational amplifier; U8A, the eighth operational amplifier; C1, the first capacitor; C2, the second capacitor; C3, the third capacitor; Vx, the first offset voltage; Vy, the second offset voltage; Vz, the third offset voltage; AD1, the first multiplier; AD2, the second multiplier. DETAILED DESCRIPTION

[0028] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0029] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0030] Embodiment 1

[0031] like Figure 1 As shown, in this embodiment, a chaotic system circuit with multi-channel large-range offset boosting is provided, and the chaotic system circuit includes a first channel, a second channel and a third channel;

[0032] The first channel controls a first offset constant in the chaotic system based on a mechanical switch and a DC voltage source;

[0033] The second channel controls a second offset constant in the chaotic system based on a mechanical switch and a DC voltage source;

[0034] The third channel controls a third offset constant in the chaotic system based on a mechanical switch and a DC voltage source.

[0035] Specifically, this embodiment provides a chaotic system circuit with multi-channel large-range offset boosting based on the Lorenz chaotic system, and its main components include: an operational amplifier, a resistor, a capacitor, and a multiplier.

[0036] This embodiment adopts the following technical solutions:

[0037] As the first mathematical and physical model of chaotic system, Lorenz system has become the starting point and cornerstone for people to study chaos theory. The state equation of Lorenz chaotic system is:

[0038]

[0039] The offset boost caused by the constant:

[0040] A new chaotic system is constructed by adding a nonlinear term to the Lorenz chaotic system. The state equation of the system is:

[0041]

[0042] Among them, x, y, z are system variables, a, b, c, d, α are system parameters, when the parameters

[0043] When a=35, b=-7, c=21, d=3, α=0.2 and the initial value is (2, 2, 2), the system equation (2) shows chaos. The corresponding resistance in the circuit is: R1=R2=2.86kΩ, R3=5kΩ;

[0044] R4=R5=R6=R7=R8=R 12 =R 13 =R 14 =R 15 =R 17 =R 18 =R 19 =R 20 =R 21 =1kΩ;

[0045] R9=14.29kΩ,R 10 =4.76kΩ,R 11 =2kΩ,R 16 =33.33kΩ; the capacitor C1=C2=C3=1μF in the circuit, and the initial capacitor voltage is V C1 =V C2 =V C3 =2F, the gain of the first multiplier AD1 and the second multiplier AD2 is 0.1.

[0046] Adding offset constants n, m, and p to the three system variables respectively, the chaotic system equation with multi-path offset boosting is:

[0047]

[0048] The offset constants n, m, and p in the circuit are realized by DC voltage sources Vx, Vy, and Vz respectively, n represents the first offset constant, m represents the second offset constant, and p represents the third offset constant. The mechanical switch controls whether to introduce the offset voltage.

[0049] The DC voltage sources Vx, Vy and Vz in the circuit realize the system offset constant, and the first mechanical switches J1, J2 and J3 respectively control whether the three system variables introduce the offset constant.

[0050] Further, the three channels are composed as follows:

[0051] In the first channel: one end of the first resistor R1 is connected to the inverting input terminal of the first operational amplifier U1A, the other end of the first resistor R1 is connected to the output terminal of the third operational amplifier U3A, one end of the second resistor R2 is connected to the inverting input terminal of the first operational amplifier U1A, the other end of the second resistor R2 is connected to the inverting input terminal of the fifth operational amplifier U5A, one end of the third resistor R3 is connected to the inverting input terminal of the first operational amplifier U1A, the other end of the third resistor R3 is connected to the output terminal of the first multiplier AD1, the two inputs of the first multiplier AD1 are respectively connected to the output terminals of the third operational amplifier U3A and the fifth operational amplifier U5A, one end of the first capacitor C1 is connected to the inverting input terminal of the first operational amplifier U1A, the other end of the first capacitor C1 is connected to the output terminal of the first operational amplifier U1A, one end of the fourth resistor R4 is connected to the output terminal of the first operational amplifier U1A, the other end of the fourth resistor R4 is connected to the output terminal of the second operational amplifier U2A The reverse input terminal is connected, one end of the fifth resistor R5 is connected to the reverse input terminal of the second operational amplifier U2A, and the other end of the fifth resistor R5 is connected to the output terminal of the second operational amplifier U2A. One end of the first mechanical switch J1 is connected to the reverse input terminal of the second operational amplifier U2A, and the other end of the first mechanical switch J1 is connected to one end of the sixth resistor R6. The other end of the sixth resistor R6 is connected to the positive electrode of the first offset voltage Vx, and the negative electrode of the first offset voltage Vx is grounded. One end of the seventh resistor R7 is connected to the output terminal of the second operational amplifier U2A, and the other end of the seventh resistor R7 is connected to the reverse input terminal of the third operational amplifier U3A. One end of the eighth resistor R8 is connected to the reverse input terminal of the third operational amplifier U3A, and the other end of the eighth resistor R8 is connected to the output terminal of the third operational amplifier U3A. The output terminal voltage of the first operational amplifier U1A is x, the output terminal voltage of the second operational amplifier U2A is -(x+Vx), and the output terminal voltage of the third operational amplifier U3A is x+Vx.

[0052] In the second channel: one end of the ninth resistor R9 is connected to the output end of the third operational amplifier U3A, the other end of the ninth resistor R9 is connected to the reverse input end of the fourth operational amplifier U4A, and the tenth resistor R 10 One end is connected to the output end of the fifth operational amplifier U5A, and the tenth resistor R 10 The other end is connected to the inverting input terminal of the fourth operational amplifier U4A. 11 One end is connected to the inverting input end of the fourth operational amplifier U4A, and the eleventh resistor R 11The other end is connected to the output end of the second multiplier AD2, the two input ends of the second multiplier AD2 are respectively connected to the output end of the third operational amplifier U3A and the output end of the eighth operational amplifier U8A, one end of the second capacitor C2 is connected to the reverse input end of the fourth operational amplifier U4A, the other end of the second capacitor C2 is connected to the output end of the fourth operational amplifier U4A, the twelfth resistor R 12 One end is connected to the output end of the fourth operational amplifier U4A, and the twelfth resistor R 12 The other end is connected to the inverting input terminal of the fifth operational amplifier U5A. 13 One end is connected to the inverting input terminal of the fifth operational amplifier U5A, and the thirteenth resistor R 13 The other end is connected to the output end of the fifth operational amplifier U5A, one end of the second mechanical switch J2 is connected to the reverse input end of the fifth operational amplifier U5A, and the other end of the second mechanical switch J2 is connected to the fourteenth resistor R 14 One end is connected to the fourteenth resistor R 14 The other end is connected to the positive electrode of the second offset voltage Vy, the negative electrode of the second offset voltage Vy is grounded, the output voltage of the fourth operational amplifier U4A is y, and the output voltage of the fifth operational amplifier U5A is -(y+Vy).

[0053] In the third channel: the fifteenth resistor R 15 One end is connected to the output end of the first multiplier AD1, and the fifteenth resistor R 15 The other end is connected to the inverting input terminal of the sixth operational amplifier U6A. 16 One end is connected to the output end of the eighth operational amplifier U8A, and the sixteenth resistor R 16 The other end is connected to the reverse input end of the sixth operational amplifier U6A, one end of the third capacitor C3 is connected to the reverse input end of the sixth operational amplifier U6A, the other end of the third capacitor C3 is connected to the output end of the sixth operational amplifier U6A, and the seventeenth resistor R 17 One end is connected to the output end of the sixth operational amplifier U6A, and the seventeenth resistor R 17 The other end is connected to the inverting input terminal of the seventh operational amplifier U7A. 18 One end is connected to the inverting input terminal of the seventh operational amplifier U7A, and the eighteenth resistor R 18 The other end is connected to the output end of the seventh operational amplifier U7A, one end of the third mechanical switch J3 is connected to the reverse input end of the seventh operational amplifier U7A, and the other end of the third mechanical switch J3 is connected to the nineteenth resistor R 19 One end is connected to the nineteenth resistor R 19 The other end is connected to the positive electrode of the third offset voltage Vz, the negative electrode of the third offset voltage Vz is grounded, and the twentieth resistor R 20 One end is connected to the output end of the seventh operational amplifier U7A, and the twentieth resistor R20 The other end is connected to the inverting input terminal of the eighth operational amplifier U8A. 21 One end is connected to the inverting input terminal of the eighth operational amplifier U8A, and the twenty-first resistor R 21 The other end is connected to the output terminal of the eighth operational amplifier U8A, the output terminal voltage of the sixth operational amplifier U6A is z, the output terminal voltage of the seventh operational amplifier U7A is -(z+Vz), and the output terminal voltage of the eighth operational amplifier U8A is z+Vz.

[0054] This embodiment carries out the following simulation experiment:

[0055] Build with Multisim Figure 1 Circuit, first, verify the single variable offset boost caused by a single constant. Disconnect the second mechanical switch J2 of the second channel and the third mechanical switch J3 of the third channel to verify the offset boost behavior of the system single variable x. Disconnect the first mechanical switch J1 in the first channel, start the simulation, and end the simulation after 10 seconds. Close the first mechanical switch J1 in the first channel, set the first offset voltage Vx in the first channel to 5V, start the simulation, and end the simulation after 10 seconds. Set the first offset voltage Vx in the first channel to -5V, start the simulation, and end the simulation after 10 seconds. Combine the three circuit simulation results as shown below: Figure 2 As shown by Figure 2 It can be seen that the system attractor is offset in the x direction under the control of the first offset voltage Vx. Disconnect the first mechanical switch J1 of the first channel and the third mechanical switch J3 of the third channel to verify the offset boosting behavior of the system single variable y. Disconnect the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10 seconds. Close the second mechanical switch J2 in the second channel, set the second offset voltage Vy in the second channel to 5V, start the simulation, and end the simulation after 10 seconds. Set the second offset voltage Vy in the second channel to -5V, start the simulation, and end the simulation after 10 seconds. Combine the three circuit simulation results as shown below: Figure 3 As shown by Figure 3 It can be seen that the system attractor is offset in the y direction under the control of the second offset voltage Vy. Disconnect the first mechanical switch J1 of the first channel and the second mechanical switch J2 of the second channel to verify the offset boosting behavior of the system single variable z. Disconnect the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10 seconds. Close the third mechanical switch J3 in the third channel, set the third offset voltage Vz in the third channel to 5V, start the simulation, and end the simulation after 10 seconds. Set the third offset voltage Vz in the third channel to -5V, start the simulation, and end the simulation after 10 seconds. Combine the three circuit simulation results as shown below: Figure 4 As shown by Figure 4It can be seen that the system attractor is shifted in position in the z direction under the control of the third offset voltage Vz.

[0056] Secondly, verify the multi-variable offset boost caused by the multi-constants. Disconnect the third mechanical switch J3 of the third channel to verify the offset boost behavior of the system variables x and y. Let the first offset voltage Vx in the first channel be -5V, and the second offset voltage Vy in the second channel be -5V, close the first mechanical switch J1 in the first channel and the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, disconnect the first mechanical switch J1 in the first channel, start the simulation, and end the simulation after 10s, close the first mechanical switch J1 in the first channel, disconnect the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, disconnect the first mechanical switch J1 in the first channel, start the simulation, and end the simulation after 10s, let the first offset voltage Vx in the first channel be 5V, and the second offset voltage Vy in the second channel be 5V, close the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, close the first mechanical switch J1 in the first channel, disconnect the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, close the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, and merge the seven circuit simulation results as shown below Figure 5 As shown by Figure 5 It can be seen that the system attractor is offset in the x and y directions under the control of the first offset voltage Vx and the second offset voltage Vy. The second mechanical switch J2 of the second channel is disconnected to verify the offset boosting behavior of the system variables x and z. Let the first offset voltage Vx in the first channel be -5V, and the third offset voltage Vz in the third channel be -5V, close the first mechanical switch J1 in the first channel and the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s of simulation, disconnect the first mechanical switch J1 in the first channel, start the simulation, and end the simulation after 10s of simulation, close the first mechanical switch J1 in the first channel, disconnect the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s of simulation, disconnect the first mechanical switch J1 in the first channel, start the simulation, and end the simulation after 10s of simulation, let the first offset voltage Vx in the first channel be 5V, and the third offset voltage Vz in the third channel be 5V, close the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s of simulation, close the first mechanical switch J1 in the first channel, disconnect the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s of simulation, close the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s of simulation, and merge the seven circuit simulation results as shown below Figure 6 As shown by Figure 6It can be seen that the system attractor is offset in the x and z directions under the control of the first offset voltages Vx and Vz. The first mechanical switch J1 of the first channel is disconnected to verify the offset boosting behavior of the system variables y and z. Let the second offset voltage Vy in the second channel be -5V, and the third offset voltage Vz in the third channel be -5V, close the second mechanical switch J2 in the second channel and the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s, disconnect the second mechanical switch J2 in the second channel, start the simulation, and end the simulation after 10s, close the second mechanical switch J2 in the second channel, disconnect the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s, disconnect the first mechanical switch J12 in the second channel, start the simulation, and end the simulation after 10s, let the second offset voltage Vy in the second channel be 5V, and the third offset voltage Vz in the third channel be 5V, close the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s, close the second mechanical switch J2 in the second channel, disconnect the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s, close the third mechanical switch J3 in the third channel, start the simulation, and end the simulation after 10s, and combine the seven circuit simulation results as shown below Figure 7 As shown by Figure 7 It can be seen that the system attractor is shifted in position in the y and z directions under the control of the second offset voltage Vy and the third offset voltage Vz.

[0057] Extreme Range Deflection Boost:

[0058] In system (3), let the offset constant m=p=0, and explore the constant offset boost of the system for variable x. The offset constant n has a very large range of values. Due to the limitation of MATLAB simulation time, the offset constant n∈(10000,11000) is selected. In the larger range of n, the Lyapunov exponent spectrum of system equation (3) and the average value of system variables are as follows: Figure 8 As shown in the figure, as the offset constant n increases, the system remains in a chaotic state, the average values ​​of system variables y and z remain unchanged, and the average value of variable x decreases linearly. When n continues to increase, the offset boosting behavior still exists, and the system maintains chaotic characteristics. The simulation computer uses an i5-12600kf processor, 32G RAM, Windows 11 operating system, Matlab R2019 simulation tool, and ODE45 algorithm. The maximum offset magnitude range explored is in the range of [-1×10 9 ,1×10 9 ], select n = 1 × 10 9 、n=1.00000005×10 9 The corresponding system phase diagram and time domain diagram are as follows Fig. 9 As shown, select n = -1 × 10 9 、n=-1.00000005×10 9 The corresponding system phase diagram and time domain diagram are as follows Fig.10 As shown, MATLAB simulation proves that the system variable x also has an offset boost behavior under the control of a larger offset constant. Therefore, the variable x in the system equation (2) has a large offset boost range. In the same way, it can be proved that the y and z variables in the system equation (2) also have a large offset boost range.

[0059] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A chaotic system circuit with multi-channel large-range offset boosting, characterized in that: The chaotic system circuit includes a first channel, a second channel and a third channel; The first channel controls a first offset constant in the chaotic system based on a mechanical switch and a DC voltage source; The second channel controls a second offset constant in the chaotic system based on a mechanical switch and a DC voltage source; The third channel controls a third offset constant in the chaotic system based on a mechanical switch and a DC voltage source.

2. The chaotic system circuit with multi-channel large-range offset boosting according to claim 1, characterized in that: The state equation of the chaotic system is: Where x, y, and z represent system variables; a, b, c, d, and α represent system parameters; n represents the first offset constant; m represents the second offset constant; and p represents the third offset constant.

3. The chaotic system circuit with multi-channel large-range offset boosting according to claim 1, characterized in that: One end of the first resistor in the first channel is connected to the inverting input terminal of the first operational amplifier, the other end of the first resistor is connected to the output terminal of the third operational amplifier, one end of the second resistor is connected to the inverting input terminal of the first operational amplifier, the other end of the second resistor is connected to the inverting input terminal of the fifth operational amplifier, one end of the third resistor is connected to the inverting input terminal of the first operational amplifier, the other end of the third resistor is connected to the output terminal of the first multiplier, two inputs of the first multiplier are connected to the output terminals of the third operational amplifier and the fifth operational amplifier respectively, one end of the first capacitor is connected to the inverting input terminal of the first operational amplifier, the other end of the first capacitor is connected to the output terminal of the first operational amplifier, and one end of the fourth resistor is connected to the inverting input terminal of the first operational amplifier. The first operational amplifier is connected to the output terminal of the second operational amplifier, the other end of the fourth resistor is connected to the inverting input terminal of the second operational amplifier, one end of the fifth resistor is connected to the inverting input terminal of the second operational amplifier, the other end of the fifth resistor is connected to the output terminal of the second operational amplifier, one end of the first mechanical switch is connected to the inverting input terminal of the second operational amplifier, the other end of the first mechanical switch is connected to one end of the sixth resistor, the other end of the sixth resistor is connected to the positive electrode of the first offset voltage, and the negative electrode of the first offset voltage is grounded, one end of the seventh resistor is connected to the output terminal of the second operational amplifier, the other end of the seventh resistor is connected to the inverting input terminal of the third operational amplifier, one end of the eighth resistor is connected to the inverting input terminal of the third operational amplifier, and the other end of the eighth resistor is connected to the output terminal of the third operational amplifier.

4. The chaotic system circuit with multi-channel large-range offset boosting according to claim 1, characterized in that: In the second channel, one end of a ninth resistor is connected to the output of the third operational amplifier, and the other end of the ninth resistor is connected to the inverting input of the fourth operational amplifier. One end of a tenth resistor is connected to the output of the fifth operational amplifier, and the other end of the tenth resistor is connected to the inverting input of the fourth operational amplifier. One end of an eleventh resistor is connected to the inverting input of the fourth operational amplifier, and the other end of the eleventh resistor is connected to the output of the second multiplier. Two inputs of the second multiplier are connected to the output of the third operational amplifier and the output of the eighth operational amplifier, respectively. One end of a second capacitor is connected to the inverting input of the fourth operational amplifier, and the other end of the second capacitor is connected to the output of the fourth operational amplifier. One end of a twelfth resistor is connected to the output of the fourth operational amplifier, and the other end of the twelfth resistor is connected to the inverting input of the fifth operational amplifier. One end of a thirteenth resistor is connected to the inverting input of the fifth operational amplifier, and the other end of the thirteenth resistor is connected to the output of the fifth operational amplifier. One end of a second mechanical switch is connected to the inverting input of the fifth operational amplifier, and the other end of the second mechanical switch is connected to one end of a fourteenth resistor. The other end of the fourteenth resistor is connected to the positive electrode of the second offset voltage, and the negative electrode of the second offset voltage is grounded.

5. The chaotic system circuit with multi-channel large-range offset boosting according to claim 1, characterized in that: In the third channel, one end of a fifteenth resistor is connected to the output terminal of the first multiplier, and the other end of the fifteenth resistor is connected to the inverting input terminal of the sixth operational amplifier. One end of a sixteenth resistor is connected to the output terminal of the eighth operational amplifier, and the other end of the sixteenth resistor is connected to the inverting input terminal of the sixth operational amplifier. One end of a third capacitor is connected to the inverting input terminal of the sixth operational amplifier, and the other end of the third capacitor is connected to the output terminal of the sixth operational amplifier. One end of a seventeenth resistor is connected to the output terminal of the sixth operational amplifier, and the other end of the seventeenth resistor is connected to the inverting input terminal of the seventh operational amplifier. One end of an eighteenth resistor is connected to the inverting input terminal of the seventh operational amplifier, and the other end of the eighteenth resistor is connected to the output terminal of the seventh operational amplifier. One end of a third mechanical switch is connected to the inverting input terminal of the seventh operational amplifier, and the other end of the third mechanical switch is connected to one end of a nineteenth resistor. The other end of the nineteenth resistor is connected to the positive electrode of the third offset voltage, and the negative electrode of the third offset voltage is grounded. One end of a twentieth resistor is connected to the output terminal of the seventh operational amplifier, and the other end of the twentieth resistor is connected to the inverting input terminal of the eighth operational amplifier. One end of a twenty-first resistor is connected to the inverting input terminal of the eighth operational amplifier, and the other end of the twenty-first resistor is connected to the output terminal of the eighth operational amplifier.

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