A multi-step capacitance sensor readout circuit system and implementation method thereof
By adopting incremental scaling structure, chopper-based sampling noise cancellation technology and self-biased floating inverter amplifiers in the capacitor digital converter, the problem of high energy efficiency, high precision and low latency in real-time systems in the prior art is solved, and an efficient and accurate capacitive sensor readout circuit is realized.
CN119449039BActive Publication Date: 2025-03-18PEKING UNIV
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Patent Information
- Application Number
- CN202510039529.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-10
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2045-01-10
AI Technical Summary
Technical Problem
Existing capacitive digital converters are difficult to achieve high-efficiency, high-precision, and low-latency readout circuits in real-time systems such as robots and drones.
Method used
An incremental scaling capacitor-digital converter is adopted, combining chopper-based sampling noise cancellation technology and self-biased floating inverter amplifier as the first stage integrator to reduce the impact of sampling noise and integrator noise.
Benefits of technology
It realizes a capacitive sensor readout circuit with high energy efficiency, high accuracy and low measurement time, which is suitable for real-time application scenarios and avoids the problems of increasing power consumption and prolonging measurement time in traditional technologies.
✦ Generated by Eureka AI based on patent content.
Abstract
The present invention discloses a multi-step capacitance sensor readout circuit and its implementation method, improves the incremental scaling capacitance sensor readout circuit; designs an improved chopping sampling method, does not introduce additional hardware overhead, makes full use of the working timing of the CDC, eliminates the sampling noise together with the offset and flicker noise of the first-stage integrator, and avoids the problems of increased power consumption and extended measurement time in common methods of multiple sampling average and sampling noise elimination technology. A self-biased floating inverting amplifier is prepared and used as the first-stage integrator, which improves the energy efficiency of the system and avoids the use of a common-mode feedback circuit. The present invention achieves high energy efficiency, high precision, and low latency, and can be widely used in the fields of robots, drones, etc.
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