Wiring congestion optimization method and device, equipment and medium

Abstract

The invention provides a wiring congestion optimization method, apparatus and device, and a medium. The method comprises the steps of performing global layout based on an electrostatic model; performing global simulation wiring based on a layout result and obtaining a congestion graph; traversing each unit at each congestion grid, determining the target expansion amount of the corresponding unit in the horizontal direction and the vertical direction, performing horizontal and vertical expansion on the corresponding unit according to the target expansion amount, and performing global layout again based on the electrostatic model; traversing each unit in the congestion grid, pre-moving the unit for multiple times in the horizontal direction and the vertical direction, calculating the congestion change of all wiring paths corresponding to the unit after each pre-movement, recording the corresponding pre-movement direction and the congestion change when the congestion declines to the maximum extent, and generating a corresponding virtual unit according to the pre-movement direction and the congestion change; and determining the gradient increment of the density gradient of the model based on the Coulomb force generated by the virtual unit, and carrying out gradient adjustment. According to the invention, global and local congestion can be effectively eliminated in a layout stage.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and in particular to a wiring congestion optimization method, device, equipment and medium. Background Art

[0002] Integrated circuit layout refers to determining the specific location of each unit in the chip, which is a key stage in the physical design of very large-scale integrated circuits. Layout physical design that does not consider routing congestion may lead to routing failures in the subsequent device routing stage, which will directly affect the chip design cycle. As the integration of chips continues to increase, the routing resources in physical design are further reduced, which poses new challenges to the time and effect of routing congestion optimization algorithms.

[0003] At present, routing congestion is divided into global congestion and local congestion in the layout stage. The traditional strategy of considering congestion elimination in the layout stage is generally divided into the following directions:

[0004] 1. During the layout process, the white space is dynamically allocated to the congested areas according to the congestion map fed back by the layout design tool. However, the congestion map may be inaccurate during global layout because all cells have not been legalized. Therefore, it is difficult to calculate the required amount of white space based on the inaccurate congestion map.

[0005] 2. Dynamically adjust the cell size during the layout process to eliminate congestion. This method has a huge difference in effect depending on the layout tool used, and this method is only effective for local congestion and it is difficult to solve global congestion.

[0006] 3. First, the routing congestion is predicted in the layout stage based on the fully convolutional network model, and then the model is integrated into the objective function as a penalty term to explicitly optimize routability. However, the use of machine learning methods to predict routing congestion is highly dependent on the accuracy of training data and is accompanied by obvious poor generalization problems. Summary of the invention

[0007] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a routing congestion optimization method, device, equipment and medium to effectively eliminate global and local congestion in the layout stage.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions:

[0009] In a first aspect, the present invention provides a routing congestion optimization method, comprising:

[0010] Perform global layout of each unit to be laid out based on the electrostatic model to obtain an initial layout result;

[0011] Performing global simulation routing based on the initial layout result to obtain a simulation routing result and a congestion graph corresponding to the initial layout result, wherein the congestion graph includes a congestion condition of a congested grid;

[0012] Traversing each cell at each of the congested grids to determine the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction according to the simulation routing result and the congestion graph, and expanding the corresponding cell horizontally and vertically according to the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction, and performing global layout again based on the electrostatic model to obtain an intermediate layout result;

[0013] Each unit in the congested grid corresponding to the intermediate layout result is traversed to make the unit pre-moved multiple times in the horizontal and vertical directions, one grid is pre-moved each time, and the congestion change of all wiring paths corresponding to the unit is calculated after each pre-movement, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively, and then a corresponding virtual unit is generated based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, and the Coulomb force generated by the virtual unit is calculated, and the gradient increment of the density gradient is determined based on the Coulomb force, and then the density gradient of the electrostatic model is adjusted according to the gradient increment, and global layout is performed based on the electrostatic model with gradient adjustment to obtain the target layout result.

[0014] Furthermore, the target expansion amount in the horizontal direction of the corresponding unit is determined according to the following steps:

[0015] Calculate the horizontal path expansion of the corresponding cell CellPathPadding H ;

[0016] Calculate the horizontal grid expansion CellGridPadding of the congested grid occupied by the corresponding cell H ;

[0017] Calculate the target expansion amount of the corresponding cell in the horizontal direction according to the following formula: CellPadding H :

[0018] CellPadding H =log(max(α*CellPathPaddin.g H +β*CellGridPadding H +γ,1))

[0019] Among them, α, β, and γ are given parameters.

[0020] Furthermore, the horizontal path expansion amount CellPathPadding of the corresponding cell is calculated according to the following formula: H :

[0021] CellPathPadding H =Avg p∈Pins (PathPadding p H )

[0022]

[0023] Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p H represents the path expansion amount of pin p in the horizontal direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g;

[0024] The horizontal grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding H :

[0025]

[0026] Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g.

[0027] Furthermore, the target expansion amount in the vertical direction of the corresponding unit is determined according to the following steps:

[0028] Calculate the vertical path expansion CellPathPadding of the corresponding cell V ;

[0029] Calculate the vertical grid expansion CellGridPadding of the congested grid occupied by the corresponding cell V ;

[0030] Calculate the target expansion amount in the vertical direction of the corresponding cell according to the following formula: CellPadding V :

[0031] CellPadding V =log(max(α*CellPathPadding V +β*CellGridPadding V +γ,1))

[0032] Among them, α, β, and γ are given parameters.

[0033] Furthermore, the vertical path expansion amount CellPathPadding of the corresponding cell is calculated according to the following formula: V :

[0034] CellPathPadding V =Avg p∈Pins (PathPadding p V )

[0035]

[0036] Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p V represents the path expansion of pin p in the vertical direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g;

[0037] The vertical grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding V :

[0038]

[0039] Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g.

[0040] Furthermore, after the corresponding unit is pre-moved in the horizontal direction, the process of calculating the congestion change of all routing paths corresponding to the unit is as follows:

[0041]

[0042] NetsPos H =max(NetsPosLeft H ,NetsPosRight H )

[0043]

[0044] in, It indicates the congestion change of a path of the corresponding unit when the unit moves one grid to the left. Indicates the congestion change of a path of the unit when the unit moves one grid to the right, NetsPosLeft H NetsNegLeft represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the left. H Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the left; NetsPosRight H Represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the right, NetsNegRight H It indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the right; NetsPos H Indicates the value of the maximum total congestion reduction when the corresponding unit moves left or right, direction indicates the direction in which the congestion decreases the most when moving left or right, NetsNeg H Indicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

[0045] Furthermore, after the corresponding unit is pre-moved left and right, the congestion change of each path corresponding to the unit is calculated. The process is as follows:

[0046]

[0047] Among them, PinPathOv V It represents the total amount of normalized routing congestion in the vertical direction of all grids that a path path(p) of the cell vertically passes through before pre-movement. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of the grid g; PinPathOv V_leftIndicates that the path path(p) of the unit is translated to the left by one grid unit to obtain the new path path(p) left After that, the new path path(p) left The total amount of normalized routing congestion in the vertical direction of all grids vertically passed through; PinPathOv V_right Indicates that the path path(p) of the unit is translated to the right by one grid unit to obtain the new path path(p) right After that, the new path path(p) right The total amount of normalized routing congestion in the vertical direction across all grids; It indicates the congestion change of path(p) when the unit moves one grid to the left. It indicates the change in congestion of path path(p) when the unit moves one grid to the right.

[0048] Furthermore, after the corresponding unit is pre-moved in the vertical direction, the process of calculating the congestion change of all routing paths corresponding to the unit is as follows:

[0049]

[0050]

[0051] NetsPos V =max(NetsPosUp V ,NetsPosDown V )

[0052]

[0053] in, It represents the congestion change of a path of the corresponding unit when the unit moves up one grid. Indicates the congestion change of a path of the unit when the unit moves down one grid, NetsPosUp V It represents the sum of the decrease in path congestion of all paths when the corresponding unit moves upward, NetsNegUp V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves upward; NetsPosDown V Represents the sum of the path congestion decreases of all paths when the corresponding unit moves downward, NetsNegDown V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves downward; NetsPos V Indicates the value of the maximum total congestion reduction when the corresponding unit moves up and down, and direction indicates the direction in which the congestion decreases the most when moving up and down. NetsNeg HIndicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

[0054] Furthermore, after the corresponding unit is pre-moved, the congestion change of each path corresponding to the unit is calculated. The process is as follows:

[0055]

[0056] Among them, PinPathOv H It represents the total amount of normalized routing congestion in the vertical direction of all grids horizontally passed by a path path(p) of the cell before pre-movement. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the vertical direction of the grid g; PinPathOv H_up Indicates that the path path(p) of the unit is translated upward by one grid unit to obtain the new path path(p) up After that, the new path path(p) up The total amount of normalized routing congestion in the horizontal direction of all grids that pass horizontally; PinPathOv H-down Indicates that the path path(p) of the unit is translated downward by one grid unit to obtain the new path path(p) down After that, the new path path(p) down The total amount of normalized routing congestion in the horizontal direction for all grids that pass through horizontally; It indicates the congestion change of path path(p) when the unit moves up one grid. It indicates the change in congestion of path path(p) when the unit moves down one grid.

[0057] Furthermore, the area of ​​the virtual unit is:

[0058]

[0059] Among them, ε represents the given area scaling factor, ori represents the horizontal or vertical direction, It indicates that the congestion of a path of the unit in the ori direction changes positively after the i-th unit is pre-moved. It represents the negative change of congestion of a path of the unit in the ori direction after moving the i-th unit, and ζ represents the given negative change impact coefficient.

[0060] Furthermore, the Coulomb force CforceH generated by the virtual unit in the horizontal and vertical directions is calculated according to the following formula: i , CforceVi :

[0061]

[0062] Among them, μ represents the electrostatic constant parameter, directionH i and directionV i Indicates the positive and negative directions of the force in the horizontal and vertical directions, d indicates the distance between the corresponding unit and the virtual unit, CellArea i Indicates the area of ​​the i-th unit, ImArea i represents the area of ​​the virtual unit corresponding to the i-th unit.

[0063] In a second aspect, the present invention provides a wiring congestion optimization device, comprising:

[0064] A layout module is configured to perform global layout of each unit to be laid out based on an electrostatic model to obtain an initial layout result;

[0065] A routing module configured to perform global simulation routing based on the initial layout result, and obtain a simulation routing result and a congestion graph corresponding to the initial layout result, wherein the congestion graph includes a congestion condition of a congested grid;

[0066] A local congestion elimination module is configured to traverse each cell at each of the congested grids to determine a target expansion amount in the horizontal direction and the vertical direction of the corresponding cell according to the simulation routing result and the congestion graph, and to expand the corresponding cell horizontally and vertically according to the target expansion amount in the horizontal direction and the vertical direction of the corresponding cell, and to perform global layout again based on the electrostatic model to obtain an intermediate layout result;

[0067] A global congestion elimination module is configured to traverse each unit in the congested grid corresponding to the intermediate layout result, so that the unit is pre-moved multiple times in the horizontal and vertical directions, each time one grid is pre-moved, and after each pre-movement, the congestion change of all wiring paths corresponding to the unit is calculated, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively, and then a corresponding virtual unit is generated based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, and the Coulomb force generated by the virtual unit is calculated, and the gradient increment of the density gradient is determined based on the Coulomb force, and then the density gradient of the electrostatic model is adjusted according to the gradient increment, and global layout is performed based on the gradient-adjusted electrostatic model to obtain a target layout result.

[0068] In a third aspect, the present invention provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the wiring congestion optimization method as described above when executing the computer program.

[0069] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the wiring congestion optimization method as described above.

[0070] Through the above technical solution, the present invention has the following beneficial effects:

[0071] The present invention evaluates the congestion of the current layout, performs path-considered expansion processing on the cells in the congested area, and determines the corresponding pre-movement direction and congestion change when the congestion decreases the most through pre-movement, thereby generating virtual cells to produce Coulomb force, so as to adjust the density according to the Coulomb force, thereby promoting the separation of densely distributed long-line networks, alleviating the situation where the wiring congestion caused by the long-line networks leads to poor global layout effect. The present invention can obtain a layout result that is more friendly to wiring, thereby reducing the probability of wiring overflow. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0073] Figure 1 It is a flow chart of the wiring congestion optimization method of embodiment 1 of the present invention;

[0074] Figure 2 This is a schematic diagram of a 2-pin wire mesh in Example 1 of the present invention;

[0075] Figure 3 This is a layout effect diagram achieved by the method of Example 1 of the present invention;

[0076] Figure 4 This is a hardware architecture diagram of the electronic device in this embodiment 3. DETAILED DESCRIPTION

[0077] In order to make the purpose, technical scheme and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0078] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The singular forms "a", "the" and "the" used in the present disclosure and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0079] Example 1

[0080] This embodiment provides a routing congestion optimization method based on Coulomb force and considering routing path congestion. Figure 1 As shown, the method specifically comprises the following steps:

[0081] S1, layout each unit to be laid out based on the electrostatic model to obtain the initial layout result.

[0082] Specifically, this embodiment pre-calls a layout design tool (such as RePlace or LeCompiler, etc.), and iteratively performs global layout of each unit to be laid out under density constraints based on a global layout algorithm based on an electrostatic model, so as to optimize the position of the unit by approximately solving the unit overlap function through modeling, and obtains an initial layout result (such as Figure 3 The initial layout result represents the specific location of each unit in the chip wiring area, and is generally output as a file with the suffix def. Since the global layout algorithm based on the electrostatic model is sensitive enough to the unit size, it can effectively reduce the layout overlap of the units.

[0083] After the initial layout results are obtained, congestion optimization is performed according to the following steps to modify the size and gradient of some cells according to the simulated routing congestion of the current layout, and the layout design tool is called again to perform layout until convergence.

[0084] S2, simulation routing: performing global simulation routing based on the initial layout result, obtaining the simulation routing result and congestion graph corresponding to the initial layout result, wherein the congestion graph includes the congestion status of each congested grid.

[0085] Specifically, when simulating wiring, the entire chip wiring area is divided into multiple grids of the same size, and the chip has multiple layers of routable metal layers.

[0086] This step firstly calls a wiring design tool (such as FastRoute or NCTUgr, etc.) to perform global simulation wiring using the minimum rectangular Steiner tree algorithm based on the initial layout result obtained in step S1 and the pre-acquired netlist (including the logical connection relationship between each unit) to obtain a simulation wiring result, which includes a wiring network corresponding to each unit; then, the number of path occupancy (i.e., the number of paths passing through the grid) in the horizontal direction (H direction) and the vertical direction (Y direction) of each grid in the wiring area is calculated based on the wiring network. When the number of path occupancy in the horizontal / vertical direction of a grid exceeds the path capacity (i.e., the maximum number of available paths) in the corresponding direction, the grid is considered to be congested (i.e., wiring overflow), and the grid is marked as a congested grid. The congestion condition of the congested grid is the congestion amount (i.e., wiring overflow) in the corresponding direction (horizontal / vertical direction), and the congestion amount is specifically equal to the difference between the number of path occupancy and the path capacity in the corresponding direction; finally, a corresponding 2D congestion map is generated based on each congested grid and its corresponding congestion condition.

[0087] In this embodiment, the path capacity (Capacity) in the H direction and the V direction corresponding to each grid can be calculated according to the following formula:

[0088]

[0089] Among them, Cap H / V (g) represents the path capacity of the grid in the horizontal / vertical direction, d represents the direction, L represents the number of metal layers, GridLength H / V Indicates the horizontal length / vertical length of the grid.

[0090] According to the above formula, when calculating the vertical path capacity of the first metal layer of the grid, first divide the horizontal length of the grid by the line width MetalW of the wiring path of this layer. l WireSpac l The ideal path capacity in the vertical direction is obtained by summing the two. The ideal path capacity in the horizontal direction is calculated in the same way.

[0091] However, obstacles may sometimes block the path during routing, where Blk represents the set of obstacles, b,l is the metal layer where the obstacles are located, and Obs H / V(b,g) represents the horizontal / vertical overlap length between obstacle b and the corresponding grid. The overlap length is divided by the sum of the line width and line spacing of the corresponding layer routing path to get the number of blocked paths. In a metal layer, the number of ideal paths minus the number of blocked paths is used to get the actual number of available paths for the grid in that layer. The actual number of available paths in all layers is added to get the routing capacity of the grid.

[0092] After routing according to the minimum right-angle Steiner tree RMST, this embodiment can calculate the path occupancy number Use of each grid in the horizontal and vertical directions. The congestion Overflow of the grid in the corresponding direction can be obtained by subtracting the Capacity from the Use. Based on the congestion Overflow of all grids in the horizontal and vertical directions, a 2D congestion map can be obtained.

[0093] S3, eliminating local congestion: first, filtering the discrete congested grids in the aforementioned congestion map; then traversing the cells at the congested grid (the cells at the congested grid include cells that are completely or partially located in the congested grid) to determine the target expansion amounts of the corresponding cells in the horizontal and vertical directions according to the aforementioned simulation wiring results and the congestion map, and expanding the corresponding cells horizontally and vertically according to the target expansion amounts of the corresponding cells in the horizontal and vertical directions, and at the same time iteratively performing global layout on each cell to be laid out based on the global layout algorithm of the electrostatic model again.

[0094] In one practicable manner, discrete congestion grids in the congestion graph are filtered by performing Gaussian smoothing on the congestion graph according to the following formula, so as to more effectively handle clustered congestion:

[0095]

[0096] Among them, I′(x,y) represents the congestion map after smoothing, I(x,y) represents the congestion map before smoothing, x,y are the index positions in the horizontal and vertical directions respectively, G(i,j) represents the Gaussian kernel, whose size is m*n, preferably 3*3, and convolution is performed only in the local area of ​​the congestion map to avoid boundary effects. In addition, in order to avoid introducing unnecessary boundary values ​​during the convolution process, the congestion map will be zero-filled. The congestion map after Gaussian smoothing in this embodiment can effectively remove discrete congested grids.

[0097] In this embodiment, the wire net of each unit in the simulation wiring result is decomposed into 2-pin wire nets (each 2-pin wire net is defined as a wiring path), and each unit has k 2-pin wire nets, where k is the number of pins of the corresponding unit. Figure 2As shown, each unit has multiple pins, and a 2-pin net (path) starting from a pin p of a unit is composed of 4 sub-paths, at the end of each sub-path are pins of other units, and each 2-pin net passes through one or more grids.

[0098] This embodiment calculates, for each unit in the congested grid, the path expansion amount of each unit considering its path congestion and the grid expansion amount considering its occupied grid congestion, and finally linearly combines the two expansion amounts as the target expansion amount of the unit.

[0099] In an practicable manner, the horizontal path expansion amount of the corresponding unit is calculated according to the following formula:

[0100] CellPathPadding H =Avg p∈Pins (PathPadding p H )

[0101]

[0102] Among them, CellPathPadding H Indicates the path expansion amount of the unit in the horizontal direction, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p H Indicates the path expansion of pin p in the horizontal direction, Avg indicates the average value, min indicates the minimum value, and max indicates the maximum value. Path(p) indicates the 2-pin wire net (wiring path) passing through pin p, l indicates one of the 2-pin sub-paths in the wire net, which can be referred to as the sub-path of pin p. A sub-path l will pass through one or more grids, and g∈l indicates one of the grids passed through by the sub-path l. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g.

[0103] The above formula means that the maximum value of the regularized routing congestion in the horizontal direction of all grids passed by sub-path l is taken as the sub-path congestion in the horizontal direction of l; the minimum value of the sub-path congestion in the horizontal direction of all sub-paths l of pin p is taken as the path expansion PathPadding in the horizontal direction of pin p. p H ; Calculate the average of the path expansion in the horizontal direction of all pins of the corresponding cell, that is, the path expansion in the horizontal direction of the corresponding cell CellPathPaddingH .

[0104] In an practicable manner, the path expansion amount of the corresponding unit in the vertical direction is calculated according to the following formula:

[0105] CellPathPadding V =Avg p∈Pins (PathPadding p V )

[0106]

[0107] Among them, CellPathPadding V Indicates the path expansion of the unit in the vertical direction, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p V Indicates the path expansion of pin p in the vertical direction, Avg indicates the average value, min indicates the minimum value, and max indicates the maximum value. Path(p) indicates the 2-pin wire net (wiring path) passing through pin p, l indicates one of the 2-pin sub-paths in the wire net, which can be referred to as the sub-path of pin p. A sub-path l will pass through one or more grids, and g∈l indicates one of the grids passed through by the sub-path l. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of the grid.

[0108] The above formula means that the maximum value of the regularized routing congestion in the vertical direction of all grids passed by sub-path l is taken as the sub-path congestion in the vertical direction of l; the minimum value of the sub-path congestion in the vertical direction of all sub-paths l of pin p is taken as the path expansion PathPadding in the vertical direction of pin p. p V ; Calculate the average value of the path expansion in the vertical direction of all pins of the corresponding unit, that is, the path expansion in the vertical direction of the corresponding unit CellPathPadding V .

[0109] In one practicable manner, the horizontal grid expansion amount CellGridPadding of the congested grid occupied by the corresponding cell is calculated according to the following formula: H :

[0110]

[0111] Among them, Cell-gcells represents the set of congested grids (i.e., overlapping congested grids) occupied by the corresponding cell, g represents one of the occupied congested grids, Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g.

[0112] The above formula indicates that the average value of the regularized wiring congestion in the horizontal direction of all congested grids occupied by the corresponding cell is calculated as the horizontal grid expansion CellGridPadding of the congested grid occupied by the corresponding cell. H .

[0113] In one practicable manner, the vertical grid expansion amount CellGridPadding of the congested grid occupied by the corresponding cell is calculated according to the following formula: V :

[0114]

[0115] Among them, Cell-gcells represents the set of congested grids (i.e., overlapping congested grids) occupied by the corresponding cell, g represents one of the occupied congested grids, Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap H (g) represents the path capacity in the vertical direction of grid g.

[0116] The above formula indicates that the average value of the normalized wiring congestion in the vertical direction of all congested grids occupied by the corresponding cell is calculated as the vertical grid expansion CellGridPadding of the congested grid occupied by the corresponding cell. V .

[0117] In one practicable manner, the target expansion amount CellPadding in the horizontal direction of the corresponding cell is calculated according to the following formula: H :

[0118] CellPadding H =log(max(α*CellPathPadding H +β*CellGridPaddin.g H +γ,1))

[0119] Among them, α, β, γ are given adjustable parameters, max means taking the maximum value, log means calculating the natural logarithm, CellPathPadding H Indicates the path expansion amount in the horizontal direction of the corresponding cell, CellGridPadding H Indicates the horizontal grid expansion of the congested grid occupied by the corresponding cell.

[0120] In one practicable manner, the vertical target expansion amount CellPadding of the corresponding cell is calculated according to the following formula: V :

[0121] CellPadding V =log(max(α*CellPathPadding V +β*CellGridPadding V +γ,1))

[0122] Among them, α, β, γ are given adjustable parameters, max means taking the maximum value, log means calculating the natural logarithm, CellPathPadding V Indicates the path expansion amount in the vertical direction of the corresponding cell, CellGridPadding H Indicates the vertical grid expansion of the congested grid occupied by the corresponding unit.

[0123] After obtaining the horizontal target expansion amount and the vertical target expansion amount corresponding to each unit, each unit is expanded horizontally or vertically based on the corresponding horizontal target expansion amount or vertical target expansion amount, and the layout design tool is called to perform global layout of each unit based on the electrostatic model iteration. When the first iteration stop condition is met (such as reaching a predetermined threshold number of iterations), each unit is expanded vertically or horizontally based on the corresponding vertical target expansion amount or horizontal target expansion amount, and the layout design tool is called to perform global layout of each unit based on the electrostatic model iteration, until the second iteration stop condition is met (such as reaching a predetermined threshold number of iterations), and the intermediate layout result is obtained.

[0124] After the intermediate layout result is obtained, global simulation routing is performed based on the intermediate layout result to obtain the simulation routing result and congestion graph corresponding to the intermediate layout result. The congestion graph includes the congestion status of each congested grid.

[0125] In this step, the overlapping values ​​of each unit can be reduced by alternately expanding each unit in the horizontal / vertical direction and then performing iterative layout, thereby eliminating local congestion.

[0126] S4, eliminate global congestion: first, Gaussian smoothing is also used to filter the discrete congested grids in the congestion graph corresponding to the intermediate layout result; then, for each cell in the congested grid corresponding to the intermediate layout result, the cell is pre-moved multiple times in the horizontal and vertical directions, one grid each time, and the congestion changes of all routing paths corresponding to the cell are calculated after each pre-movement, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively; then, based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, the corresponding virtual cell (representing a positive charge) is generated. Under the framework of the electrostatic model, these virtual cells can generate Coulomb force on the cells at the congested grid, forcing them to move to the pre-movement direction corresponding to the maximum congestion reduction; then, the Coulomb force generated by the virtual cell is calculated, and the gradient increment of the density gradient in the electrostatic model is determined based on the Coulomb force; finally, according to the gradient increment GCDX i 、GCDY i The density gradient of the electrostatic model is adjusted, and after the gradient is adjusted, the layout design tool is called again to iteratively perform global layout on each unit to be laid out based on the global layout algorithm of the electrostatic model to obtain the target layout result.

[0127] Specifically, for each unit at the congested grid, it is first pre-moved horizontally and vertically (pre-movement refers to simulated movement), each pre-movement unit is one grid, and the congestion of all routing paths corresponding to the unit is re-evaluated after the pre-movement, and it is calculated whether the congestion has decreased. If it has decreased, the direction with the largest congestion decrease and the congestion change are recorded, and the area ImArea of ​​the virtual unit corresponding to the unit is calculated based on the congestion change. i , the calculation formula is as follows:

[0128]

[0129] Among them, ε represents the given area scaling factor, It indicates that after the i-th unit is pre-moved, the congestion of a 2-pin network (path) of the unit in the ori direction (horizontal or vertical direction) changes positively. It indicates that after the i-th unit is moved, the congestion of a 2-pin line network of the unit in the ori direction changes negatively. ξ indicates the given negative change influence coefficient, which usually ranges from 0 to 1.

[0130] Specifically, this embodiment decomposes the net of each unit in the intermediate layout result into 2-pin nets, and calculates the congestion change value of all 2-pin nets (routing paths) on the corresponding unit after pre-movement.

[0131] In an practicable manner, when pre-moving in the vertical (V direction), the congestion change amount in the horizontal direction (H direction) of each path of the corresponding unit is calculated according to the following formula:

[0132]

[0133]

[0134] Among them, PinPathOv H It represents the total amount of normalized routing congestion in the horizontal direction of all grids horizontally passed by a path path(p) of the cell before pre-movement. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of the grid g; PinPathOv H_up Indicates that the path path(p) of the unit is translated upward by one grid unit to obtain the new path path(p) up Then, in the new path up The path congestion calculated below is the new path path(p) up The total amount of normalized routing congestion in the horizontal direction of all grids that pass horizontally; similarly, PinPathOv H_down Indicates that the path path(p) of the unit is translated downward by one grid unit to obtain the new path path(p) down Then, in the new path down The path congestion calculated below is the new path path(p) down The total amount of normalized routing congestion in the horizontal direction for all grids that pass through horizontally; It indicates the congestion change of path path(p) when the unit moves up one grid. It indicates the change in congestion of path path(p) when the unit moves down one grid.

[0135] After calculating the congestion changes of all 2-pin nets of the corresponding unit before and after the vertical movement, the positive congestion changes NetsPos after the pre-movement in the up and down directions are calculated. V and negative changes NetsNeg V , the specific calculation process is as follows:

[0136]

[0137] NetsPos V =max(NetsPosUp V , NetsPosDowmV )

[0138]

[0139]

[0140] Among them, NetsPosUp V Represents the total path congestion reduction when all 2-pin nets of the corresponding cell all_path move upward, NetsNegUp V Indicates the total increase in path congestion when all 2-pin nets on the corresponding unit all_path move upward. Similarly, NetsPosDown V Represents the total path congestion decrease when all 2-pin nets on the corresponding unit move downward, NetsNegDown V It represents the sum of the increase in path congestion for all 2-pin nets on the cell when all_path moves downward;

[0141] NetsPos V Indicates the value with the largest total congestion reduction when the corresponding unit moves up and down, direction indicates the direction with the largest congestion reduction, NetsNeg V Indicates the value that maximizes the sum of the increase in congestion when the corresponding unit moves up or down.

[0142] In an practicable manner, when pre-moving in the horizontal direction (H direction), the congestion change amount in the vertical direction (H direction) of each path of the corresponding unit is calculated according to the following formula:

[0143]

[0144] Among them, PinPathOv V It represents the total amount of normalized routing congestion in the vertical direction of all grids that a path path(p) of the cell vertically passes through before pre-movement. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of the grid g; PinPathOv V_left Indicates that the path path(p) of the unit is translated to the left by one grid unit to obtain the new path path(p) left Then, in the new path path(p) left The path congestion calculated below is the new path path(p) left The total amount of normalized routing congestion in the vertical direction of all grids vertically passed through; similarly, PinPathOvV_right Indicates that the path path(p) of the unit is translated to the right by one grid unit to obtain the new path path(p)r ight Then, in the new path path(p) right The path congestion calculated below is the new path path(p) right The total amount of normalized routing congestion in the vertical direction across all grids; It indicates the congestion change of path(p) when the unit moves one grid to the left. It indicates the change in congestion of path path(p) when the unit moves one grid to the right.

[0145] After calculating the congestion changes of all 2-pin nets of the corresponding unit before and after the horizontal movement, the positive change of congestion NetsPos after the pre-movement in the left and right directions is calculated. H and negative changes NetsNeg H , the specific calculation process is as follows:

[0146]

[0147] NetsPos H =max(NetsPosLeft H , NetsPosRight H )

[0148]

[0149] Among them, NetsPosLeft H Represents the sum of the path congestion reduction when all 2-pin nets of the corresponding unit all_path move to the left, NetsNegLeft H Indicates the total increase in path congestion when all 2-pin nets of the corresponding unit all_path move to the left; similarly, NetsPosRight H Represents the total decrease in path congestion when all 2-pin nets on the corresponding cell move rightward, NetsNegRight H It represents the total increase in path congestion for all 2-pin nets on the cell when all_path moves to the right;

[0150] NetsPos H Indicates the value of the maximum total congestion reduction when the corresponding unit moves left and right, direction indicates the direction of the maximum congestion reduction, NetsNeg H Indicates the value with the largest total increase in congestion when the corresponding unit moves left or right.

[0151] After obtaining the direction in which the congestion of each unit decreases the most and the corresponding virtual unit area, in order to move the corresponding unit in the direction in which the congestion decreases the most, a virtual unit with a distance d is generated to push this unit, and the virtual unit area is converted into a Coulomb force that can push the corresponding unit to move.

[0152] The H direction and V direction of the corresponding unit can correspond to a virtual unit respectively, and only work on the corresponding unit at the current congested grid. In the framework of the electrostatic model, all units are considered to be positive point charges, so the virtual unit will generate a Coulomb force CforceH in the H direction and V direction on the corresponding unit. i , CforceV i Force the unit to leave the congested grid. The Coulomb force is calculated as follows:

[0153]

[0154] Among them, μ represents the electrostatic constant parameter, which can actually be 1.1, directionH i 、directionV i Indicates the positive and negative directions of the force in the horizontal and vertical directions, which is determined according to the direction in which the congestion of the corresponding cell decreases the most. d represents the distance and is an adjustable parameter. CellArea i Indicates the area of ​​the i-th unit, ImArea i Represents the virtual unit area corresponding to the i-th unit.

[0155] Finally, the Coulomb force will be scaled by the given coefficient K to the same scale as the density gradient of the electrostatic model to obtain the gradient increment GCDX i 、GCDY i , and as the global congestion descent direction for the cell:

[0156] GCDX i =κ·CforceV i

[0157] GDY i =κ·CforceH i

[0158] Then, according to the gradient increment GCDX i 、GCDY i The density gradient of the electrostatic model is adjusted, and after the gradient is adjusted, the layout design tool is called again to iteratively perform global layout on each unit to be laid out based on the global layout algorithm of the electrostatic model.

[0159] When the global layout is subsequently re-performed, the adjustment of the density gradient can separate the densely distributed long-line networks, thereby alleviating the wiring congestion caused by the long-line networks and leading to poor global layout effects. The present invention can obtain a layout result that is more friendly to wiring, thereby reducing the probability of wiring overflow.

[0160] like Figure 3 As shown, for the initial layout result on the left, after congestion elimination using the method of this embodiment, the layout result on the right can be obtained, in which the congested grid is eliminated.

[0161] It can be seen that this embodiment eliminates routing congestion in the layout stage and has the following characteristics: utilizing an electrostatics engine-based solution to the layout density constraint framework to accelerate convergence; introducing a descending direction to make the algorithm mathematically extensible; effectively eliminating global and local congestion; and having a shorter Manhattan line length.

[0162] Compared with conventional congestion elimination technology, this embodiment evaluates the congestion of the current layout, expands the cells in the congested area with path considerations, and determines the direction of congestion reduction. It is particularly suitable for current advanced process designs and highly integrated chips because it can significantly reduce wiring congestion in the layout stage, thereby improving the chip tape-out success rate and ensuring the quality of physical design.

[0163] Example 2

[0164] This embodiment provides a wiring congestion optimization device based on Coulomb force and considering wiring path congestion. The device specifically includes a layout module, a wiring module, a local congestion elimination module and a global congestion elimination module, wherein:

[0165] The layout module is configured to perform global layout on each unit to be laid out based on an electrostatic model to obtain an initial layout result.

[0166] The routing module is configured to perform global simulation routing based on the initial layout result to obtain a simulation routing result and a congestion graph corresponding to the initial layout result, wherein the congestion graph includes a congestion condition of a congestion grid;

[0167] The local congestion elimination module is configured to traverse each cell at each of the congested grids to determine the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction according to the simulation routing result and the congestion graph, and to expand the corresponding cell horizontally and vertically according to the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction, and to perform global layout again based on the electrostatic model to obtain an intermediate layout result;

[0168] The global congestion elimination module is configured to traverse each unit in the congested grid corresponding to the intermediate layout result, so that the unit is pre-moved multiple times in the horizontal and vertical directions, each time one grid is pre-moved, and after each pre-movement, the congestion changes of all wiring paths corresponding to the unit are calculated, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively, and then the corresponding virtual unit is generated based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, and the Coulomb force generated by the virtual unit is calculated, and the gradient increment of the density gradient is determined based on the Coulomb force, and then the density gradient of the electrostatic model is adjusted according to the gradient increment, and global layout is performed based on the gradient-adjusted electrostatic model to obtain the target layout result.

[0169] Furthermore, the local congestion elimination module determines the target expansion amount in the horizontal direction of the corresponding unit according to the following steps:

[0170] Calculate the horizontal path expansion of the corresponding cell CellPathPadding H ;

[0171] Calculate the horizontal grid expansion CellGridPadding of the congested grid occupied by the corresponding cell H ;

[0172] Calculate the target expansion amount of the corresponding cell in the horizontal direction according to the following formula: CellPadding H :

[0173] CellPadding H =log(max(α*CellPathPadding H +β*CellGridPadding H +γ,1))

[0174] Among them, α, β, and γ are given parameters.

[0175] Furthermore, the horizontal path expansion amount CellPathPaddingH of the corresponding cell is calculated according to the following formula:

[0176] CellPathPadding H =Avg p∈Pins (PathPadding p H )

[0177]

[0178] Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding pH represents the path expansion amount of pin p in the horizontal direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g;

[0179] The horizontal grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding H :

[0180]

[0181] Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g.

[0182] Furthermore, the local congestion elimination module determines the target expansion amount in the vertical direction of the corresponding unit according to the following steps:

[0183] Calculate the vertical path expansion CellPathPadding of the corresponding cell V ;

[0184] Calculate the vertical grid expansion CellGridPadding of the congested grid occupied by the corresponding cell V ;

[0185] Calculate the target expansion amount in the vertical direction of the corresponding cell according to the following formula: CellPadding V :

[0186] CellPadding V =log(max(α*CellPathPadding V +β*CellGridPadding V +γ,1))

[0187] Among them, α, β, and γ are given parameters.

[0188] Furthermore, the local congestion elimination module calculates the vertical path expansion amount CellPathPadding of the corresponding cell according to the following formula: V :

[0189] CellPathPadding V =Avg p∈Pins (PathPadding p V )

[0190]

[0191] Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p V represents the path expansion of pin p in the vertical direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g;

[0192] The vertical grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding V :

[0193]

[0194] Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g.

[0195] Furthermore, the process of calculating the congestion change of all routing paths corresponding to the unit by the global congestion elimination module after the corresponding unit is pre-moved in the horizontal direction is as follows:

[0196]

[0197] NetsPos H =max(NetsPosLeft H ,NetsPosRight H )

[0198]

[0199]

[0200] in, It indicates the congestion change of a path of the corresponding unit when the unit moves one grid to the left. Indicates the congestion change of a path of the unit when the unit moves one grid to the right, NetsPosLeft H NetsNegLeft represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the left. H Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the left; NetsPosRight H Represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the right, NetsNegRight H It indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the right; NetsPos H Indicates the value of the maximum total congestion reduction when the corresponding unit moves left or right, direction indicates the direction in which the congestion decreases the most when moving left or right, NetsNeg H Indicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

[0201] Furthermore, the global congestion elimination module calculates the congestion change of each path corresponding to the unit after the corresponding unit is pre-moved left and right. The process is as follows:

[0202]

[0203] Among them, PinPathOv V It represents the total amount of normalized routing congestion in the vertical direction of all grids that a path path(p) of the cell vertically passes through before pre-movement. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of the grid g; PinPathOv V_left Indicates that the path path(p) of the unit is translated to the left by one grid unit to obtain the new path path(p) left After that, the new path path(p) left The total amount of normalized routing congestion in the vertical direction across all grids;

[0204] PinPathOv V_rightIndicates that the path path(p) of the unit is translated to the right by one grid unit to obtain the new path path(p) right After that, the new path path(p) right The total amount of normalized routing congestion in the vertical direction across all grids; It indicates the congestion change of path(p) when the unit moves one grid to the left. It indicates the change in congestion of path path(p) when the unit moves one grid to the right.

[0205] Furthermore, the process of calculating the congestion change of all routing paths corresponding to the unit by the global congestion elimination module after the corresponding unit is pre-moved in the vertical direction is as follows:

[0206]

[0207] NetsPos V =max(NetsPosUp V ,NtesPosDown V )

[0208]

[0209] in, It represents the congestion change of a path of the corresponding unit when the unit moves up one grid. Indicates the congestion change of a path of the unit when the unit moves down one grid, NetsPosUp V It represents the sum of the decrease in path congestion of all paths when the corresponding unit moves upward, NetsNegUp V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves upward; NetsPosDown V Represents the sum of the path congestion decreases of all paths when the corresponding unit moves downward, NetsNegDown V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves downward; NetsPos V Indicates the value of the maximum total congestion reduction when the corresponding unit moves up and down, and direction indicates the direction in which the congestion decreases the most when moving up and down. NetsNeg H Indicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

[0210] Furthermore, the global congestion elimination module calculates the congestion change of each path corresponding to the unit after pre-movement under the corresponding unit. The process is as follows:

[0211]

[0212]

[0213] Among them, PinPathOv H It represents the total amount of normalized routing congestion in the vertical direction of all grids horizontally passed by a path path(p) of the cell before pre-movement. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the vertical direction of the grid g; PinPathOv H_up Indicates that the path path(p) of the unit is translated upward by one grid unit to obtain the new path path(p) up After that, the new path path(p) up The total amount of normalized routing congestion in the horizontal direction of all grids that pass horizontally; PinPathOv H_down Indicates that the path path(p) of the unit is translated downward by one grid unit to obtain the new path path(p) down After that, the new path path(p) down The total amount of normalized routing congestion in the horizontal direction for all grids that pass through horizontally; It indicates the congestion change of path path(p) when the unit moves up one grid. It indicates the change in congestion of path path(p) when the unit moves down one grid.

[0214] Furthermore, the Coulomb force CforceH generated by the virtual unit in the horizontal and vertical directions is calculated according to the following formula: i , CforceV i :

[0215]

[0216] Among them, ε represents the given area scaling factor, ori represents the horizontal or vertical direction, It indicates that the congestion of a path of the unit in the ori direction changes positively after the i-th unit is pre-moved. It represents the negative change of congestion of a path of the unit in the ori direction after moving the i-th unit, and ξ represents the given negative change influence coefficient.

[0217] Furthermore, the calculation formula of the Coulomb force generated by the virtual unit is as follows:

[0218]

[0219] Among them, μ represents the electrostatic constant parameter, directionH i and directionV i Indicates the positive and negative directions of the force in the horizontal and vertical directions, d indicates the distance between the corresponding unit and the virtual unit, CellArea i Indicates the area of ​​the i-th unit, ImArea i represents the area of ​​the virtual unit corresponding to the i-th unit.

[0220] This embodiment eliminates routing congestion in the layout stage and has the following characteristics: utilizing an electrostatics engine-based solution to a layout density constraint framework to accelerate convergence; introducing a descending direction to make the algorithm mathematically extensible; effectively eliminating global and local congestion; and having a shorter Manhattan line length.

[0221] Compared with conventional congestion elimination technology, this embodiment evaluates the congestion of the current layout, expands the cells in the congested area with path considerations, and determines the direction of congestion reduction. It is particularly suitable for current advanced process designs and highly integrated chips because it can significantly reduce wiring congestion in the layout stage, thereby improving the chip tape-out success rate and ensuring the quality of physical design.

[0222] Example 3

[0223] This embodiment provides an electronic device, which can be expressed in the form of a computing device (for example, a server device), including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the steps of the wiring congestion optimization method provided in Embodiment 1 can be implemented when the processor executes the computer program.

[0224] Figure 4 FIG. 4 shows a schematic diagram of the hardware structure of this embodiment. Figure 4 As shown, the electronic device 30 specifically includes:

[0225] At least one processor 31, at least one memory 32, and a bus 33 for connecting different system components (including the processor 31 and the memory 32), wherein:

[0226] The bus 33 includes a data bus, an address bus, and a control bus.

[0227] The memory 32 includes a volatile memory, such as a random access memory (RAM) 321 and / or a cache memory 322 , and may further include a read-only memory (ROM) 323 .

[0228] The memory 32 also includes a program / utility 325 having a set (at least one) of program modules 324, such program modules 324 including but not limited to: an operating system, one or more application programs, other program modules and program data, each of which or some combination may include an implementation of a network environment.

[0229] The processor 31 executes various functional applications and data processing by running the computer program stored in the memory 32, such as the steps of the wiring congestion optimization method provided in the first embodiment of the present invention.

[0230] The electronic device 30 can further communicate with one or more external devices 34 (e.g., keyboards, pointing devices, etc.). Such communication can be performed through an input / output (I / O) interface 35. In addition, the electronic device 30 can also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) through a network adapter 36. The network adapter 36 communicates with other modules of the electronic device 30 through the bus 33. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with the electronic device 30, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, and data backup storage systems.

[0231] It should be noted that although several units / modules or sub-units / modules of the electronic device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more units / modules described above can be embodied in one unit / module. Conversely, the features and functions of one unit / module described above can be further divided into multiple units / modules to be embodied.

[0232] Example 4

[0233] This embodiment provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the steps of the wiring congestion optimization method provided in Embodiment 1 are implemented.

[0234] The readable storage medium may include but is not limited to: a portable disk, a hard disk, a random access memory, a read-only memory, an erasable programmable read-only memory, an optical storage device, a magnetic storage device or any suitable combination of the above.

[0235] In a possible implementation manner, the present invention may also be implemented in the form of a program product, which includes program code. When the program product runs on an electronic device, the program code is used to enable the electronic device to execute the steps of the wiring congestion optimization method provided in Example 1.

[0236] The program code for executing the present invention may be written in any combination of one or more programming languages, and may be executed entirely on a user device, partially on a user device, as an independent software package, partially on a user device and partially on a remote device, or entirely on a remote device.

[0237] Although the specific embodiments of the present invention are described above, it should be understood by those skilled in the art that this is only for illustration and the protection scope of the present invention is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present invention, but these changes and modifications all fall within the protection scope of the present invention.

Claims

1. A method for optimizing wiring congestion, characterized in that: include: Perform global layout of each unit to be laid out based on the electrostatic model to obtain an initial layout result; Performing global simulation routing based on the initial layout result to obtain a simulation routing result and a congestion graph corresponding to the initial layout result, wherein the congestion graph includes a congestion condition of a congested grid; Traversing each cell at each of the congested grids to determine the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction according to the simulation routing result and the congestion graph, and expanding the corresponding cell horizontally and vertically according to the target expansion amount of the corresponding cell in the horizontal direction and the vertical direction, and performing global layout again based on the electrostatic model to obtain an intermediate layout result; Each unit in the congested grid corresponding to the intermediate layout result is traversed to make the unit pre-moved multiple times in the horizontal and vertical directions, one grid is pre-moved each time, and the congestion change of all wiring paths corresponding to the unit is calculated after each pre-movement, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively, and then a corresponding virtual unit is generated based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, and the Coulomb force generated by the virtual unit is calculated, and the gradient increment of the density gradient is determined based on the Coulomb force, and then the density gradient of the electrostatic model is adjusted according to the gradient increment, and global layout is performed based on the electrostatic model with gradient adjustment to obtain the target layout result.

2. The method for optimizing wiring congestion according to claim 1, characterized in that: Determine the target expansion in the horizontal direction of the corresponding element as follows: Calculate the horizontal path expansion of the corresponding cell CellPathPadding H ; Calculate the horizontal grid expansion CellGridPadding of the congested grid occupied by the corresponding cell H ; Calculate the target expansion amount of the corresponding cell in the horizontal direction according to the following formula: CellPadding H : CellPadding H =log(max(α*CellPathPadding H +β*CellGridPadding H +γ,1)) Among them, α, β, and γ are given parameters.

3. The method for optimizing wiring congestion according to claim 3, characterized in that: Calculate the horizontal path expansion of the corresponding cell according to the following formula: CellPathPadding H : CellPathPadding H =Avg p∈Pins (PathPadding p H ) Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p H represents the path expansion amount of pin p in the horizontal direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g; The horizontal grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding H : Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the horizontal direction of grid g.

4. The method for optimizing wiring congestion according to claim 1, characterized in that: Determine the target expansion in the vertical direction of the corresponding element as follows: Calculate the vertical path expansion CellPathPadding of the corresponding cell V ; Calculate the vertical grid expansion CellGridPadding of the congested grid occupied by the corresponding cell V ; Calculate the target expansion amount in the vertical direction of the corresponding cell according to the following formula: CellPadding V : CellPadding V =log(max(α*CellPathPadding V +β*CellGridPadding V +γ,1)) Among them, α, β, and γ are given parameters.

5. The method for optimizing wiring congestion according to claim 4, characterized in that: Calculate the vertical path expansion of the corresponding cell according to the following formula: CellPathPadding V : CellGridPadding V =Avg p∈Pins (PathPadding p V ) Among them, Pins represents the pin set of the unit, p represents one of the pins, PathPadding p V represents the path expansion of pin p in the vertical direction, Path(p) represents the path passing through pin p, l represents one of the sub-paths in the path, and g represents one of the grids passed by sub-path l. represents the normalized routing congestion of the grid g in the vertical direction, use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g; The vertical grid expansion amount of the congested grid occupied by the corresponding cell is calculated according to the following formula: CellGridPadding V : Among them, Cell-gcells represents the set of congested grids occupied by the corresponding cell, g represents one of the congested grids occupied by the corresponding cell, Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of grid g.

6. The method for optimizing wiring congestion according to claim 1, characterized in that: After the corresponding unit is pre-moved in the horizontal direction, the process of calculating the congestion change of all routing paths corresponding to the unit is as follows: NetsPos H =max(NetsPosLeft H ,NetsPosRight H ) in, It indicates the congestion change of a path of the corresponding unit when the unit moves one grid to the left. Indicates the congestion change of a path of the unit when the unit moves one grid to the right, NetsPosLeft H NetsNegLeft represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the left. H Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the left; NetsPosRight H Represents the sum of the path congestion reductions of all paths when the corresponding unit moves to the right, NetsNegRight H It indicates the sum of the increase in path congestion of all paths when the corresponding unit moves to the right; NetsPos H Indicates the value of the maximum total congestion reduction when the corresponding unit moves left or right, direction indicates the direction in which the congestion decreases the most when moving left or right, NetsNeg H Indicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

7. The method for optimizing wiring congestion according to claim 6, characterized in that: After the corresponding unit is pre-moved left or right, the congestion change of each path corresponding to the unit is calculated The process is as follows: Among them, PinPathOv V It represents the total amount of normalized routing congestion in the vertical direction of all grids that a path path(p) of the cell vertically passes through before pre-movement. Indicates the normalized routing congestion in the vertical direction of the grid g, Use V (g) represents the number of paths occupied in the vertical direction of grid g, Cap V (g) represents the path capacity in the vertical direction of the grid g; PinPathOv V_left The path tath(p) of the cell is translated to the left by one grid unit to obtain the new path tath(p) left After that, the new path tath(p) left The total amount of normalized routing congestion in the vertical direction of all grids vertically passed through; PinPathOv V_right The path tath(p) of the cell is translated to the right by one grid unit to obtain the new path tath(p) right After that, the new path path(p) right The total amount of normalized routing congestion in the vertical direction across all grids; It indicates the congestion change of path(p) when the unit moves one grid to the left. It indicates the change in congestion of path path(p) when the unit moves one grid to the right.

8. The method for optimizing wiring congestion according to claim 1, characterized in that: After the corresponding unit is pre-moved in the vertical direction, the process of calculating the congestion change of all routing paths corresponding to the unit is as follows: NetsPos V =max(NetsPosUp V ,NtesPosDown V ) in, It indicates the congestion change of a path of the corresponding unit when the unit moves up one grid. Indicates the change in congestion of a path of the unit when the unit moves down one grid, NetsPosUp V Represents the sum of the path congestion reduction of all paths when the corresponding unit moves upward, NetsNegUp V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves upward; NetsPosDown V Represents the sum of the path congestion decreases of all paths when the corresponding unit moves downward, NetsNegDown V Indicates the sum of the increase in path congestion of all paths when the corresponding unit moves downward; NetsPos V Indicates the value of the maximum total congestion reduction when the corresponding unit moves up and down, and direction indicates the direction in which the congestion decreases the most when moving up and down. NetsNeg H Indicates the value that maximizes the total increase in congestion when the corresponding unit moves left or right.

9. The method for optimizing wiring congestion according to claim 8, characterized in that: After the corresponding unit is pre-moved, the congestion change of each path corresponding to the unit is calculated. The process is as follows: Among them, PinPathOv H It represents the total amount of normalized routing congestion in the vertical direction of all grids horizontally passed by a path path(p) of the cell before pre-movement. Indicates the regularized routing congestion in the horizontal direction of the grid g, Use H (g) represents the number of paths occupied in the horizontal direction of grid g, Cap H (g) represents the path capacity in the vertical direction of the grid g; PinPathOv H_up Indicates that the path path(p) of the unit is translated upward by one grid unit to obtain the new path path(p) up After that, the new path path(p) up The total amount of normalized routing congestion in the horizontal direction of all grids that pass horizontally; PinPathOv H_down Indicates that the path path(p) of the unit is translated downward by one grid unit to obtain the new path path(p) down After that, the new path path(p) down The total amount of normalized routing congestion in the horizontal direction for all grids that pass through horizontally; It indicates the congestion change of path path(p) when the unit moves up one grid. It indicates the change in congestion of path path(p) when the unit moves down one grid.

10. The method for optimizing wiring congestion according to claim 1, characterized in that: The area of ​​the virtual unit is: Among them, ε represents the given area scaling factor, ori represents the horizontal or vertical direction, It indicates that the congestion of a path of the unit in the ori direction changes positively after the i-th unit is pre-moved. It represents the negative change of congestion of a path of the unit in the ori direction after moving the i-th unit, and ξ represents the given negative change influence coefficient.

11. The method for optimizing wiring congestion according to claim 1, characterized in that: The Coulomb force CforceH in the horizontal and vertical directions generated by the virtual unit is calculated according to the following formula: i , CforceV i : Among them, μ represents the electrostatic constant parameter, directionH i and directionV i Indicates the positive and negative directions of the force in the horizontal and vertical directions, d indicates the distance between the corresponding unit and the virtual unit, CellArea i Indicates the area of ​​the i-th unit, ImArea i represents the area of ​​the virtual unit corresponding to the i-th unit.

12. A wiring congestion optimization device, characterized in that: include: A layout module is configured to perform global layout of each unit to be laid out based on an electrostatic model to obtain an initial layout result; A routing module, for performing global simulation routing based on the initial layout result, to obtain a simulation routing result and a congestion graph corresponding to the initial layout result, wherein the congestion graph includes a congestion condition of a congestion grid; A local congestion elimination module is configured to traverse each cell at each of the congested grids to determine a target expansion amount in the horizontal direction and the vertical direction of the corresponding cell according to the simulation routing result and the congestion graph, and to expand the corresponding cell horizontally and vertically according to the target expansion amount in the horizontal direction and the vertical direction of the corresponding cell, and to perform global layout again based on the electrostatic model to obtain an intermediate layout result; A global congestion elimination module is configured to traverse each unit in the congested grid corresponding to the intermediate layout result, so that the unit is pre-moved multiple times in the horizontal and vertical directions, each time one grid is pre-moved, and after each pre-movement, the congestion change of all wiring paths corresponding to the unit is calculated, and the pre-movement direction and congestion change corresponding to the maximum congestion reduction in the horizontal and vertical directions are recorded respectively, and then a corresponding virtual unit is generated based on the pre-movement direction and congestion change corresponding to the maximum congestion reduction, and the Coulomb force generated by the virtual unit is calculated, and the gradient increment of the density gradient is determined based on the Coulomb force, and then the density gradient of the electrostatic model is adjusted according to the gradient increment, and global layout is performed based on the gradient-adjusted electrostatic model to obtain a target layout result.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the wiring congestion optimization method according to any one of claims 1 to 11 are implemented.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the wiring congestion optimization method according to any one of claims 1 to 11 are implemented.

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