Heterogeneous computing execution optimization method and system based on closed-loop self-learning architecture

Abstract

The application is suitable for the technical field of computers, and provides a heterogeneous computing execution optimization method and system based on a closed-loop self-learning architecture, which comprises the following steps: performing meta-task analysis on an input computing task, and extracting computing feature metadata thereof; dynamically deciding, based on a pre-trained performance prediction model, an execution path planning of the task between a CPU and a GPU according to the computing feature metadata; performing adaptive resource collaborative configuration according to the execution path planning; generating optimized kernel code based on the computing feature metadata and a current hardware state; performing real-time performance monitoring and dynamic execution adjustment in the execution process of the optimized kernel code; and updating the performance prediction model based on a computing output result. The application effectively solves the problems of rigid task scheduling strategy, prominent memory and data transmission bottlenecks, insufficient and lack of adaptability of computing kernel optimization, and lack of self-evolution and learning ability of the system.

Description

[0001] This application is a divisional application of the invention application filed on November 22, 2025, with Chinese application number 202511723927.2 and titled "Heterogeneous Computing Method and Platform for CPU and GPU Collaboration". Technical Field

[0002] This invention belongs to the field of computer technology, and in particular relates to a method and system for optimizing heterogeneous computing execution based on a closed-loop self-learning architecture. Background Technology

[0003] With the rapid popularization of artificial intelligence and scientific computing applications, computing tasks are continuously increasing in complexity and scale. Single-processor architectures are struggling to meet modern computing demands, and heterogeneous systems combining CPUs and GPUs are gradually becoming the mainstream solution. CPUs excel at handling logic-intensive tasks, while GPUs, with their parallel processing capabilities, have a significant advantage in data throughput tasks. However, existing heterogeneous computing technologies have revealed several shortcomings in practical applications: Task scheduling mechanisms generally rely on static rules, such as forcibly allocating all parallel tasks to GPUs, ignoring dynamic changes in task characteristics such as data size, dimensionality, sparsity, and numerical precision. When task characteristics shift, an execution path that was originally efficient on the GPU may become more efficient on the CPU. However, existing systems lack deep awareness of metadata and real-time decision-making capabilities, resulting in wasted computing resources and energy losses.

[0004] More importantly, the system exhibits open-loop characteristics. Metadata, configuration parameters, and performance metrics generated during task execution are not effectively collected and utilized, making it impossible to form a continuous learning mechanism. Consequently, the decision-making model cannot evolve on its own with changes in load, and performance tuning relies on manual intervention in the long term.

[0005] These technological bottlenecks severely restrict the efficiency and adaptability of heterogeneous computing systems. Summary of the Invention

[0006] The purpose of this invention is to provide a heterogeneous computing execution optimization method and system based on a closed-loop self-learning architecture to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides the following technical solution: A heterogeneous computing execution optimization method based on a closed-loop self-learning architecture, the method comprising: Step S1: Perform meta-task analysis on the input computation task and extract its computational feature metadata; Step S2: Based on the pre-trained performance prediction model, dynamically decide on the execution path planning of the task between the CPU and GPU according to the computational feature metadata; Step S3: Perform adaptive resource collaborative configuration based on the execution path planning; Step S4: Generate optimized kernel code based on the computational feature metadata and the current hardware state; Step S5: Perform real-time performance monitoring and dynamic execution adjustments during the execution of the optimized kernel code; Step S6: Verify the calculation output results and feed the task data executed this time back to the historical database to update the performance prediction model.

[0008] As a further aspect of the present invention, step S1 specifically includes: S11: Extract the metadata of the computing task, which includes data size, data dimension, data sparsity and numerical precision; S12: Construct a task feature vector based on the metadata; S13: Perform max-min normalization on the task feature vector to obtain a standardized feature vector.

[0009] As a further aspect of the present invention, step S2 includes: S21: Input the standardized feature vector into the performance prediction model to generate time consumption prediction values ​​and energy efficiency prediction values ​​under different execution paths; S22: Select the execution path based on the predicted time consumption and energy efficiency; S23: When selecting a GPU execution path, determine the GPU thread organization structure; The execution paths include pure CPU execution paths, pure GPU execution paths, and CPU-GPU hybrid execution paths.

[0010] As a further aspect of the present invention, step S3 includes unified memory management, which includes: S31: Perform proactive prefetching of data in the unified memory space according to the execution path plan; S32: Migrate data to GPU memory before the GPU kernel executes; S33: When the data size exceeds the GPU memory capacity, automatic data exchange is performed between the GPU memory and the host memory.

[0011] As a further aspect of the present invention, step S3 further includes pipelined orchestration of computation and data transmission, specifically including: Divide the data to be processed into multiple consecutive data batches; While the GPU processes the Nth batch of data, the CPU performs the preparation and transmission operations for the N+1th batch of data, thus achieving pipelined parallelism between data transmission and kernel computation.

[0012] As a further aspect of the present invention, step S4 includes: S41: Provides a parameterized kernel code template, which includes a loop unrolling factor, memory access mode, and shared memory usage. S42: Fill the parameters into the template according to the calculated feature metadata; S43: Generates executable kernel code through just-in-time compilation.

[0013] As a further aspect of the present invention, the dynamic execution adjustment in step S5 includes: S51: Supports dynamic parallelism, enabling GPU threads to launch nested kernels during runtime; S52: Break down large tasks into multiple subtasks; S53: Schedule the kernel corresponding to the subtask to be executed concurrently on the GPU.

[0014] As a further aspect of the present invention, step S6 includes: S61: Enable low-precision approximation calculation mode for computation tasks that allow for error; S62: Use a verification procedure to confirm the error range of the calculation results.

[0015] As a further aspect of the present invention, step S6 further includes: S63: Record task metadata, resource configuration parameters, and real-time performance metrics to the historical database; S64: Retrain the performance prediction model using historical database data.

[0016] The present invention also provides a heterogeneous computing execution optimization system based on a closed-loop self-learning architecture, used to implement a heterogeneous computing execution optimization method based on a closed-loop self-learning architecture. The system's operation includes: Meta-task analysis is performed on the input computational task to extract its computational feature metadata; Based on a pre-trained performance prediction model, the execution path planning of the task between CPU and GPU is dynamically determined according to the computational feature metadata. Adaptive resource collaborative configuration is performed based on the execution path planning; Optimized kernel code is generated based on the computational feature metadata and the current hardware state; Real-time performance monitoring and dynamic execution adjustments are performed during the execution of the optimized kernel code. The calculation output results are verified, and the task data executed this time is fed back to the historical database to update the performance prediction model.

[0017] Compared with the prior art, the beneficial effects of the present invention are: The heterogeneous computing execution optimization method, system, and computer-readable storage medium based on a closed-loop self-learning architecture provided by this invention effectively solve the defects of existing technologies such as static task scheduling, inefficient memory management, serialized data transmission, insufficient kernel optimization, and open-loop system by dynamically deciding on task execution paths, adaptively configuring resources, generating heterogeneous awareness optimization kernels, real-time monitoring and adjustment of the execution process, and constructing a closed-loop learning mechanism. It has the advantages of dynamic decision-making on task execution paths, adaptive resource collaborative configuration, customized kernel code optimization, and closed-loop system learning. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention.

[0019] Figure 1 The overall flowchart of the heterogeneous computing execution optimization method based on the closed-loop self-learning architecture is shown.

[0020] Figure 2 The diagram shows the structure of a heterogeneous computing execution optimization system based on a closed-loop self-learning architecture. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] The specific implementation of the present invention will be described in detail below with reference to specific embodiments.

[0023] Figure 1 A general flowchart of a heterogeneous computing execution optimization method based on a closed-loop self-learning architecture is shown. In one embodiment of the technical solution of this invention, a heterogeneous computing execution optimization method based on a closed-loop self-learning architecture is provided, the method comprising the following steps: Step S1: Perform meta-task analysis on the input computation task, extract its computational feature metadata, and dynamically decide on the execution path planning of the task between CPU and GPU based on the pre-trained performance prediction model. Computational feature metadata refers to a set of parameters used to quantitatively describe the characteristics of a computational task. This can be achieved using the statistical distribution characteristics of the task's input data, such as skewness and kurtosis indices. Its main purpose is to provide objective representations of the task's features. Specifically, a pre-trained performance prediction model can be understood as a prediction tool built based on historical execution data. It can be implemented using support vector machine algorithms, such as using kernel functions to handle non-linear feature relationships. Its main purpose is to generate performance prediction results under different execution paths.

[0024] Step S2: Based on the execution path planning, perform adaptive resource collaborative configuration, including but not limited to intelligent unified memory management, pipelined orchestration of computing and data transmission, and dynamic power consumption allocation; Intelligent unified memory management refers to a mechanism that coordinates CPU and GPU memory space access. This can be implemented using cache replacement strategies based on access frequency, such as the Least Recently Used algorithm to dynamically adjust data residency locations, primarily to reduce the overhead of cross-device data migration. Therefore, pipelined orchestration of computation and data transfer can be understood as a method for parallel processing of data transfer and computation operations. This can be implemented using asynchronous transmission techniques, such as non-blocking I / O operations to achieve overlapping execution of data transfer and computation, primarily to eliminate idle computing units caused by data transfer waiting.

[0025] Step S3: Based on the computational feature metadata and the current hardware state, generate heterogeneous-aware optimized kernel code using parameterized kernel templates or just-in-time compilation technology. A parameterized kernel template is a code framework containing configurable parameters, which can be implemented using macro definition technology, such as replacing the thread block size parameter value during the compilation stage. Its main purpose is to generate kernel code that adapts to the characteristics of the current task.

[0026] Step S4: During the execution of the optimized kernel code, real-time performance monitoring and dynamic execution adjustment are performed. The dynamic execution adjustment includes dynamic parallelism and concurrent kernel execution. Step S5: Perform intelligent verification on the calculation output results, and feed back the task metadata, configuration parameters, and performance data of this execution to the historical database to update the performance prediction model, forming a closed-loop learning system. A closed-loop learning system refers to a mechanism that continuously optimizes the decision model through feedback data. It can be implemented using online learning algorithms, such as stochastic gradient descent, to periodically update model parameters. Its main purpose is to achieve the dynamic evolution of the performance prediction model.

[0027] This embodiment avoids efficiency losses caused by static scheduling strategies failing to adapt to differences in task characteristics through dynamic decision-making execution path planning. Adaptive resource collaborative configuration eliminates the serial dependency between data transmission and computation. Heterogeneous awareness-based optimized kernel code generation solves the defect that fixed kernels cannot adapt to task changes and require manual tuning. The closed-loop feedback mechanism overcomes the limitation of open-loop systems being unable to accumulate execution experience. Thus, it effectively addresses the technical problems of rigid task scheduling strategies, prominent memory transmission bottlenecks, insufficient kernel adaptability, and the lack of self-evolution capabilities of the system.

[0028] This heterogeneous computing execution optimization method based on a closed-loop self-learning architecture achieves efficient collaboration between heterogeneous systems through dynamically perceiving task characteristics and a closed-loop learning mechanism. Upon inputting a computation task, meta-task analysis is performed, and computational feature metadata, including data size, dimensionality, sparsity, and numerical precision, is extracted. This metadata is input into a pre-trained performance prediction model, which dynamically determines the optimal execution path between the CPU and GPU based on historical execution data. Based on the decision results, adaptive resource collaborative configuration is implemented, encompassing intelligent unified memory management, pipelined orchestration of computation and data transfer, and dynamic power allocation. Furthermore, based on the computational feature metadata and the current hardware state, heterogeneously perceptive optimized kernel code is generated, utilizing parameterized kernel templates or just-in-time (JIT) compilation techniques to achieve context customization. During the execution of the optimized kernel code, real-time performance monitoring is performed, and dynamic execution adjustments, including dynamic parallel and concurrent kernel execution, are triggered. Finally, the computational output results are intelligently verified, and the task metadata, configuration parameters, and performance data of this execution are fed back to the historical database to update the performance prediction model, forming a closed-loop learning system.

[0029] For example, in a video processing scenario, when handling a real-time video stream analysis task, the metadata is defined as having a data size of 80MB, a dimension of 2D, a sparsity of 0.85, and a numerical precision of FP32. After performance prediction model analysis, a CPU-GPU hybrid execution path is adopted. Based on this, the system configures unified memory management, actively migrating the data required for computation to the GPU memory. The data stream is divided into consecutive batches, so that while the GPU processes the Nth batch of video frames, the CPU prepares the N+1th batch of data in parallel. Optimized kernel code is generated, in which kernel parameters are dynamically configured to the optimal values ​​for the characteristics of the task. During execution, GPU load fluctuations are monitored, and the number of kernel concurrency is dynamically adjusted to maintain stable performance. After the results are verified, the complete execution context data is recorded in the historical database for model iteration and optimization.

[0030] As a result, the problem of rigid task scheduling strategies is effectively solved. Execution path decisions are based on real-time changes in task characteristics rather than preset rules, avoiding efficiency losses caused by feature differences. Memory and data transfer bottlenecks are eliminated, and pipelined orchestration enables parallel data transfer and computation processes, reducing idle time of computing units. The lack of adaptability of the computing kernel is overcome, and parameterized templates combined with task characteristics generate customized code, reducing the need for repeated manual optimization. The system's self-evolution capability is established, and the closed-loop feedback mechanism enables the performance prediction model to continuously accumulate execution experience, achieving iterative improvement in decision-making capabilities.

[0031] In a preferred embodiment of the present invention, step S1 specifically includes: S11: Extract the metadata of the computing task, the metadata including data size, dimension, sparsity and numerical precision; S12: Input the metadata into the performance prediction model, which is trained based on historical execution data and is used to predict the expected time consumption and energy efficiency under different execution paths; S13: Based on the prediction results, automatically decide whether to use a pure CPU, pure GPU, or CPU-GPU hybrid execution path, and determine the optimal thread organization structure when the GPU is executed; In this embodiment, metadata refers to the core characteristic quantification indicators of a computing task. These can be implemented using a combination of parameters such as data size, dimensionality, sparsity, and numerical precision, specifically used to characterize the differentiated computing resource requirements of a task. Data size can be understood as a measure of the total amount of data processed by the task, which can be quantified based on the number of bytes or elements, aiming to reflect memory bandwidth pressure and computational load intensity. Dimensionality can be understood as a representation of the structural complexity of the data, which can be described using a two-dimensional or three-dimensional spatial coordinate system, aiming to distinguish task types with different parallelization potential. Sparsity refers to the distribution characteristics of non-zero elements in the dataset, which can be based on compressed storage formats or zero-value proportions. The implementation aims to evaluate the efficiency of parallel computing and memory access patterns; numerical precision refers to the bit width specification of floating-point operations, which can be defined using half-precision, single-precision, or double-precision floating-point formats, with the aim of determining the arithmetic logic unit load characteristics of the computing unit; max-min normalization refers to the standardization process that eliminates differences in feature dimensions, which can use linear transformations to map the original features to a uniform numerical range, with the aim of ensuring fair contributions of features of different scales in the prediction model; linear equations refer to the mathematical modeling method for performance prediction, which can achieve quantitative output of time consumption and energy efficiency based on weighted linear combinations, with the aim of establishing an interpretable causal relationship between task characteristics and execution performance.

[0032] Specifically, the solution of this invention first extracts multi-dimensional metadata to construct a task feature vector, then uses max-min normalization to eliminate dimensional differences and form a standardized input, subsequently inputs the normalized feature vector into a performance prediction model to generate quantitative predictions of time consumption and energy efficiency, and finally automatically decides the optimal execution path and thread structure based on the prediction results. This process realizes a closed-loop data-driven mechanism from task feature quantification to resource allocation decision-making: the construction of metadata vectors ensures that task characteristics are fully captured, normalization processing ensures the comparability of feature values ​​and avoids large-scale features dominating the prediction process, linear equations accurately quantify the independent impact of each feature on performance through weight parameters, a historical data training mechanism allows model parameters to continuously adapt to changes in hardware status, and finally, the automatic decision-making mechanism transforms the prediction results into execution path selection and thread configuration instructions, thus forming a complete technical chain of feature extraction, quantitative modeling, performance prediction, and path decision-making.

[0033] As a specific implementation method, the present invention is implemented as follows: In the image segmentation task processing scenario, the system extracts the data scale (e.g., 10MB of pixel data), dimension (three-dimensional volume data), sparsity (0.3 non-zero voxel ratio), and numerical precision (32-bit floating point) of the input image to form a metadata vector; after normalization, this vector is input into the performance prediction model. The model calculates the pure CPU path time prediction value as 8.2 seconds and the energy efficiency prediction value as 0.45 based on the pre-trained parameters, and the pure GPU path time prediction value as 3.1 seconds and the energy efficiency prediction value as 0.78; the system automatically selects the GPU execution path based on the prediction results and determines a 128×128 thread block organization structure to match the parallel characteristics of the three-dimensional data; during the task execution process, the historical database records the metadata and actual performance indicators of this execution for subsequent periodic updates of the model parameters.

[0034] Through the above technical solutions, this invention achieves multi-dimensional quantitative representation of task characteristics and data-driven execution path decision-making, effectively avoiding decision bias caused by single-dimensional analysis; normalization processing eliminates the interference of feature dimension differences on prediction results, ensuring that low-to-medium scale features such as data size and dimensionality receive reasonable evaluation weights; the weight parameters in the linear equation system clearly express the causal relationship between features and performance, enabling path decision-making to accurately respond to dynamic changes in task sparsity, dimensionality, and other characteristics; the historical data training mechanism enables the prediction model to continuously adapt to hardware system characteristics, improving the long-term adaptability of path decision-making; the automatic decision-making mechanism eliminates the subjective limitations of empirical rules, ensuring that CPU and GPU resource allocation is always based on real-time quantitative analysis, thereby significantly improving the resource utilization efficiency and energy efficiency of heterogeneous computing systems.

[0035] In practical applications, some of the embodiments of the present invention proposed intelligent unified memory management to optimize resource collaborative configuration. However, in its implementation, the problems of data transmission and idle computing units are prominent. The lack of active prefetching and transparent paging mechanisms based on execution paths leads to frequent idle GPUs waiting for data migration. Furthermore, when the data processing scale exceeds the video memory capacity, manual intervention is required for data exchange, resulting in low computing efficiency and insufficient system robustness.

[0036] In a preferred embodiment of the present invention, the intelligent unified memory management in step S2 includes: S21: According to the execution path planning, perform an active prefetch operation on the data in the unified memory space to migrate the data required for computation to the GPU memory before the GPU kernel executes. The active prefetch operation refers to the mechanism of migrating data in advance according to the execution path planning. It can be implemented by a predictive prefetch strategy based on historical task characteristics or a dynamic triggering prefetch strategy based on real-time hardware status. The purpose is to ensure that the data required by the GPU kernel is ready when it starts up, and to eliminate the idle computing units caused by data waiting. S22: Implements a transparent paging mechanism that automatically swaps data between GPU memory and host memory when the data processing scale exceeds the GPU's video memory capacity. The transparent paging mechanism can be understood as an automatic handling of memory boundary issues. It can be implemented using a hardware-accelerated unified memory controller or a virtual memory management module at the operating system kernel level. Its purpose is to enable the system to maintain continuous execution without modifying application code when processing extremely large amounts of data, avoiding computational interruptions caused by video memory overflow.

[0037] Specifically, the solution of this invention uses execution path planning as the decision-making basis for proactive prefetching operations, ensuring that the timing of data migration precisely matches the GPU computing needs and that data is ready before the GPU kernel executes. Simultaneously, a transparent paging mechanism continuously monitors the video memory usage status, automatically triggering a data exchange process when the data size exceeds a capacity threshold, without application-layer intervention. Through unified memory space collaborative management, these two mechanisms form a closed-loop mechanism from data prefetching to boundary processing, effectively guaranteeing the continuity and reliability of data flow.

[0038] As a specific implementation method, the solution of the present invention is implemented as follows: In the image recognition task, the system predicts that the GPU will perform convolutional layer calculations according to the execution path planning determined in step S1, and migrates the next batch of image feature data from the host memory to the GPU memory in advance; when processing high-resolution satellite imagery causes the GPU memory resources to be scarce, the system automatically migrates inactive data pages to the host memory and swaps them in in real time when needed for subsequent calculations. The whole process is completely transparent to the application.

[0039] In a preferred embodiment of the present invention, the pipelined arrangement of computation and data transmission in step S2 is as follows: The data stream to be processed is divided into consecutive data batches, so that while the GPU is processing the Nth batch of data, the CPU is performing the preparation and transmission operations of the N+1th batch of data in parallel, thereby realizing pipeline parallelism of data transmission and kernel computation.

[0040] In this embodiment, data batch segmentation refers to dividing the overall data stream into independently processable sub-units. This can be achieved using a fixed-size segmentation strategy or a dynamic-size segmentation strategy based on task characteristics. The purpose is to provide basic structural support for pipelined operations and avoid the risk of blocking in overall data processing. The parallel operation of GPU and CPU can be understood as embedding the data transmission link into the GPU computing cycle through the staggered arrangement of tasks in the time dimension. This can be achieved using double-buffered memory technology or a circular buffer mechanism. The purpose is to eliminate the idle cycle of the GPU waiting for data to be ready.

[0041] Specifically, the scheme first divides the data stream to be processed into consecutive data batches, forming basic units that can be processed in parallel. Then, during execution, the GPU is configured to process the current Nth batch of data while the CPU is scheduled to execute the preparation and transmission operations for the next N+1th batch of data. This execution order arrangement allows data transmission operations and computation operations to overlap on the time axis. When the GPU completes the computation of the Nth batch, the N+1th batch of data is ready, thus avoiding the waiting state of the GPU. Finally, through the seamless connection between batches, the stability of system throughput is maintained, enabling heterogeneous hardware resources to achieve optimal collaboration under dynamic task loads.

[0042] As a specific embodiment, the solution of the present invention is implemented in an image processing scenario as follows: the video stream data is divided into batches of 10 frames each. While the GPU is processing the rendering calculation of the first batch (frames 1-10), the CPU simultaneously performs decoding and memory preloading operations for the second batch (frames 11-20). This process adopts a double-buffered memory structure, with one buffer for the GPU to read the current batch of data and the other buffer for the CPU to write the next batch of data. When the GPU finishes processing the current batch, it immediately switches to the prepared buffer, thereby achieving uninterrupted continuous processing.

[0043] In a preferred embodiment of the present invention, step S3 specifically comprises: S31: Provides parameterized kernel code templates, which contain dynamically configurable parameters, including loop unrolling factor, memory access mode, and shared memory usage. A parameterized kernel code template refers to a predefined code framework structure, which can be implemented using C++ template metaprogramming or string replacement techniques. Its purpose is to support runtime dynamic generation of customized code. The loop unrolling factor is a configuration parameter that controls the number of times the loop body is executed; it can be set to an integer value. Its purpose is to reduce branch instruction overhead and improve instruction-level parallelism efficiency. The memory access mode refers to the way data is organized and read in memory; it can be configured as continuous access or step-by-step access. Its purpose is to optimize data locality and reduce memory latency. Shared memory usage refers to the allocated size of the GPU shared memory region; it can be dynamically adjusted to the hardware-supported specifications. Its purpose is to maximize the use of limited shared resources and improve data access speed.

[0044] S32: During runtime, based on the computational feature metadata extracted in step S1, the optimal parameters are filled into the template to generate executable kernel code customized for the current task and hardware architecture.

[0045] Specifically, the solution of this invention uses the computational feature metadata extracted in step S1 as input to drive the instantiation process of the parameterized template. The system first loads a predefined kernel code template containing multiple configurable parameter points; then, based on the data size, dimension, and sparsity characteristics in the task metadata, it calculates the optimal parameter combination; finally, these parameters are filled into the template to generate executable code. This mechanism ensures that the kernel code can accurately match the current task requirements and hardware architecture characteristics, avoiding the limitations of static compilation, and simultaneously achieving a closed-loop association between task features and kernel parameters.

[0046] As a specific implementation, the parameterized kernel template can be implemented using CUDA C++ template classes. The loop unrolling factor controls the unrolling depth via compilation instructions, the memory access mode is configured by selecting a data layout strategy for either a structure array or an array-structure, and the shared memory usage is specified by a dynamic allocation function. At runtime, the system automatically selects the loop unrolling factor value based on the task's metadata characteristics, configures the step-size access mode for high-dimensional data, and allocates the shared memory size according to the GPU architecture characteristics, thereby generating highly optimized kernel code.

[0047] In a preferred embodiment of the present invention, the dynamic execution adjustment in step S4 includes: S41: Supports dynamic parallelism, allowing GPU threads to launch new nested kernels based on computation results during runtime; Supporting dynamic parallelism means that GPU threads can dynamically generate and launch new kernel execution units based on real-time computation status during execution. This can be achieved using the dynamic parallelism mechanism natively supported by the GPU hardware architecture, with the aim of enabling kernel execution to adaptively adjust task granularity based on intermediate computation results.

[0048] S42: Large tasks are broken down into multiple independent subtasks, and the kernels corresponding to these subtasks are scheduled to execute concurrently on the GPU. Task decomposition refers to breaking down large computational tasks into multiple logically independent subtask units with no data dependencies. This can be done based on the task's data partitioning strategy or computation graph topology, with the aim of improving the parallelism of the task. Concurrent execution refers to scheduling the kernels corresponding to multiple subtasks to run simultaneously on GPU computing resources. This can be achieved using the GPU's multi-stream concurrent execution engine, with the aim of ensuring that the computing units are constantly in a working state and reducing resource idle periods.

[0049] As a specific implementation method, the solution of the present invention is implemented as follows: In the image edge detection task, when the GPU thread processes the image data stream, if a high gradient region feature is detected, a new nested kernel can be dynamically started to perform local detail enhancement processing; at the same time, the entire image is divided into multiple continuous blocks, and the edge detection kernels corresponding to these blocks are scheduled to be executed concurrently on the GPU, so that the data processing process and the kernel startup operation form a dynamic pipeline.

[0050] In a preferred embodiment of the present invention, step S5 specifically includes: S51: For computational tasks that allow for error, a low-precision approximation computation mode is enabled to obtain the computational results, and a fast verification procedure is used to confirm the error range of the computational results. The low-precision approximation computation mode refers to a computational strategy that reduces the precision of numerical representation while meeting the task's precision tolerance threshold. It can be implemented using a hybrid precision computational architecture, a truncation iterative algorithm, or a probabilistic approximation computation technique. The purpose is to reduce floating-point operations and memory bandwidth consumption, thereby improving computational throughput. The fast verification procedure can be understood as a lightweight verification mechanism specifically for error boundary determination. It can be built based on interval arithmetic, fast residual convergence, or statistical sampling methods. Its purpose is to confirm the reliability of the results with an overhead far lower than that of full computation. S52: Record the complete context information of this task execution, including task metadata, resource configuration parameters and real-time performance indicators, into the historical database; the complete context information refers to a data set covering the entire link state of task execution. In practical applications, it may include task feature descriptors, resource allocation topology and performance counter snapshots. Its purpose is to establish an accurate mapping relationship between task attributes and system response. S53: Periodically retrain the performance prediction model using the historical database to achieve continuous self-optimization of the system; periodic retraining can be understood as a model iteration mechanism triggered by time or data volume thresholds, which can be implemented by incremental learning, online Bayesian update or sliding window retraining, with the aim of maintaining the dynamic consistency between the prediction model and the current hardware state.

[0051] In this embodiment, the present invention significantly reduces the load on computing units by dynamically enabling a low-precision computation mode for tasks with permissible error, while ensuring that the result error range is controllable. Simultaneously, complete contextual information of task execution is continuously injected into the historical database as training samples, enabling the performance prediction model to capture the deep correlation between resource allocation and performance indicators. Furthermore, by setting a reasonable training cycle interval, the model update frequency is ensured to match the system state change rate. These three elements form an organic closed loop: the validation data generated by low-precision computation, after rapid program confirmation, together with comprehensive contextual information, constitutes a high-quality training set; periodic model updates transform this experience into more accurate path decision-making capabilities, thereby guiding resource allocation strategies for subsequent tasks, ultimately achieving a synergistic improvement in system energy efficiency and execution efficiency.

[0052] As a specific implementation method, when processing large-scale matrix factorization tasks in scientific computing scenarios, for intermediate calculation stages where a relative error of 0.1% is allowed, the system automatically switches to FP16 half-precision calculation mode to perform matrix operations and calls a verification program based on the residual norm for fast convergence to confirm the error range of the results. At the same time, the system fully records the task metadata (including matrix dimension, sparsity, and numerical precision requirements), resource configuration parameters (such as the number of GPU stream processors allocated and memory bandwidth configuration), and real-time performance indicators (including computation time, energy efficiency ratio, and memory utilization) to the historical database. The system is set to automatically trigger the retraining process of the performance prediction model after accumulating 50 valid execution records, and incorporate the new data into the model parameter optimization process.

[0053] Figure 2 A structural diagram of a heterogeneous computing execution optimization system based on a closed-loop self-learning architecture is shown. As a preferred embodiment of the technical solution of the present invention, a heterogeneous computing execution optimization system based on a closed-loop self-learning architecture is also provided, applied to the above-mentioned heterogeneous computing execution optimization method based on a closed-loop self-learning architecture. The system 10 includes: The dynamic decision module 11 is used to perform meta-task analysis on the input computation task, extract its computational feature metadata, and dynamically decide on the execution path planning of the task between the CPU and GPU based on the pre-trained performance prediction model. The resource configuration module 12 is used to perform adaptive resource collaborative configuration according to the execution path planning, including but not limited to intelligent unified memory management, pipelined orchestration of computing and data transmission, and dynamic power consumption allocation. The code generation module 13 is used to generate heterogeneous awareness optimized kernel code based on the computational feature metadata and the current hardware state; the generation process includes parameterized kernel templates and just-in-time compilation technology. The dynamic adjustment module 14 is used to perform real-time performance monitoring and dynamic execution adjustment during the execution of the optimized kernel code, wherein the dynamic execution adjustment includes dynamic parallelism and concurrent kernel execution; The distillation module 15 is used to intelligently verify the calculation output results and feed back the task metadata, configuration parameters and performance data of this execution to the historical database to update the performance prediction model and form a closed-loop learning system.

[0054] Specifically, the dynamic decision-making module 11 is actually a task intelligent analysis and decision-making module used to execute step S1, including a metadata extraction unit and a performance prediction unit; the resource configuration module 12 can also be called an adaptive resource management module, used to execute step S2, including a unified memory management unit, a pipeline scheduling unit, and a power consumption management unit; the code generation module 13 can also be called a heterogeneous awareness kernel synthesis module, used to execute step S3, including a parameterized template library and a just-in-time compiler; the dynamic adjustment module 14 can also be called a dynamic execution and monitoring module, used to execute step S4, including a performance counter acquisition unit and a kernel scheduler; the distillation module 15 can also be called a feedback and learning closed-loop module, used to execute step S5, including a result verification unit and a historical database management unit.

[0055] The core innovation of this embodiment lies in combining the task intelligent analysis and decision-making module with the feedback and learning closed-loop module through a closed-loop feedback mechanism, and integrating the adaptive resource management module, heterogeneous perception kernel synthesis module, and dynamic execution and monitoring module. This achieves dynamic path decision-making based on task feature metadata, intelligent memory management, customized kernel generation, and continuous learning optimization. Specifically, the metadata extraction unit in the task intelligent analysis and decision-making module dynamically quantifies task attributes, and the performance prediction unit generates execution path predictions based on historical data, avoiding the rigidity of static scheduling strategies. The adaptive resource management module implements an active prefetching mechanism through a unified memory management unit, and the pipeline scheduling unit realizes parallel orchestration of data transmission and computation, effectively alleviating memory and data transmission bottlenecks. The heterogeneous perception kernel synthesis module uses a parameterized template library and a just-in-time compiler to generate context-customized kernel code, overcoming the problem of the lack of adaptability of the computation kernel. The dynamic execution and monitoring module works collaboratively with the feedback and learning closed-loop module, using a performance counter acquisition unit to monitor the status in real time and a historical database management unit to accumulate execution experience to update the prediction model, establishing the system's self-evolution capability.

[0056] Through the above technical solutions, this invention effectively solves the problems of rigid task scheduling strategies, prominent memory and data transmission bottlenecks, insufficient optimization and lack of adaptability of computing kernels, and lack of self-evolution and learning capabilities of the system. It significantly improves the overall efficiency and adaptability of heterogeneous computing systems and ensures optimal resource scheduling and energy efficiency balance under dynamically changing computing loads.

[0057] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A heterogeneous computing execution optimization method based on a closed-loop self-learning architecture, characterized in that, The method includes: Step S1: Perform meta-task analysis on the input computation task and extract its computational feature metadata; Step S2: Based on the pre-trained performance prediction model, dynamically decide on the execution path planning of the task between the CPU and GPU according to the computational feature metadata; Step S3: Perform adaptive resource collaborative configuration based on the execution path planning; Step S4: Generate optimized kernel code based on the computational feature metadata and the current hardware state; Step S5: Perform real-time performance monitoring and dynamic execution adjustments during the execution of the optimized kernel code; Step S6: Verify the calculation output results and feed the task data executed this time back to the historical database to update the performance prediction model.

2. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 1, characterized in that, Step S1 specifically includes: S11: Extract the metadata of the computing task, which includes data size, data dimension, data sparsity and numerical precision; S12: Construct a task feature vector based on the metadata; S13: Perform max-min normalization on the task feature vector to obtain a standardized feature vector.

3. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 2, characterized in that, Step S2 includes: S21: Input the standardized feature vector into the performance prediction model to generate time consumption prediction values ​​and energy efficiency prediction values ​​under different execution paths; S22: Select the execution path based on the predicted time consumption and energy efficiency; S23: When selecting a GPU execution path, determine the GPU thread organization structure; The execution paths include pure CPU execution paths, pure GPU execution paths, and CPU-GPU hybrid execution paths.

4. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 1, characterized in that, Step S3 includes unified memory management, which includes: S31: Perform proactive prefetching of data in the unified memory space according to the execution path plan; S32: Migrate data to GPU memory before the GPU kernel executes; S33: When the data size exceeds the GPU memory capacity, automatic data exchange is performed between the GPU memory and the host memory.

5. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 4, characterized in that, Step S3 further includes pipelined orchestration of computation and data transmission, specifically including: Divide the data to be processed into multiple consecutive data batches; While the GPU processes the Nth batch of data, the CPU performs the preparation and transmission operations for the N+1th batch of data, thus achieving pipelined parallelism between data transmission and kernel computation.

6. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 1, characterized in that, Step S4 includes: S41: Provides a parameterized kernel code template, which includes a loop unrolling factor, memory access mode, and shared memory usage. S42: Fill the parameters into the template according to the calculated feature metadata; S43: Generates executable kernel code through just-in-time compilation.

7. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 1, characterized in that, The dynamic execution adjustment in step S5 includes: S51: Supports dynamic parallelism, enabling GPU threads to launch nested kernels during runtime; S52: Break down large tasks into multiple subtasks; S53: Schedule the kernel corresponding to the subtask to be executed concurrently on the GPU.

8. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 1, characterized in that, Step S6 includes: S61: Enable low-precision approximation calculation mode for computation tasks that allow for error; S62: Use a verification procedure to confirm the error range of the calculation results.

9. The heterogeneous computing execution optimization method based on a closed-loop self-learning architecture according to claim 8, characterized in that, Step S6 further includes: S63: Record task metadata, resource configuration parameters, and real-time performance metrics to the historical database; S64: Retrain the performance prediction model using historical database data.

10. A heterogeneous computing execution optimization system based on a closed-loop self-learning architecture, applied to the heterogeneous computing execution optimization method based on a closed-loop self-learning architecture as described in any one of claims 1-9, characterized in that, The system's functions include: Meta-task analysis is performed on the input computational task to extract its computational feature metadata; Based on a pre-trained performance prediction model, the execution path planning of the task between CPU and GPU is dynamically determined according to the computational feature metadata. Adaptive resource collaborative configuration is performed based on the execution path planning; Optimized kernel code is generated based on the computational feature metadata and the current hardware state; Real-time performance monitoring and dynamic execution adjustments are performed during the execution of the optimized kernel code. The calculation output results are verified, and the task data executed this time is fed back to the historical database to update the performance prediction model.

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