Optical module debugging device

By automatically debugging the optical module device, the voltage and current of the optical module are automatically adjusted by using components such as the upper computer and the code error instrument, the problem of traditional manual debugging depends on experience, and the efficient automatic debugging and mass production adaptability of the optical module are achieved.

CN222169815UActive Publication Date: 2024-12-13WUHAN HUAGONG GENUINE OPTICS TECH CO LTD
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Patent Information

Application Number
CN202323343457.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2023-12-08
Publication Date
2024-12-13
Estimated Expiration
2033-12-08

AI Technical Summary

Technical Problem

The traditional method of debugging optical eye diagrams of optical modules relies on manual adjustment and experience, resulting in high uncertainty and is not suitable for large-scale mass production of optical modules, affecting technical iteration.

Method used

A device for automatically debugging optical modules is designed, including a test board, a computer, a code error meter, a metered module, a clock recovery unit, a wavelength division module, an optical switch and an oscilloscope. The metered module is automatically adjusted by a computer. The voltage and current of the code error meter and wavelength division module are used for automated testing and signal processing, and the optical eye diagram is generated and the index parameters are recorded.

Benefits of technology

It realizes automatic debugging of optical modules, reduces the experience dependence on debuggers, improves debugging efficiency and accuracy, and is suitable for large-scale mass production of optical modules.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides an optical module debugging device, which is characterized in that an optical module to be tested is located on a test board, and an upper computer controls the optical module to be tested through the test board; the upper computer is configured to automatically adjust the voltage and current of the tested optical module according to the optical eye diagram of the tested optical module, so that the power of the tested optical module meets the test requirement; the bit error tester is connected with the test board; the wavelength division module is connected with the tested optical module and the optical switch; the optical switch is connected with the wavelength division module and the clock recovery unit; the clock recovery unit is connected with the optical switch and the oscilloscope; and an oscilloscope. According to the optical module debugging method and device, the configured upper computer communicates with the micro-control unit of the tested optical module to debug the tested optical module, so that the performance of the tested optical module meets requirements, and automation of optical module debugging is achieved.
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Description

Technical Field

[0001] The present disclosure relates to optical transmission technology, and more specifically to an optical module debugging device. Background Art

[0002] The optical eye diagram is a graph displayed by accumulating a series of digital signals on an oscilloscope. It contains rich information. The influence of inter-symbol crosstalk and noise can be seen from the optical eye diagram, reflecting the overall characteristics of the digital signal, so as to judge the performance of the optical module. Therefore, the quality of the optical eye diagram of the optical module is one of the important indicators to measure the performance of the optical module.

[0003] The traditional method of debugging the optical eye diagram of an optical module is to debug it based on the technical indicator of the optical eye diagram, the extinction ratio (EXTRATIO). This method has high uncertainty and is very dependent on the debugging experience of the debugger when using the manual adjustment method. Even if the operating points of the lasers in the same batch are different, it is sometimes necessary to adjust the optical eye diagram back and forth to meet the requirements. At the same time, the traditional method of debugging the optical eye diagram is often manual debugging, which is not conducive to the large-scale mass production of optical modules and the iteration of optical module technology. Utility Model Content

[0004] In view of the above problems, the present disclosure provides an optical module debugging device for automatically debugging an optical module, comprising: a test board, a host computer, a bit error meter, an optical module under test, a clock recovery unit, a wavelength division module, an optical switch, and an oscilloscope; the optical module under test is located on the test board, and the host computer controls the optical module under test through the test board; the host computer is configured to automatically adjust the voltage and current of the optical module under test according to the optical eye diagram of the optical module under test, so that the power of the optical module under test meets the test requirements; the bit error meter is connected to the test board, and is used to generate a continuous test code element sequence of different code types, transmit it to the receiving end of the optical module under test on the test board, and receive the test code element sequence containing code errors returned by the optical module under test, and compare it code by code. Analyze and display the results of bit errors; the wavelength division module is connected to the optical module under test and the optical switch, and is used to receive the optical signal of the optical module under test, and transmit it to the optical switch after merging together; the optical switch is connected to the wavelength division module and the clock recovery unit, and is used to process the optical signal output by the wavelength division module, and perform physical switching or logical operations on the optical signal in the optical transmission line or the integrated optical circuit; the clock recovery unit is connected to the optical switch and the oscilloscope, and is used to receive and process the optical signal output by the optical switch, and provide the oscilloscope with the optical signal after clock recovery; the oscilloscope is connected to the clock recovery unit, and is used to show the optical eye diagram generated according to the optical signal, give the waveform of the optical signal changing with time and record various index parameters of the optical eye diagram.

[0005] According to an embodiment of the present disclosure, the optical module to be tested includes: a photoelectric receiving unit, which is used to convert the received optical signal into a weak electrical signal, and amplify and shape the electrical signal before transmitting it to the signal processing unit; a signal processing unit, which is connected to the photoelectric receiving unit, and is used to receive and process the electrical signal transmitted by the photoelectric receiving unit, shape it and send it to the optical emitting unit; an optical emitting unit, which is connected to the signal processing unit, and is used to convert the electrical signal sent by the signal processing unit into an optical signal output; a microcontroller unit, which is connected to the photoelectric receiving unit and the optical emitting unit, and is used to monitor the photoelectric receiving unit through an internal communication interface so that the voltage and current applied to the optical emitting unit reach the required values ​​and the output power meets the test requirements; a power control unit, which is connected to the photoelectric receiving unit, the signal processing unit, the optical emitting unit and the microcontroller unit, and is used to provide power and control the opening and closing of each unit.

[0006] According to an embodiment of the present disclosure, the light emitting unit includes an EML control circuit, an EML driving circuit and an EML laser; the EML driving circuit is connected to the signal processing unit, the EML control circuit and the EML laser, and is used to receive and transmit the electrical signal of the signal processing unit to the EML laser, adjust the driving current according to the signal sent by the EML control circuit, and adjust the power of the EML laser to a required value according to the driving current; the EML laser is connected to the EML control circuit and the EML driving circuit, and is used to convert the electrical signal transmitted by the EML driving circuit into an optical signal output according to the current, voltage and driving current adjusted by the EML control circuit; the EML control circuit is connected to the photoelectric receiving unit, the micro control unit, the EML driving circuit and the EML laser.

[0007] According to an embodiment of the present disclosure, the EML control circuit includes a DAC chip and a DC-DC circuit; the DAC chip is connected to the DC-DC circuit, the EML driving circuit, the micro control unit, and the EML laser, and is used to collect the power of the EML laser, adjust the driving current of the EML driving circuit according to the power, communicate with the micro control unit to adjust the voltage and current of the DAC chip to the required values, and adjust the voltage and current of the EML laser to the required values ​​according to the voltage and current of the DAC chip; the DC-DC circuit is connected to the DAC chip and the EML laser, and is used to receive the electrical signal of the DAC chip, provide a control signal to the EML laser, and stabilize the voltage of the EML laser at the required value.

[0008] According to an embodiment of the present disclosure, the DAC chip collects the power of the EML laser through a power meter and is connected to the micro control unit through an I2C bus.

[0009] According to an embodiment of the present disclosure, a microcontroller unit has a built-in digital-to-analog converter and an analog-to-digital converter for sampling a DAC chip.

[0010] According to an embodiment of the present disclosure, the measured light module further includes a temperature control unit connected to the light emitting unit and configured to enable the light emitting unit to operate at a preset temperature through an internal communication interface.

[0011] According to an embodiment of the present disclosure, the device further includes a communication board for implementing serial port communication between the test board and the host computer.

[0012] According to an embodiment of the present disclosure, the device also includes a power supply for powering the test board, the host computer, the bit error meter, the optical module under test, the clock recovery unit, the wavelength division module, the optical switch, and the oscilloscope.

[0013] According to the optical module debugging device provided by the present disclosure, the optical module under test is debugged by communicating with the microcontroller unit of the optical module under test through the configured host computer. Since the host computer is configured to automatically debug the current and voltage of the optical module under test, the technical problem of manual adjustment relying on experience is at least partially solved, and the technical effect of automatically debugging the performance of the optical module is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The above contents and other purposes, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0015] Figure 1 A schematic diagram showing the connection of components of an optical module debugging device according to an embodiment of the present disclosure;

[0016] Figure 2 A schematic diagram of an optical module according to an embodiment of the present disclosure is schematically shown;

[0017] Figure 3 The overall block diagram of the EML control circuit according to the embodiment of the present disclosure is schematically shown;

[0018] Figure 4 A block diagram schematically shows an implementation of the EML control circuit changing the IDAC value and VDAC value of the ADC DataRegisters in the DAC chip according to an embodiment of the present disclosure;

[0019] Figure 5 Schematically shows a flow chart of an optical eye diagram automatic debugging program configured by a host computer according to an embodiment of the present disclosure;

[0020] Figure 6 The functional schematic diagram of the optical module according to the embodiment of the present disclosure is schematically shown;

[0021] Figure 7 The figure schematically shows a framework diagram for realizing the functions of the 400G FR4 optical and electrical interfaces according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0023] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0024] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0025] Figure 1 The schematic diagram shows the connection diagram of each component of the optical module debugging device according to the embodiment of the present disclosure, as shown in FIG. Figure 1As shown, an embodiment of the present disclosure provides an optical module debugging device, including: a test board, a host computer, a bit error meter, an optical module under test, a clock recovery unit, a wavelength division module, an optical switch, and an oscilloscope; the optical module under test is located on the test board, and the host computer controls the optical module under test through the test board; the host computer is configured to automatically adjust the voltage and current of the optical module under test according to the optical eye diagram of the optical module under test, so that the power of the optical module under test meets the test requirements; the bit error meter is connected to the test board, and is used to generate a continuous test code element sequence of different code types, transmit it to the receiving end of the optical module under test on the test board, and receive the test code element sequence containing code errors returned by the optical module under test, and compare it code by code. If a certain code element is inconsistent, the code error count is increased by one, the number of code errors within a period of time is counted, and the record is stored, and the time period is calculated. The bit error rate within the test is analyzed and displayed. The result of the test bit error is analyzed and displayed. The wavelength division module is connected to the optical module under test and the optical switch, and is used to receive the optical signal of the optical module under test, and after the optical signals of multiple wavelengths are merged together through the multiplexer, they are coupled to the same optical fiber of the optical line and transmitted to the optical switch. The optical switch is connected to the wavelength division module and the clock recovery unit, and is used to process the optical signal output by the wavelength division module, and perform physical switching or logical operations on the optical signal in the optical transmission line or the integrated optical circuit. The clock recovery unit is connected to the optical switch and the oscilloscope, and is used to receive and process the optical signal output by the optical switch, and provide the oscilloscope with the optical signal after clock recovery. The oscilloscope is connected to the clock recovery unit, and is used to show the optical eye diagram generated according to the optical signal, give the waveform of the optical signal changing with time, and record various index parameters of the optical eye diagram.

[0026] On the basis of the above embodiments, the device also includes: a communication board, which is used to realize serial port communication between the test board and the host computer; a power supply, which is used to power the test board, the host computer, the bit error meter, the optical module under test, the clock recovery unit, the wavelength division module, the optical switch, and the oscilloscope; optical fiber, which serves as a carrier for optical signal transmission; and a communication line, which connects and ensures communication between various devices, the test board and the host computer.

[0027] like Figure 1 As shown in the figure, the test device is that the optical module to be tested is inserted into the test board, the light emitted by the transmitting end TX of the optical module first enters the wavelength division module, then enters the optical switch IN end, and is output from the optical switch COM end. The output light is connected to the clock recovery unit (CDR, Clock and Data Recovery) through the optical fiber, and the light is then output after the clock is recovered from the REC OUT end of the CDR through the optical fiber. The light output by the CDR is finally input into the oscilloscope. Finally, the optical eye diagram of the optical module is displayed on the oscilloscope, and the PC uses the host computer to control the optical module through the optical module test board.

[0028] like Figure 7As shown in the figure, 4 channels of light with a rate of 100 Gbps each enter the receiving end of the module from the RX end. The receiving end includes PIN, TIA, and optical DMUX (Demultiplexer). The optical DMUX demultiplexes the light from one optical fiber into 4 different wavelengths of light. The TIA converts the optical signal into an electrical signal. The electrical signal is divided into 4 channels, each with a rate of 100 Gbps. The electrical signal is then converted into 8 channels, each with a rate of 50 Gbps, according to the PAM4 in the protocol and transmitted to the electrical interface. The electrical signal is then shaped by the DSP and then converted by PAM4 into 4 channels of electrical signals, each with a rate of 100 Gbps, and transmitted to the PAM4 EAM driver. The PAM4 EAM driver reshapes the electrical signal again and transmits it to the transmitting end through the EML driving circuit. The transmitting end includes EML and optical MUX (Multiplexer). The optical MUX multiplexes 4 channels of light with different wavelengths of 100 Gbps each into one optical fiber, and the module transmits the optical signal through the optical fiber.

[0029] Figure 5 The flowchart of the automatic debugging program of the optical eye diagram configured by the host computer according to the embodiment of the present disclosure is shown schematically. Figure 5As shown in the figure, in step S1, debug the optical power, LD_BIAS, and VEA_BIAS, and control the optical power of each channel between 1 - 2 dBm. AP (Average Power) represents the current average optical power of each channel of the optical module. If the optical power is less than 1 dBm, increase LD_BIAS and decrease VEA_BIAS. If the optical power is greater than 2 dBm, decrease LD_BIAS and increase VEA_BIAS. The step of LD_BIAS is 2 mA, and the debug value of LD_BIAS is controlled between 50 - 70 mA. If it exceeds this range, only debug VEA_BIAS. S2: Debug the eye diagram, read the eye height Eye Height, linearity RLM, and optical power AP of the eye diagram, calculate the ratio K of Eye(lower)Height to {Eye(Middle)Height + Eye(upper)Height} / 2. If K is greater than 1.2, increase VEA_BIAS. If K is less than 0.8, decrease VEA_BIAS. The step of VEA_BIAS is 0.02 V, and control the K value between 0.8 - 1.2, then read RLM and AP. S3: Debug the ER (Extinction Ratio). Read the ER after debugging the eye diagram. If 4 dB < ER < 7.5 dB, it is okay. If ER < 4 dB, increase VEA_BIAS in steps of 0.05 V until ER > 4 dB is satisfied. If ER > 7.5 dB, decrease VEA_BIAS in steps of 0.05 V until satisfied. S4: AP debugging. After completing the ER debugging, use an optical power meter to read AP. If it does not meet 1 - 2 dBm, debug the LD_BIAS value in steps of 2 mA. S5: Eye diagram test: Read the values of ER, TDECQ, and RLM. If 4 < ER < 7.5, TDECQ < 3.5, and RLM > 0.9, the debugging is successful; otherwise, report an error. Calculate OMA Outer and OMA - TDECQ based on the AP value measured by the optical power meter. If 0.8 < OMA Outer < 4.2 and OMA - TDECQ > - 2.2, the debugging is successful; otherwise, report an error.

[0030] As Figure 5 shown, the method for debugging the optical eye diagram of the optical module is quantified. The configured host computer can communicate with the micro - control unit, so as to batch - debug the optical module that can change the power through the communication between the micro - control unit (MCU) and the DAC chip, which is beneficial to the large - scale production conversion of the optical module.

[0031] It should be noted that the present disclosure does not make special limitations on the debugging program, and the host computer can configure other debugging programs for adjustment.

[0032] Figure 2 Schematically shows a functional diagram of an optical module according to an embodiment of the present disclosure, as Figure 2As shown, the optical module under test is used to convert optical signals and electrical signals into each other, including: a photoelectric receiving unit, used to convert the received optical signal into a weak electrical signal, and amplify and shape the electrical signal and then transmit it to the signal processing unit; a signal processing unit, connected to the photoelectric receiving unit, used to receive and process the electrical signal transmitted by the photoelectric receiving unit, shape it and send it to the optical transmitting unit; an optical transmitting unit, connected to the signal processing unit, used to convert the electrical signal sent by the signal processing unit into an optical signal for output; a microcontroller unit, connected to the photoelectric receiving unit and the optical transmitting unit, used to monitor the photoelectric receiving unit through an internal communication interface, so that the voltage and current applied to the optical transmitting unit reach the required values, and the output power meets the test requirements; a power control unit, connected to the photoelectric receiving unit, the signal processing unit, the optical transmitting unit, and the microcontroller unit, used to provide power and control the opening and closing of each unit; a temperature control unit, connected to the optical transmitting unit, used to make the optical transmitting unit work at a preset temperature through an internal communication interface, and ensure that the optical transmitting unit can work normally and stably under changing temperatures; the microcontroller unit has built-in digital-to-analog converters and analog-to-digital converters for sampling the DAC chip.

[0033] like Figure 6 As shown, the light emitting unit includes an EML control circuit, an EML driving circuit and an EML laser; the EML driving circuit is connected to the signal processing unit, the EML control circuit and the EML laser, and is used to receive and transmit the electrical signal of the signal processing unit to the EML laser, adjust the driving current according to the signal sent by the EML control circuit, and adjust the power of the EML laser to a required value according to the driving current; the EML laser is connected to the EML control circuit and the EML driving circuit, and is used to convert the electrical signal transmitted by the EML driving circuit into an optical signal output according to the current, voltage and driving current adjusted by the EML control circuit; the EML control circuit is connected to the photoelectric receiving unit, the micro control unit, the EML driving circuit and the EML laser.

[0034] Figure 3 The overall block diagram of the EML control circuit according to the embodiment of the present disclosure is schematically shown. Figure 3 As shown, the EML control circuit includes a DAC chip and a DC-DC circuit; the DAC chip is connected to the DC-DC circuit, the EML driving circuit, the micro control unit, and the EML laser, and is used to collect the power of the EML laser, adjust the driving current of the EML driving circuit according to the power, communicate with the micro control unit to adjust the voltage and current of the DAC chip to the required values, and adjust the voltage and current of the EML laser to the required values ​​according to the voltage and current of the DAC chip; the DC-DC circuit is connected to the DAC chip and the EML laser, and is used to receive the electrical signal of the DAC chip, provide a control signal to the EML laser, and stabilize the voltage of the EML laser at the required value.

[0035] Among them, the DAC chip collects the power of the EML laser through a power meter and is connected to the micro control unit through the I2C bus.

[0036] Figure 4 The present invention schematically shows an implementation block diagram of the EML control circuit changing the IDAC value and VDAC value of the ADC Data Registers in the DAC chip according to an embodiment of the present invention. The EML control circuit changes the IDAC value and VDAC value of the ADC Data Registers in the DAC chip through communication between a microcontroller unit (MCU) and a DAC chip, so that the current (LD_BIAS) and voltage (VEA_BIAS) applied to the EML reach the required values, and the current and voltage loaded on the COC are changed, thereby changing the eye height (Eye Height), eye width (Eye width), extinction ratio ER (Extinction Ratio), TDECQ (Transmitter and Dispersion Eye closure for PAM4), average optical power (Average Power) and other parameters of the optical eye diagram of the module transmitter, so as to achieve the purpose of debugging and optimizing the module optical eye diagram and improve the performance of the module.

[0037] For example, Table 1 shows the optical eye diagram parameters of the optical module under test before and after automatic debugging. The optical eye diagram parameters of the optical module before automatic debugging are shown in the second column of the table. Figure 5 The optical eye diagram parameters of the module after automatic debugging by the host computer of the optical eye diagram automatic debugging program of the configuration shown in the table are shown in the third column. By debugging LD_bias and VEA_bias, the parameters such as the eye height (Eye Height), eye width (Eye width), extinction ratio (ER), TDECQ, average optical power (AveragePower) of the optical eye diagram of the optical module under test change accordingly, achieving the purpose of debugging and optimizing the optical eye diagram of the module and improving the performance of the module.

[0038] Table 1:

[0039] LD_bias(mA) 64 84 VEA_bias(v) 0.2 0.779 Average Power (dBm) 3.62 1.99 TDECQ(dB) N / A 1.74 ER(dB) 2.73 5.73 Linearity(CL_94) 0.76 0.964 Eye(upper)Height(μW) 6.1 134.8 Eye(Middle)Height(μW) 13.36 132.1 Eye(lower)Height(μW) 36.81 132.87 Eye(upper)Width(ps) 0.48 4.43 Eye(Middle)Width(ps) 1.38 3.95 Eye(lower)Width(ps) 3.21 4.23

[0040] It will be appreciated by those skilled in the art that the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways, even if such combinations and / or combinations are not explicitly described in the present disclosure. In particular, the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways without departing from the spirit and teachings of the present disclosure. All of these combinations and / or combinations fall within the scope of the present disclosure.

[0041] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. The scope of the present disclosure is defined by the attached claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. An optical module debugging device, characterized in that: include: Test board, host computer, bit error tester, optical module under test, clock recovery unit, wavelength division module, optical switch, oscilloscope; The optical module under test is located on the test board, and the host computer controls the optical module under test through the test board; the host computer is configured to automatically adjust the voltage and current of the optical module under test according to the optical eye diagram of the optical module under test, so that the power of the optical module under test meets the test requirements; A bit error meter, connected to the test board, is used to generate a continuous test symbol sequence of different code types, transmit the test symbol sequence to the receiving end of the optical module under test on the test board, receive the test symbol sequence containing the error code returned by the optical module under test, compare the error code one by one, analyze and display the error code result; A wavelength division module, connected to the optical module under test and the optical switch, for receiving the optical signal of the optical module under test, and transmitting the optical signal to the optical switch after merging them together; An optical switch, connected to the wavelength division module and the clock recovery unit, for processing the optical signal output by the wavelength division module, and performing physical switching or logical operations on the optical signal in the optical transmission line or the integrated optical circuit; A clock recovery unit, connected to the optical switch and the oscilloscope, for receiving and processing the optical signal output by the optical switch, and providing the oscilloscope with the optical signal after clock recovery; The oscilloscope is connected to the clock recovery unit and is used to show the optical eye diagram generated according to the optical signal, give the waveform of the optical signal changing with time and record various index parameters of the optical eye diagram.

2. The optical module debugging device according to claim 1, wherein: The measured light module comprises: The photoelectric receiving unit is used to convert the received optical signal into a weak electrical signal, amplify and shape the electrical signal, and then transmit it to the signal processing unit; A signal processing unit, connected to the photoelectric receiving unit, for receiving and processing the electrical signal transmitted by the photoelectric receiving unit, performing shaping processing, and sending the signal to the optical emitting unit; An optical emitting unit, connected to the signal processing unit, and configured to convert the electrical signal sent by the signal processing unit into an optical signal for output; A microcontrol unit is connected to the photoelectric receiving unit and the light emitting unit, and is used to monitor the photoelectric receiving unit through an internal communication interface so that the voltage and current applied to the light emitting unit reach the required values ​​and the output power meets the test requirements; The power control unit is connected to the photoelectric receiving unit, the signal processing unit, the light emitting unit and the micro control unit, and is used to provide power and control the opening and closing of each unit.

3. The optical module debugging device according to claim 2, wherein: The light emitting unit includes an EML control circuit, an EML driving circuit and an EML laser; The EML driving circuit is connected to the signal processing unit, the EML control circuit and the EML laser, and is used to receive and transmit the electrical signal of the signal processing unit to the EML laser, adjust the driving current according to the signal sent by the EML control circuit, and adjust the power of the EML laser to a desired value according to the driving current; The EML laser is connected to the EML control circuit and the EML driving circuit, and is used to convert the electrical signal transmitted by the EML driving circuit into an optical signal output according to the current, voltage and driving current adjusted by the EML control circuit; The EML control circuit is connected to the photoelectric receiving unit, the micro control unit, the EML driving circuit and the EML laser.

4. The optical module debugging device according to claim 3, wherein: The EML control circuit includes a DAC chip and a DC-DC circuit; The DAC chip is connected to the DC-DC circuit, the EML driving circuit, the micro control unit, and the EML laser, and is used to collect the power of the EML laser, adjust the driving current of the EML driving circuit according to the power, communicate with the micro control unit to adjust the voltage and current of the DAC chip to the required values, and adjust the voltage and current of the EML laser to the required values ​​according to the voltage and current of the DAC chip; The DC-DC circuit is connected to the DAC chip and the EML laser, and is used to receive the electrical signal of the DAC chip and provide a control signal to the EML laser so that the voltage of the EML laser is stabilized at a desired value.

5. The optical module debugging device according to claim 4, wherein: The DAC chip collects the power of the EML laser through a power meter and is connected to the micro control unit through an I2C bus.

6. The optical module debugging device according to claim 4, wherein: The microcontroller unit has a built-in digital-to-analog converter and an analog-to-digital converter for sampling the DAC chip.

7. The optical module debugging device according to claim 4, wherein: The measured light module also includes a temperature control unit connected to the light emitting unit and used to make the light emitting unit work at a preset temperature through an internal communication interface.

8. The optical module debugging device according to claim 1, wherein: The device also includes a communication board, which is used to realize serial port communication between the test board and the host computer.

9. The optical module debugging device according to claim 1, wherein: The device also includes a power supply for supplying power to the test board, the host computer, the bit error meter, the optical module to be tested, the clock recovery unit, the wavelength division module, the optical switch, and the oscilloscope.

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