Semiconductor device and method of double shielding
The double-shielding semiconductor device addresses the complexity and cost issues of conventional shielding by using a selective and conformal shielding layer with an insulating layer to isolate them, effectively reducing EMI loop currents and enhancing electrical performance.
Patent Information
- Application Number
- KR1020230068805
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-06-24
- Filing Date
- 2023-05-30
- Publication Date
- 2026-08-11
- Estimated Expiration
- 2043-05-30
AI Technical Summary
Conventional semiconductor package shielding methods are complex and costly due to the need for both selective and conformal shielding, as conformal shielding layers fail to prevent EMI loop currents from inducing electric and magnetic fields in sensitive components.
A double-shielding approach is implemented, comprising a selective shielding layer formed between conductive pillars and a conformal shielding layer, with an insulating layer isolating them to reduce EMI loop currents, thereby enhancing electrical performance and reducing manufacturing complexity and cost.
The double-shielding method effectively shields sensitive components from EMI while minimizing interference and manufacturing costs by isolating the selective and conformal layers, ensuring efficient electromagnetic interference reduction.