A DC current transformer broadband characteristic calibration device and method

Abstract

The present invention discloses a device and method for verifying the broadband characteristics of a DC current transformer, which belongs to the key technology of intelligent devices. The device of the present invention includes: a clock synchronization device, a message parsing device, a high-speed acquisition card, and a digital verification system. The digital verification system receives discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error results of the DC current transformer according to the discrete sampling data in a digital quantity verification mode. The digital verification system receives discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error results of the DC current transformer according to the discrete sampling data in an analog quantity verification mode. The present invention has the functions of broadband characteristic verification and steady-state error verification of a DC current transformer that can realize the output of analog quantity signals and digital quantity signals, can accurately measure the broadband error of a DC current transformer, and provides a technical means for accurately calibrating the broadband measurement characteristics of a DC current transformer.

Description

Technical Field

[0001] The present invention relates to the key technical field of intelligent devices, and more specifically to a device and method for verifying broadband characteristics of a direct current transformer. Background Art

[0002] With the advancement of the construction of the global energy Internet and the continuous development of DC power transmission, DC transformers are becoming more and more widely used. In order to ensure the safe, stable and reliable operation of the DC power transmission system, higher requirements are required for the measurement accuracy and reliability of DC transformers, and the need for DC transformer calibration and testing will gradually increase. National standards GB / T 26216.1 and GB / T 26216.2 specify requirements for DC accuracy, frequency response, cutoff frequency and step response of DC current transformers. Rapid measurement and response of current are also basic requirements of DC control and protection systems. These put forward strict requirements for the broadband measurement characteristics of DC current transformers. However, due to the limitations of test conditions, the existing test system only conducts DC accuracy tests on DC transformers, and the research on the verification technology of broadband measurement characteristics is relatively small, resulting in less broadband verification characteristic tests of DC current transformers. For DC current transformers with digital output, the wide-band characteristic verification of DC current transformers is more difficult than that of traditional AC transformers due to the need to parse the FT3 digital message and perform Fourier calculations on discrete digital signals to obtain ratio errors and angle errors. As a result, less research has been conducted.

[0003] As DC transmission technology becomes increasingly mature and the demand for broadband characteristic calibration of DC current transformers gradually increases, the domestic research on high-accuracy and broadband current measurement is mainly carried out by the China Institute of Metrology, China Electric Power Research Institute and some universities. They are currently actively carrying out scientific research related to broadband characteristic calibration of DC current transformers.

[0004] The utility model patent applied for by China Electric Power Research Institute Co., Ltd. is a wide-band current transformer calibrator (patent number: 201420466252.9), which uses a phase-locked amplifier and a digital multimeter to calibrate the wide-band characteristics of wide-band current transformers with analog output. The calibration frequency range is 50Hz~3000Hz, which is not suitable for DC current transformers with digital output; the invention patent applied for by the Electric Power Research Institute of Yunnan Power Grid Co., Ltd. is a DC voltage transformer frequency response detection device (patent number: 201621373266.1), which uses a frequency detection circuit and a waveform matching circuit to realize the calibration of the wide-band characteristics of the DC transformer with digital output, and is not suitable for DC transformers with analog output. The invention patents applied by the Electric Power Research Institute of Guangdong Power Grid Co., Ltd. include a high-precision high-voltage DC transformer calibrator (patent number: 201510007457.X) and a DC transformer calibrator compatible with analog and digital calibration functions (patent number: 201510270926.7). They use dual A / D sampling modules and a network communication module based on the IEC61850 protocol for frequency characteristic calibration of DC transformers with analog or digital outputs, with a frequency range of 50Hz to 1200Hz. The China Electric Power Research Institute has accumulated a lot of experience in the calibration of broadband characteristics of DC transformers, and is currently taking the lead in drafting a number of DC transformer-related verification procedures, power industry standards and enterprise standards to improve the technical specifications and calibration inspection standards of DC transformers. Summary of the invention

[0005] In view of the above problems, the present invention provides a device for checking broadband characteristics of a DC current transformer. The device of the present invention comprises: a clock synchronization device, which synchronously sends a synchronization trigger signal to a message analysis device and a high-speed acquisition card, wherein the synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer;

[0006] Message parsing device, when the message parsing device receives the synchronous trigger signal, the message parsing device receives the digital signal output by the DC transformer and parses it into discrete sampling data, and transmits the discrete sampling signal to the digital verification system via Ethernet

[0007] A high-speed acquisition card, wherein one analog input channel of the high-speed acquisition card receives an analog signal output by a standard mutual inductor and converts the analog signal into discrete sampling data after sampling, and transmits the discrete sampling data to a digital verification system through a PXI bus; two analog input channels of the high-speed acquisition card receive analog signals output by a standard mutual inductor and a DC mutual inductor and convert the analog signal into discrete sampling data after sampling, and transmits the discrete sampling data to a digital verification system through a PXI bus;

[0008] The digital verification system receives discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the digital quantity verification mode. The digital verification system receives discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the analog quantity verification mode.

[0009] Optionally, the digital signal is an IEC61850 message or an FT3 message.

[0010] Optionally, the message parsing device adopts an FPGA parallel processing design architecture and a PPC8313 embedded processor.

[0011] Optionally, the message parsing device has an Ethernet port supporting IEC61850 messages, an ST optical fiber port for FT3 messages, an optical synchronization port for PPS and IRIG-B, and an Ethernet communication port.

[0012] Optionally, the message parsing device receives the IEC61850 message or FT3 message output by the DC transformer, decodes and performs serial-to-parallel conversion in the FPGA parallel processing design architecture, buffers the received message, and then transmits it to the PPC8313 embedded processor via a parallel bus. The PPC8313 embedded processor packages the message transmitted by the FPGA parallel processing design architecture into discrete sampling data.

[0013] Optionally, the high-speed acquisition card is a PXIe-5922 acquisition card, which includes two analog signal input ports, an external synchronous trigger port and a PXI bus interface, and the sampling rate of the high-speed acquisition card is set to 2 MHz.

[0014] Optionally, the digital verification system is a hardware platform based on the X86 architecture and Windows operating system, and is installed with host computer software developed based on LabVIEW software.

[0015] Optionally, an analog quantity verification mode and a digital quantity verification mode are set in the upper computer software of the digital verification system to realize the verification function of the analog quantity and digital quantity output DC transformer.

[0016] Optionally, after receiving the discrete sampling data output by the message parsing device and the high-speed acquisition card, the digital verification system performs discrete Fourier transform on the two sets of discrete sampling data to obtain the amplitude and phase information of the discrete sampling signals of the standard transformer and the DC transformer at each frequency.

[0017] Optionally, the host computer software of the digital calibration system displays the sampling waveforms of the standard transformer and the DC transformer, has a message parsing device and high-speed acquisition card parameter setting function and error result display function, and exports the measurement results to an Excel file.

[0018] Optionally, the clock synchronization device adopts an FPGA system based on the NIOS kernel, generates a high-frequency pulse signal by receiving an external synchronization signal or an internal high-precision crystal oscillator, generates a 1Hz pulse signal after frequency division, and inputs it into a message parsing device and a high-speed acquisition card for synchronous acquisition of the digital signal or analog signal of the DC transformer and the analog signal of the standard transformer, and outputs the clock synchronization signal to the DC transformer through the ST optical fiber port or the BNC coaxial cable port, so that the DC transformer synchronously outputs the digital signal.

[0019] Optionally, the clock synchronization device generates a synchronization pulse signal by receiving an external synchronization signal, and the signal acquisition of the verification device is synchronized with the external.

[0020] The present invention also provides a method for verifying broadband characteristics of a DC transformer, the method comprising:

[0021] The clock synchronization device sends a synchronization trigger signal to the message analysis device and the high-speed acquisition card synchronously. The synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer;

[0022] In the digital quantity verification mode, when the message parsing device and the high-speed acquisition card receive a synchronous trigger signal, the message parsing device receives the digital quantity signal output by the DC transformer and parses it into discrete sampling data, and transmits the discrete sampling signal to the digital verification system through Ethernet. An analog quantity input channel of the high-speed acquisition card receives the analog quantity signal output by the standard transformer and samples the analog quantity signal and converts it into discrete sampling data, and transmits the discrete sampling data to the digital verification system through the PXI bus;

[0023] In analog verification mode, when the high-speed acquisition card receives a synchronous trigger signal, the two analog input channels of the high-speed acquisition card receive the analog signals output by the standard transformer and the DC transformer, sample the analog signals, and convert them into discrete sampling data, which are then transmitted to the digital verification system through the PXI bus.

[0024] The digital verification system receives discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the digital quantity verification mode. The digital verification system receives discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the analog quantity verification mode.

[0025] The advantages of the present invention are:

[0026] The present invention has the functions of broadband characteristic verification and steady-state error verification of a DC current transformer capable of realizing analog signal and digital signal output, supports IEC61850 and FT3 digital message protocols, has the functions of displaying sampling waveforms of standard transformers and transformers under test and exporting measurement results to Excel, can accurately measure the broadband error of a DC current transformer, and provides a technical means for accurately calibrating the broadband measurement characteristics of a DC current transformer. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a structural diagram of a DC transformer broadband characteristic calibration device of the present invention;

[0028] Figure 2 The present invention is a flow chart of a method for verifying broadband characteristics of a DC transformer. DETAILED DESCRIPTION

[0029] Now, exemplary embodiments of the present invention are described with reference to the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to disclose the present invention in detail and completely and to fully convey the scope of the present invention to those skilled in the art. The terms used in the exemplary embodiments shown in the accompanying drawings are not intended to limit the present invention. In the accompanying drawings, the same units / elements are marked with the same reference numerals.

[0030] Unless otherwise specified, the terms (including technical terms) used herein have the commonly understood meanings to those skilled in the art. In addition, it is understood that the terms defined in commonly used dictionaries should be understood to have the same meanings as those in the context of the relevant fields, and should not be understood as idealized or overly formal meanings.

[0031] The present invention provides a DC transformer broadband characteristic calibration device, such as Figure 1 As shown, the device of the present invention comprises:

[0032] The clock synchronization device uses an FPGA system based on the NIOS kernel. It generates a high-frequency pulse signal by receiving an external synchronization signal or an internal high-precision crystal oscillator. After frequency division, it generates a 1Hz pulse signal, which is input into the message parsing device and the high-speed acquisition card for synchronous acquisition of the digital signal or analog signal of the DC transformer and the analog signal of the standard transformer. It outputs the clock synchronization signal to the DC transformer through the ST optical fiber port or the BNC coaxial cable port, so that the DC transformer synchronously outputs the digital signal. The clock synchronization device generates a synchronization pulse signal by receiving an external synchronization signal, and the signal acquisition of the verification device is synchronized with the external.

[0033] The clock synchronization device sends a synchronization trigger signal to the message analysis device and the high-speed acquisition card synchronously. The synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer;

[0034] The message parsing device adopts an FPGA parallel processing design architecture and a PPC8313 embedded processor, and has an Ethernet port supporting IEC61850 messages, an ST optical fiber port for FT3 messages, an optical synchronization port for PPS and IRIG-B, and an Ethernet communication port. When the message parsing device receives a synchronization trigger signal, the message parsing device receives an IEC61850 message or an FT3 message output by a DC transformer, decodes and performs serial-to-parallel conversion in the FPGA parallel processing design architecture, buffers the received message, and then transmits it to the PPC8313 embedded processor through a parallel bus. The PPC8313 embedded processor packages the message transmitted by the FPGA parallel processing design architecture into discrete sampling data, and transmits the discrete sampling signal to the digital verification system through Ethernet.

[0035] High-speed acquisition card, the high-speed acquisition card is a PXIe-5922 acquisition card, the high-speed acquisition card includes two analog signal input ports, an external synchronous trigger port and a PXI bus interface, the sampling rate of the high-speed acquisition card is set to 2MHz, an analog input channel of the high-speed acquisition card receives the analog signal output by the standard mutual inductor and converts the analog signal into discrete sampling data after sampling, and transmits the discrete sampling data to the digital verification system through the PXI bus, and two analog input channels of the high-speed acquisition card receive the analog signal output by the standard mutual inductor and the DC mutual inductor and convert the analog signal into discrete sampling data after sampling, and transmit the discrete sampling data to the digital verification system through the PXI bus;

[0036] Digital verification system, the digital verification system is a hardware platform based on X86 architecture and Windows operating system. The host computer software of the digital verification system displays the sampling waveforms of the standard transformer and the DC transformer, has the function of setting parameters of the message parsing device and the high-speed acquisition card and the function of displaying the error results, and exports the measurement results to an Excel file. The digital verification system is installed with a host computer software developed based on LabVIEW software. The analog quantity verification mode and the digital quantity verification mode are set in the host computer software to realize the verification function of the analog quantity and digital quantity output DC transformer. The discrete sampling data received from the message parsing device and the high-speed acquisition card are used to calculate the broadband error and steady-state error results of the DC transformer according to the discrete sampling data in the digital quantity verification mode. The digital verification system receives the discrete sampling data output by the high-speed acquisition card and calculates the broadband error and steady-state error results of the DC transformer according to the discrete sampling data in the analog quantity verification mode. Specifically, after receiving the discrete sampling data output by the message parsing device and the high-speed acquisition card, the digital verification system performs discrete Fourier transform on the two groups of discrete sampling data respectively to obtain the amplitude and phase information of the discrete sampling signals of the standard transformer and the DC transformer at each frequency.

[0037] The present invention also provides a method for verifying the broadband characteristics of a DC transformer, such as Figure 2 As shown, specifically including:

[0038] The clock synchronization device sends a synchronization trigger signal to the message analysis device and the high-speed acquisition card synchronously. The synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer;

[0039] In the digital quantity verification mode, when the message parsing device and the high-speed acquisition card receive a synchronous trigger signal, the message parsing device receives the digital quantity signal output by the DC transformer and parses it into discrete sampling data, and transmits the discrete sampling signal to the digital verification system through Ethernet. An analog quantity input channel of the high-speed acquisition card receives the analog quantity signal output by the standard transformer and samples the analog quantity signal and converts it into discrete sampling data, and transmits the discrete sampling data to the digital verification system through the PXI bus;

[0040] In analog verification mode, when the high-speed acquisition card receives a synchronous trigger signal, the two analog input channels of the high-speed acquisition card receive the analog signals output by the standard transformer and the DC transformer, sample the analog signals, and convert them into discrete sampling data, which are then transmitted to the digital verification system through the PXI bus.

[0041] The digital verification system receives discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the digital quantity verification mode. The digital verification system receives discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the analog quantity verification mode.

[0042] The present invention has the functions of broadband characteristic verification and steady-state error verification of a DC current transformer capable of realizing analog signal and digital signal output, supports IEC61850 and FT3 digital message protocols, has the functions of displaying sampling waveforms of standard transformers and transformers under test and exporting measurement results to Excel, can accurately measure the broadband error of a DC current transformer, and provides a technical means for accurately calibrating the broadband measurement characteristics of a DC current transformer.

Claims

1. A DC transformer broadband characteristic calibration device, characterized in that: The device comprises: The clock synchronization device synchronously sends a synchronization trigger signal to the message analysis device and the high-speed acquisition card, and the synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer; Message parsing device, when the message parsing device receives the synchronous trigger signal, the message parsing device receives the digital signal output by the DC transformer and parses it into discrete sampling data, and transmits the discrete sampling signal to the digital verification system via Ethernet A high-speed acquisition card, wherein one analog input channel of the high-speed acquisition card receives an analog signal output by a standard mutual inductor and converts the analog signal into discrete sampling data after sampling, and transmits the discrete sampling data to a digital verification system through a PXI bus; two analog input channels of the high-speed acquisition card receive analog signals output by a standard mutual inductor and a DC mutual inductor and convert the analog signal into discrete sampling data after sampling, and transmits the discrete sampling data to a digital verification system through a PXI bus; The digital verification system receives the discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer according to the discrete sampling data in the digital quantity verification mode. The digital verification system receives the discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer according to the discrete sampling data in the analog quantity verification mode. The digital verification system is a hardware platform based on X86 architecture and Windows operating system, and is installed with host computer software developed based on LabVIEW software; The upper computer software of the digital verification system is provided with an analog quantity verification mode and a digital quantity verification mode to realize the verification function of the analog quantity and digital quantity output DC transformer; The upper computer software of the digital calibration system displays the sampling waveforms of the standard mutual inductor and the DC mutual inductor, has a message parsing device and a high-speed acquisition card parameter setting function and an error result display function, and exports the measurement results to an Excel file.

2. The device according to claim 1, characterized in that The digital signal is an IEC61850 message or an FT3 message.

3. The device according to claim 1, characterized in that The message parsing device adopts FPGA parallel processing design architecture and PPC8313 embedded processor.

4. The device according to claim 1, characterized in that The message parsing device has an Ethernet port supporting IEC61850 messages, an ST optical fiber port supporting FT3 messages, an optical synchronization port of PPS and IRIG-B, and an Ethernet communication port.

5. The device according to claim 1, characterized in that The message parsing device receives the IEC61850 message or FT3 message output by the DC transformer, decodes and performs serial-to-parallel conversion in the FPGA parallel processing design architecture, buffers the received message, and then transmits it to the PPC8313 embedded processor through a parallel bus. The PPC8313 embedded processor packages the message transmitted by the FPGA parallel processing design architecture into discrete sampling data.

6. The device according to claim 1, characterized in that The high-speed acquisition card is a PXIe-5922 acquisition card, which includes two analog signal input ports, an external synchronous trigger port and a PXI bus interface. The sampling rate of the high-speed acquisition card is set to 2MHz.

7. The device according to claim 1, characterized in that After receiving the discrete sampling data output by the message parsing device and the high-speed acquisition card, the digital verification system performs discrete Fourier transform on the two groups of discrete sampling data to obtain the amplitude and phase information of the discrete sampling signals of the standard mutual inductor and the DC mutual inductor at each frequency.

8. The device according to claim 1, characterized in that The clock synchronization device adopts an FPGA system based on the NIOS kernel, generates a high-frequency pulse signal by receiving an external synchronization signal or an internal high-precision crystal oscillator, generates a 1Hz pulse signal after frequency division, and inputs it into a message parsing device and a high-speed acquisition card for synchronous acquisition of a digital signal or an analog signal of a DC transformer and an analog signal of a standard transformer, and outputs a clock synchronization signal to the DC transformer through an ST optical fiber port or a BNC coaxial cable port, so that the DC transformer synchronously outputs a digital signal.

9. The device according to claim 1, characterized in that The clock synchronization device generates a synchronization pulse signal by receiving an external synchronization signal, and the signal acquisition of the verification device is synchronized with the external device.

10. A method for verifying broadband characteristics of a DC transformer, characterized in that: The method comprises: The clock synchronization device sends a synchronization trigger signal to the message analysis device and the high-speed acquisition card synchronously. The synchronization trigger signal triggers the high-speed acquisition card and the message analysis device to simultaneously receive the analog signal output by the standard transformer and the digital signal output by the DC transformer; the synchronization trigger signal triggers the high-speed acquisition card to simultaneously receive the analog signal output by the standard transformer and the DC transformer; In the digital quantity verification mode, when the message parsing device and the high-speed acquisition card receive a synchronous trigger signal, the message parsing device receives the digital quantity signal output by the DC transformer and parses it into discrete sampling data, and transmits the discrete sampling signal to the digital verification system through Ethernet. An analog quantity input channel of the high-speed acquisition card receives the analog quantity signal output by the standard transformer and samples the analog quantity signal and converts it into discrete sampling data, and transmits the discrete sampling data to the digital verification system through the PXI bus; In analog verification mode, when the high-speed acquisition card receives a synchronous trigger signal, the two analog input channels of the high-speed acquisition card receive the analog signals output by the standard transformer and the DC transformer, sample the analog signals, and convert them into discrete sampling data, which are then transmitted to the digital verification system through the PXI bus. The digital verification system receives discrete sampling data from the message parsing device and the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the digital quantity verification mode. The digital verification system receives discrete sampling data output by the high-speed acquisition card, and calculates the broadband error and steady-state error of the DC transformer based on the discrete sampling data in the analog quantity verification mode.

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