A control circuit, module and chip for improving coupling of LED display screens

Abstract

The control circuit for improving coupling of an LED display screen comprises first, second and third delay circuits which are different in delay time and connected in parallel with each other; wherein the input ends of the first, second and third delay circuits are connected with each other to form an input end of the control circuit and receive a same PWM signal; and the output ends of the first, second and third delay circuits are connected with each other to form an output end of the control circuit and output the PWM signal delayed by the first, second or third delay circuit to a channel module for driving the channel module to open or close each display channel of the LED display screen. The control circuit delays the start time of conduction of each display channel to reduce the heavy load effect of the power supply and the switching coupling effect of the channel output port, thereby improving the low-gray horizontal stripe phenomenon and the medium-contrast coupling phenomenon, respectively, and improving the quality of the display picture.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuits, and particularly relates to a control circuit, a module and a chip for improving coupling of an LED display screen. BACKGROUND

[0002] Main factors of the coupling phenomenon of the LED display screen include: 1. The display screen with high refresh rate must be accompanied by the increase of clock frequency, and the increase of frequency must be accompanied by the increase of switching speed of the device, and the increase of coupling effect must be accompanied by the increase. 2. The influence of various parasitic parameters on the PCB board, such as PCB board wiring, lamp bead parameters, etc.

[0003] In order to solve the above-mentioned coupling phenomenon of the LED display screen, the existing method adjusts each row of display, fixes the end time of the row display, displays the gray data in the reverse scanning mode, and opens from the back to the front from the end position of the row. If the gray data of the red, green and blue chip channels are inconsistent, the coupling effect caused by the opening of the channels at the same time can be avoided, and the coupling can be reduced. Moreover, the above-mentioned method cannot well solve the horizontal stripe and medium contrast display problems in the case of the same gray value of the red, green and blue chip channels, because:

[0004] ① The power supply VDD on the energy-saving screen is usually 3.8V, and the traditional constant current driving IC will be identified as heavy load effect and current limited when the R / G / B chips are opened at the same time in low gray display, and the row line voltage will drop down, and the more the opened LEDs, the greater the drop of the row line voltage. At the same time, due to the difference in power supply of the row driving IC at different positions and the difference in the impedance of the row channel itself, the display screen presents horizontal stripe display difference, which is called horizontal stripe. In the case of low gray value, it is more prominent. If the R / G / B is closed uniformly (the back alignment mode), the chips are closed at the same time, which will also cause the coupling of the row pipe, and the row pipe voltage will rise, which will cause the corresponding row pipe to be slightly bright, and the low gray display brightness will be enhanced, thereby causing color difference. The principle diagram is shown in 1.

[0005] ② The LED display screen has complex display characteristics of gray brightness and color, and the displayed image sometimes has high-brightness part contrast to dark area, such as the superposition of bright or dark image on the low gray background of the display screen module, which will form color deviation, color deviation, row deviation, etc. in the low gray area, which is called medium contrast phenomenon.

[0006] The specific causes of these phenomena are actually caused by the low gray display being easily affected by the coupling effect. Since the LED gray brightness is dispersed into different subframes, the gray level is expressed by the cumulative lighting time of the LED lamp in each frame period, and the image is displayed. Referring toFigure 2 In the low gray subframe, it is most easily affected by the high light subframe, causing the red, green and blue chips to be deepened in the OUT opening depth, either due to the same direction coupling effect of different row line opening moments, or the reverse coupling to the different row line closing moments, causing the middle contrast problem. SUMMARY

[0007] In view of the defects in the prior art, the application provides a control circuit, a module and a chip for improving the coupling of an LED display screen, which improves the low gray horizontal stripe and middle contrast problems caused by the coupling effect of the LED display screen, and improves the picture quality.

[0008] In a first aspect, a control circuit for improving the coupling of an LED display screen includes first, second and third delay circuits with different delay times.

[0009] The first, second and third delay circuits are connected in parallel with each other; the input ends of the first, second and third delay circuits are connected to each other to form the input end of the control circuit, which receives the same PWM signal; the output ends of the first, second and third delay circuits are connected to each other to form the output end of the control circuit, which outputs the PWM signal delayed by the first, second or third delay circuit to the channel module for driving the LED display screen to open or close each display channel.

[0010] Preferably, the first delay circuit includes a switch SW1; the input end of the first delay circuit is connected to the output end of the first delay circuit through the series connection of the switch SW1.

[0011] Preferably, the second delay circuit includes a first flip-flop and a switch SW2; the input end of the second delay circuit is connected to the input end of the first flip-flop, the clock end of the first flip-flop is connected to an external clock, and the output end of the first flip-flop is connected to the output end of the second delay circuit through the series connection of the switch SW2.

[0012] Preferably, the third delay circuit includes a second flip-flop, a third flip-flop and a switch SW3; the input end of the third delay circuit is connected to the input end of the second flip-flop, the clock end of the second flip-flop is connected to the external clock, the output end of the second flip-flop is connected to the input end of the third flip-flop, the clock end of the third flip-flop is connected to the external clock, and the output end of the third flip-flop is connected to the output end of the third delay circuit through the series connection of the switch SW3.

[0013] Preferably, the first, second and third flip-flops are D flip-flops.

[0014] In a second aspect, a control module for improving the coupling of an LED display screen includes N control circuits as described in the first aspect; wherein all control circuits are connected in parallel with each other.

[0015] Preferably, N is a multiple of 2.

[0016] Thirdly, a control chip for improving the coupling of LED displays.

[0017] The control chip is equipped with a data port, a clock port, and N output ports; the control chip includes a digital processing unit, the control module described in the second aspect, and a channel module;

[0018] The control chip's data port is connected to the input terminal of the digital processing unit, the control chip's clock port is connected to the clock terminal of the digital processing unit, and the output terminal of the digital processing unit includes N register output terminals. Different register output terminals in the digital processing unit are respectively connected to the input terminals of different control circuits in the control module. The output terminals of different control circuits in the control module are respectively connected to different input terminals in the channel module, and different output terminals in the channel module are respectively connected to different output ports in the control chip.

[0019] Preferably, the output terminal of the digital processing unit further includes a clock output terminal, which outputs the external clock.

[0020] As can be seen from the above technical solutions, the control circuit, module and chip for improving LED display coupling provided by the present invention are particularly suitable for PWM type LED display control chips. The on-start time of the staggered R / G / B display channels can be adjusted by registers, which reduces the heavy load effect of the power supply and the switching coupling effect of the channel output port, thereby improving the low gray horizontal stripe phenomenon and the mid-contrast coupling phenomenon respectively, improving the display effect of the LED display and improving the quality of the display image. Attached Figure Description

[0021] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0022] Figure 1 A schematic diagram of the LED display principle provided for the background technology.

[0023] Figure 2 A control timing diagram is shown in the conventional method provided for the background technology.

[0024] Figure 3 The circuit diagram is for the control circuit provided in Embodiment 1 of the present invention.

[0025] Figure 4 for adjusting the opening position of the control circuit. Figure 3 for adjusting the opening position of the control circuit.

[0026] Figure 5 for adjusting the closing position of the control circuit. Figure 3 for adjusting the closing position of the control circuit.

[0027] Figure 6 a module diagram of the control chip provided for the third embodiment of the present application. DETAILED DESCRIPTION

[0028] The embodiments of the technical solutions of the present application will be described in detail below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present application, and therefore only serve as examples, and cannot limit the protection scope of the present application. It should be noted that, unless otherwise specified, the technical terms or scientific terms used in the present application should be understood as the usual meanings understood by the skilled in the art to which the present application belongs.

[0029] It should be understood that, when used in the present specification and the appended claims, the terms "comprise" and "include" indicate the presence of described features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or sets thereof.

[0030] It should also be understood that the terms used in the present application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the present application specification and the appended claims, unless otherwise specified by the context, the singular forms "a", "an" and "the" are intended to include the plural forms.

[0031] Embodiment one:

[0032] A control circuit for improving the coupling of an LED display screen, referring to Figure 3 , comprising a first delay circuit, a second delay circuit and a third delay circuit with different delay times;

[0033] The first delay circuit, the second delay circuit and the third delay circuit are connected in parallel with each other; wherein the input ends of the first delay circuit, the second delay circuit and the third delay circuit are connected to each other to form the input end of the control circuit, and receive the same PWM signal; the output ends of the first delay circuit, the second delay circuit and the third delay circuit are connected to each other to form the output end of the control circuit, and output the PWM signal delayed by the first delay circuit, the second delay circuit or the third delay circuit to the channel module, for the channel module to drive each display channel of the LED display screen to open or close.

[0034] Specifically, the first delay circuit, the second delay circuit and the third delay circuit are used to output the same PWM signal after different time delays to the channel module, so as to drive the channel module to open or close each display channel in the LED display screen. In this way, each display channel (including the red, green and blue display channels) in the LED display screen can be opened or closed at different time nodes, so as to stagger the start time of conduction or the end time of closing in the R / G / B display channels, reduce the heavy load effect of the power supply and the switching coupling effect of the channel output port, thereby respectively improving the low-gray horizontal stripe phenomenon and the medium-contrast coupling phenomenon, improving the display effect of the LED display screen and the quality of the display picture.

[0035] The circuit detects the display data (i.e. the PWM signal) of each frame. When the PWM signal comes, the specified GCLK number is opened through time delay, so as to stagger the display position.

[0036] Preferably, the first delay circuit comprises a switch SW1; the input end of the first delay circuit is connected to the output end of the first delay circuit through the switch SW1 in series.

[0037] Preferably, the second delay circuit comprises a first flip-flop and a switch SW2; the input end of the second delay circuit is connected to the input end of the first flip-flop, the clock end of the first flip-flop is connected to an external clock, and the output end of the first flip-flop is connected to the output end of the second delay circuit through the switch SW2 in series.

[0038] Preferably, the third delay circuit comprises a second flip-flop, a third flip-flop and a switch SW3; the input end of the third delay circuit is connected to the input end of the second flip-flop, the clock end of the second flip-flop is connected to the external clock, the output end of the second flip-flop is connected to the input end of the third flip-flop, the clock end of the third flip-flop is connected to the external clock, and the output end of the third flip-flop is connected to the output end of the third delay circuit through the switch SW3 in series. The first flip-flop, the second flip-flop and the third flip-flop are all D flip-flops.

[0039] Specifically, the delay circuit is used to stagger the opening and closing positions of the R / G / B display channels by GCLK integer times. After the PWM signal is processed by the above three delay circuits, the driving signal PWM' is obtained. The above three delay circuits obtain different PWM' signals by selecting different switch connections. When the switch SW1 is selected and the switches SW2 and SW3 are disconnected, the PWMW signal is directly output without processing. When the switch SW2 is selected and the switches SW1 and SW3 are disconnected, the PWMW signal is output after being delayed by one D flip-flop. When the switch SW3 is selected and the switches SW1 and SW2 are disconnected, the PWMW signal is output after being delayed by two D flip-flops. In this way, the PWM' signals as shown in the following table can be obtained. Figure 4 、5 A timing diagram of the control circuit outputting the driving signal.

[0040] Embodiment two:

[0041] A control module for improving coupling of an LED display screen, comprising N control circuits as described above; wherein all the control circuits are connected in parallel with each other. The N is a multiple of 2.

[0042] Specifically, multiple control circuits can be integrated in one control module, so as to output multiple driving signals.

[0043] The module provided in the embodiment is for brief description, and the part not mentioned in the embodiment can refer to the corresponding content in the foregoing circuit embodiment.

[0044] Embodiment three:

[0045] A control chip for improving coupling of an LED display screen, referring to Figure 6 ,

[0046] The control chip is provided with a data port, a clock port and N output ports; the control chip comprises a digital processing unit, the control module in the second aspect and a channel module.

[0047] The data port of the control chip is connected to the input end of the digital processing unit, the clock port of the control chip is connected to the clock end of the digital processing unit, the output end of the digital processing unit comprises N register output ends, and different register output ends in the digital processing unit are respectively connected to the input ends of different control circuits in the control module; the output ends of different control circuits in the control module are respectively connected to different input ends in the channel module, and different output ends in the channel module are respectively connected to different output ports in the control chip.

[0048] Preferably, the output end of the digital processing unit further comprises a clock output end, and the clock output end outputs the external clock.

[0049] Specifically, Figure 6 In the embodiment, the clock signal input by the digital processing unit comprises DCLK and GCLK, the digital processing unit collects the input Sdi signal through the clock DCLK, generates a PWM signal and transmits the PWM signal to the control module, and then controls display output through the clock GCLK. The PWM signal generates different PWM' signals through the control module.

[0050] The control chip can control the display channel to open or close through different PWM signals, for example, a special register A (i.e. PWM signal A) is used to adjust the OUT open (falling edge) position in the control module. A special register B (i.e. PWM signal B) is used to adjust the OUT close (rising edge) position. In this way, the chip can adjust the value through the special register, and adjust to a more suitable value according to the on-screen display effect.

[0051] The chip provided by the embodiments of the present application is briefly described, and the embodiments not mentioned in the embodiments part can refer to the corresponding content in the foregoing circuit embodiments.

[0052] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should be covered in the scope of the claims and the description of the present application.

Claims

1. A control chip for improving coupling of LED display screens, characterized in that, the control chip is provided with a data port, a clock port and N output ports; the control chip comprises a digital processing unit, a control module and a channel module; the control module comprises N control circuits, and the N is a multiple of 2; all the control circuits are connected in parallel with each other; the control circuit comprises first, second and third delay circuits with different delay times; the first, second and third delay circuits are connected in parallel with each other; the input ends of the first, second and third delay circuits are connected with each other to form the input end of the control circuit, and receive the same PWM signal; the output ends of the first, second and third delay circuits are connected with each other to form the output end of the control circuit, and output the PWM signal delayed by the first, second or third delay circuit to the channel module for driving each display channel of the LED display screen to open or close; the first delay circuit comprises a switch SW1; the input end of the first delay circuit is connected to the output end of the first delay circuit through the switch SW1 in series; the second delay circuit comprises a first flip-flop and a switch SW2; the input end of the second delay circuit is connected to the input end of the first flip-flop, the clock end of the first flip-flop is connected to an external clock, and the output end of the first flip-flop is connected to the output end of the second delay circuit through the switch SW2 in series; the third delay circuit comprises a second flip-flop, a third flip-flop and a switch SW3; the input end of the third delay circuit is connected to the input end of the second flip-flop, the clock end of the second flip-flop is connected to the external clock, the output end of the second flip-flop is connected to the input end of the third flip-flop, the clock end of the third flip-flop is connected to the external clock, and the output end of the third flip-flop is connected to the output end of the third delay circuit through the switch SW3 in series; the first, second and third flip-flops are all D flip-flops; wherein the data port of the control chip is connected to the input end of the digital processing unit, the clock port of the control chip is connected to the clock end of the digital processing unit, the output end of the digital processing unit comprises N register output ends, and different register output ends in the digital processing unit are respectively connected to the input ends of different control circuits in the control module; the output ends of different control circuits in the control module are respectively connected to different input ends in the channel module, and different output ends in the channel module are respectively connected to different output ports in the control chip; the output end of the digital processing unit further comprises a clock output end, and the clock output end outputs the external clock.

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