Decoding device, control circuit and storage medium

By designing an error correction decoding unit and a decoding parameter control unit in the decoding device, decoding processing is performed on the received data of spatially coupled low-density parity code, and updating the decoding parameters according to the decoding results, the decoding processing delay and the decoding process in the prior art are solved. The problem of increasing power consumption achieves a high-efficiency and low-power decoding effect.

CN113940007BActive Publication Date: 2025-02-11MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
CN201980097206.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-06-13
Publication Date
2025-02-11
Estimated Expiration
2039-06-13

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Abstract

A decoder (1) as a decoding device comprises: an error correction decoding unit (12) which performs an error correction decoding process in which a decoding process is repeatedly performed on received data after spatially coupled low-density parity check coding with a window size and a decoding repetition number indicated by a decoding parameter; and a decoding parameter control unit (14) which updates the decoding parameter based on a decoding result obtained in the repeatedly performed decoding process.
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Description

Technical Field

[0001] The present invention relates to a decoding device, a control circuit and a storage medium for performing error correction decoding. Background Art

[0002] Error correction codes are technologies used in wired communication systems, wireless communication systems, storage devices, and the like. Specifically, error correction codes are technologies that can detect and correct errors even if errors (bit errors) occur in the received data by adding redundant bits to the digital data sent on the transmitting side. So far, various error correction codes and decoding methods have been proposed, such as Hamming codes, BCH (Bose-Chaudhuri-Hocquenghem) codes, and RS (Reed-Solomon) codes. The application of error correction codes can improve the reliability of the communication system. On the other hand, the number of bits that can be corrected has a limit, and the error correction performance, that is, the number of bits that can be corrected, varies depending on the error correction code and the decoding method.

[0003] Here, as one of the codes with strong error correction performance, a spatially coupled LDPC (Low Density Parity Check) code (e.g., non-patent document 1) is proposed. This code is a type of convolutional code that uses an LDPC code called a low-density parity check code, and has received much attention in recent years as a code that can achieve error correction performance close to the Shannon limit. In addition, as one of its effective decoding methods, window decoding is known (e.g., patent document 1).

[0004] In the window decoding performed by the decoding device described in Patent Document 1, the decoding process is started with a window size based on the estimated result of the transmission path state (channel information), and the parity check of the decoding result is used to determine whether there is a residual error. If the result of the determination is that there is a residual error, control is performed in a manner of increasing the window size. In this way, the decoding process under the condition of excessive error correction performance is avoided, and power consumption is suppressed.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2013-198017

[0008] Non-patent literature

[0009] Non-patent literature 1: S.Kudekar, TJRichardson, and RLUrbanke, "ThresholdSaturation via Spatial Coupling: Why Convolutional LDPC Ensembles Perform SoWell over the BEC", IEEE Trans.Theory, vol.57, No.2, pp.803-834, Feb.2011. Summary of the invention

[0010] Problem that the invention aims to solve

[0011] The decoding device described in Patent Document 1 increases the window size by a predetermined amount without considering the error occurrence conditions, etc. when increasing the window size as an error occurs during the decoding process. Therefore, the process of increasing the window size and decoding again is repeated until the error is eliminated, which may cause processing delays and increase power consumption.

[0012] The present invention has been made in view of the above circumstances, and an object of the present invention is to obtain a decoding device capable of suppressing processing delay and power consumption when decoding a spatially coupled low-density parity-check code.

[0013] Means used to solve problems

[0014] In order to solve the above-mentioned problems and achieve the purpose, the decoding device of the present invention comprises: an error correction decoding unit, which performs error correction decoding processing, in which the decoding processing is repeatedly performed on the received data after spatially coupled low-density parity check encoding with a window size and a decoding repetition number indicated by a decoding parameter; and a decoding parameter control unit, which updates the decoding parameters based on the decoding results obtained in the repeatedly performed decoding processing.

[0015] Effects of the Invention

[0016] The decoding device of the present invention has an effect of being able to suppress processing delay and power consumption when decoding spatially coupled low-density parity-check codes. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a diagram showing a configuration example of a decoding device according to Embodiment 1 of the present invention.

[0018] Figure 2 This is a diagram showing a configuration example of an error correction decoding unit according to Embodiment 1.

[0019] Figure 3 This is a diagram showing a configuration example of a parity check matrix used in an error correction decoding process by a window decoding unit according to the first embodiment.

[0020] Figure 4 It is shown Figure 3 A diagram of a portion of a parity-check matrix is ​​shown.

[0021] Figure 5 This is a diagram for explaining the processing of the window decoding unit in embodiment 1.

[0022] Figure 6 This is a diagram showing an example of the relationship between the decoding parameters of window decoding and the error correction performance.

[0023] Figure 7 This is a diagram for explaining the initial steps of the error correction decoding process performed by the decoder of Embodiment 1.

[0024] Figure 8 This is a diagram for explaining the second step of the error correction decoding process performed by the decoder of Embodiment 1.

[0025] Fig. 9 This is a flowchart showing an example of error correction decoding processing performed by the decoder according to Embodiment 1.

[0026] Fig.10 This is a diagram for explaining the second step of the error correction decoding process performed by the decoder of embodiment 2.

[0027] Fig.11 This is a diagram for explaining the error correction decoding process performed by the decoder of embodiment 3.

[0028] Fig.12 This is a diagram for explaining the error correction decoding process performed by the decoder of embodiment 4.

[0029] Fig.13 This is a diagram for illustrating another error correction decoding process performed by the decoder of embodiment 4.

[0030] Fig.14 This is a diagram showing an example of hardware for realizing the decoder of Embodiments 1 to 4. DETAILED DESCRIPTION

[0031] Hereinafter, a decoding device, a control circuit, and a storage medium according to an embodiment of the present invention will be described in detail based on the drawings. Note that the present invention is not limited to these embodiments.

[0032] Implementation method 1.

[0033] Figure 11 is a diagram showing a configuration example of a decoding device according to Embodiment 1 of the present invention. The decoding device according to Embodiment 1, that is, a decoder 1, includes a likelihood generation unit 11, an error correction decoding unit 12, an error rate estimation unit 13, and a decoding parameter control unit 14. The decoder 1 is, for example, a receiving device included in a communication device. Figure 1 Each of the units shown performs processing described below, and performs error correction decoding on the received data that has been subjected to spatially coupled low-density parity check coding. The received data is input to a likelihood generating unit 11. In the following description, spatially coupled low-density parity check codes are referred to as spatially coupled LDPC codes.

[0034] The likelihood generating unit 11 calculates the likelihood based on the input received data in order to perform soft decision error correction decoding processing. The decoder 1 of the present embodiment performs soft decision error correction decoding. Soft decision means that, for example, in the case where data is represented by binary data of "0" or "1", the received data is not determined to be "0" or "1", but the likelihood of "0" or "1" is determined in a manner having multiple thresholds. As an indicator representing the likelihood, the log-likelihood ratio (LLR) is usually used for subsequent error correction decoding processing, but there is no problem in using the likelihood ratio or probability. In addition, in the above description and the following description, the data processed by the decoder 1 is recorded as binary data, but the processing is the same when processing symbol data composed of multiple binary data.

[0035] The error correction decoding unit 12 performs error correction decoding processing using the input LLR. Figure 2 1 is a diagram showing a configuration example of the error correction decoding unit 12 according to Embodiment 1. Figure 2 As shown, the error correction decoding unit 12 includes a window decoding unit 21 and a data storage unit 22. In the error correction decoding unit 12, the data storage unit 22 holds the input data. The window decoding unit 21 performs a decoding operation on the data held by the data storage unit 22. In addition, a method of dispersing errors by inserting interleaving and deinterleaving at the front stage of the error correction decoding process is often used. Since it is not an essential part of the present invention, it is omitted in the figure, but it can also be configured so that the data transmission side interleaves the error correction coded data, and in the decoder 1, the LLR output by the likelihood generation unit 11 is deinterleaved and input to the error correction decoding unit 12.

[0036] The error rate estimation unit 13 estimates the bit error rate of the received signal (hereinafter simply referred to as “the error rate of the received signal”) based on the decoding processing result of the error correction decoding unit 12. The decoding parameter control unit 14 controls the decoding parameters applied to the error correction decoding processing in the error correction decoding unit 12 based on the error rate of the signal estimated by the error rate estimation unit 13.

[0037] Next, the operation of decoding received data by the decoder 1 will be described. A signal received by a receiving device including the decoder 1 is input to the decoder 1 after being subjected to reception processing such as compensation processing and demodulation processing suitable for a transmission path.

[0038] When a signal is input to the decoder 1, first, the likelihood generation unit 11 converts the input signal into LLR and outputs it. The LLR output by the likelihood generation unit 11 is input to the error correction decoding unit 12. In the error correction decoding unit 12, the data storage unit 22 receives and holds the LLR. The window decoding unit 21 repeats the following series of processes: reads the LLR from the data storage unit 22, performs decoding processing using the decoding parameters determined by the decoding parameter control unit 14, and stores the obtained decoding results in the data storage unit 22. In addition, the window decoding unit 21 outputs the decoding results to the error rate estimation unit 13 in coordination with the timing of the decoding parameters determined by the decoding parameter control unit 14. In addition, the window decoding unit 21 can also output all the obtained decoding results to the error rate estimation unit 13.

[0039] The window decoding unit 21 uses Figure 3 The described parity check matrix H decodes the received data to which the spatially coupled LDPC code is applied. Figure 3 1 is a diagram showing a configuration example of a parity check matrix used in the error correction decoding process by the window decoding unit 21 according to the first embodiment. Figure 3 The parity check matrix H shown is composed of smaller parity check partial matrices ( Figure 3 In the following description, the "parity check partial matrix" is referred to as the "partial matrix". Each structural element of the partial matrix is ​​configured so that a plurality of relatively short parity check matrices of LDPC codes can be constructed by combining with structural elements of other adjacent partial matrices. That is, by combining a plurality of adjacent partial matrices, a structure is obtained by convolving a plurality of LDPC codes in a long code and connecting them. In the partial matrix, for example, a convolutional code structure of a QC-LDPC code can be formed using a QC (Quasi-Cyclic) structure using a circulant permutation matrix. When the QC structure is applied, the structure of the check matrix and the circuit installation become easy.

[0040] In the error correction decoding process performed by the window decoding unit 21, the decoding process is performed in units of a window size spanning a plurality of partial matrices. This decoding process is called window decoding. Figure 4 An example of window decoding is shown in Figure 4 Extract Figure 3 A portion of the parity check matrix H is shown. Figure 4 In the figure, the solid quadrilateral represents a part of the matrix, and the dashed quadrilateral represents the window. Figure 4 An example is shown in which decoding is performed with a window size spanning 5 partial matrices. In window decoding, the following repeated decoding process is usually performed: decoding is performed from the top of the window in each column direction, and the process is gradually advanced toward the next row. When the process reaches the bottom of the window, the process is performed again from the top of the window. In the decoding process, methods generally known as decoding algorithms for LDPC codes, such as the Sum-Product decoding method and the Min-Sum decoding method, can be applied. The decoding algorithm to be used is not specified in the present invention. When the decoding process for a certain window is completed, the window decoding unit 21 is as follows. Figure 5 The decoding result of the input signal after the processing at the beginning of the window is output as shown. In addition, the window decoding unit 21 shifts the window to the lower right by the amount of one partial matrix and inputs new received data. The input here refers to reading the received data from the data storage unit 22. The window decoding unit 21 performs decoding processing on the new window area after the shift in the same steps as the decoding processing on the window area before the shift.

[0041] In window decoding, it is known that the error correction performance varies according to the window size and the number of decoding repetitions indicated by the decoding parameters. Figure 6 Provide explanation. Figure 6 FIG. 1 is a diagram showing an example of the relationship between the decoding parameters of window decoding and the error correction performance. Figure 6 In the example, the horizontal axis represents the window size. In addition, the vertical axis represents the coding gain loss (penalty) when the decoding parameters are changed, taking the coding gain when the decoding parameters are (window size, decoding repetition number) = (12, 3) as the reference. Figure 6 As shown, even with the same window size, the larger the number of decoding repetitions, the smaller the loss, that is, the higher the error correction performance. In addition, even with the same number of repetitions, the error correction performance can be improved by increasing the window size. However, there is a trade-off between error correction performance and power consumption. In order to achieve higher error correction performance for any throughput and to increase the decoding processing volume per unit time, one or both of the expansion of circuit scale and the speed increase of operation frequency are required, and the power consumption of the decoder needs to be increased. On the contrary, for a decoder with sufficient error correction performance for a communication path, if the decoding parameters can be appropriately selected according to the communication path, low power consumption can be achieved by slowing down the operation frequency of the decoder and intermittent operation or stop of the operation of the operator.

[0042] Therefore, in the decoder 1 of the present embodiment, an appropriate decoding parameter is selected based on the received data, thereby suppressing an increase in power consumption. The operation of determining the decoding parameter based on the received data in the decoder 1 will be described below.

[0043] Figure 7 1 is a diagram for explaining the initial step of the error correction decoding process performed by the decoder 1 of the first embodiment. In the decoder 1 of the present embodiment, the error correction decoding unit 12 sets the value that can achieve the maximum error correction performance among the decoding parameters (window size, number of decoding iterations) that can meet the target throughput for the input spatially coupled LDPC code, specifically, the beginning of the LLR data sequence input from the likelihood generation unit 11, and performs the decoding process of the initial step. The decoding result obtained in the initial step is output as the decoding result, and is also sent to the error rate estimation unit 13.

[0044] The error rate estimation unit 13 estimates the error rate of the received signal using the decoding result of the initial step input from the error correction decoding unit 12. Regarding the error rate of the received signal, for example, the bit that has been corrected for error can be detected by comparing the hard decision result of the LLR data before error correction with the hard decision result of the decoding result in the initial step, and the error rate of the received signal can be calculated based on the detection result. Specifically, the error rate estimation unit 13 assumes the number of bits that have been corrected for error (hereinafter referred to as the number of corrected bits) as the number of bits that have been erroneous, and estimates the error rate of the received signal by dividing the number of bits that have been decoded by the number of corrected bits. The estimated error rate is sent to the decoding parameter control unit 14. In addition, since the output result of the decoding process is a fixed value in units of the number of columns of the partial matrix, the error rate estimation unit 13 can also output the number of error bits to the decoding parameter control unit 14 instead of the error rate.

[0045] The decoding parameter control unit 14 determines the window size and the number of decoding repetitions that are the decoding parameters based on the error rate of the received signal input from the error rate estimation unit 13. As mentioned above, the error correction performance changes by controlling the decoding parameters, and it also helps to control the power. Therefore, the decoding parameter control unit 14 determines the decoding parameters that can achieve the necessary and sufficient error correction performance based on the error rate of the received signal. In determining the decoding parameters, for example, a list of decoding parameters that can achieve sufficient error correction performance for the error rate of the received signal is pre-prepared. After the error rate of the received signal is input, the decoding parameter control unit 14 selects the decoding parameters corresponding to the input error rate from the list and determines them as the decoding parameters to be used. In this way, the decoding parameters can be easily determined. The decoding parameter control unit 14 notifies the determined decoding parameters to the error correction decoding unit 12.

[0046] Figure 8 Show Figure 7 The initial step shown is processed in the next step. Figure 8 This is a diagram for explaining the second step of the error correction decoding process performed by the decoder 1 according to the first embodiment.

[0047] like Figure 8As shown, the error correction decoding unit 12 of the decoder 1 receives notification of the decoding parameters determined by the decoding parameter control unit 14 in the second step, which is the next step of the initial step, and changes the settings of the window size and the number of decoding repetitions so as to achieve the window size and the number of decoding repetitions indicated by the decoding parameters, and performs decoding processing. In addition, when the decoding parameters notified from the decoding parameter control unit 14 are the same as the decoding parameters used in the initial step, the error correction decoding unit 12 performs decoding processing without changing the settings of the window size and the number of decoding repetitions. In the decoding processing of the steps after the second step, the error correction decoding unit 12 uses the same decoding parameters as the second step.

[0048] Fig. 9 The error correction decoding process performed by the decoder 1 of the above-mentioned first embodiment is shown in a flowchart. Fig. 9 This is a flowchart showing an example of error correction decoding processing performed by the decoder 1 according to the first embodiment.

[0049] like Fig. 9 As shown, in the error correction decoding process performed by the decoder 1, first, the error correction decoding unit 12 sets the variable i representing the number of steps of the decoding process to "i=1" (step S11). Next, the error correction decoding unit 12 sets the decoding parameters to the initial values. Specifically, the error correction decoding unit 12 sets the values ​​of the window size and the number of decoding repetitions to the maximum (step S12). Next, the error correction decoding unit 12 inputs data of the amount of the window size to the window decoding unit 21 (step S13). That is, data of the amount of the window size is input from the data storage unit 22 to the window decoding unit 21. Next, the error correction decoding unit 12 performs decoding of Step.i (decoding process of the i-th step) (step S14).

[0050] Next, the error correction decoding unit 12 checks whether "i=1" holds (step S15). If so (step S15: "Yes"), the error rate estimation unit 13 estimates the BER (Bit Error Rate) indicating the error rate of the received signal (step S16). That is, if "i=1", the error correction decoding unit 12 outputs the decoding result in step S14 to the error rate estimation unit 13, and the error rate estimation unit 13 estimates the BER based on the input decoding result.

[0051] When the error rate estimation unit 13 executes step S16 to obtain the estimated value of BER, the decoding parameter control unit 14 then determines the decoding parameters based on the estimated value of BER, and the error correction decoding unit 12 updates the window size and the number of decoding iterations according to the determination result (step S17). In addition, depending on the estimated value of BER obtained in step S16, in step S17, only one of the window size and the number of decoding iterations may be updated, or neither the window size nor the number of decoding iterations may be updated.

[0052] When it is determined in the above step S15 that "i=1" is not established (step S15: No) and when the decoding parameters are updated by executing step S17, the error correction decoding unit 12 checks whether "i=N" is established (step S18). Figure 3 The structure of the parity check matrix H shown in FIG. 1 and the size of the window are set. Specifically, the value of N is set to the position of the window reaching Figure 3 The number of shifts shown is the number of shifts performed before the lower right end of the parity check matrix H. If the size of the window is determined, the number of shifts can be calculated based on the size of the window and the size of the parity check matrix H.

[0053] If "i=N" holds true (step S18: "Yes"), the error correction decoding process performed by the error correction decoding unit 12 of the decoder 1 ends. On the other hand, if "i=N" does not hold true (step S18: "No"), the error correction decoding unit 12 adds 1 to i (step S19), returns to step S13, and repeats the process of steps S13 to S18. In addition, after the error correction decoding unit 12 adds 1 to i in step S19, if the error correction decoding unit 12 uses Figure 4 and Figure 5 As explained, the window is offset to the lower right by the amount of 1 partial matrix. Fig. 9 The record is omitted.

[0054] As described above, the decoder 1 of the present embodiment performs the initial step in the window decoding in which the decoding is repeated while changing the position of the window, and uses the decoding parameters with the highest error correction performance until the initial decoding result is obtained. When the initial decoding result is obtained, the decoding parameters used in the subsequent decoding process are determined based on the decoding result. In this way, error correction decoding can be implemented with a necessary and sufficient processing amount for the received signal, so that the power consumption of the decoder 1 can be reduced. In addition, the initial step is decoded with a sufficiently strong decoding parameter, and the decoding parameters of the next step are uniquely determined based on the result, so that the repeated adjustment of the decoding parameters generated in the method described in Patent Document 1 can be prevented, and the increase of processing delay can be suppressed.

[0055] In this embodiment, as a basic structure, only the decoding result of the initial step is used in the estimation of the error rate of the received signal, but the decoding results of multiple steps can also be used in the estimation of the error rate. By using multiple steps, the possibility of performing error correction decoding processing with excessive error correction performance relative to the quality of the received signal becomes higher. That is, the possibility of using decoding parameters that become excessive error correction performance in multiple steps until the estimation of the error rate of the received signal is completed becomes higher. However, since the number of samples used for error rate estimation increases, the accuracy of decoding parameter determination can be improved by improving the reliability of the estimation result.

[0056] In addition, in the present embodiment, the error rate estimated in the initial step and the decoding parameters determined based on the error rate are applied from the decoding process in the next step, but it is also possible to apply from the middle of the next step, or from the decoding process after the next step, etc. In this way, the possibility of performing the decoding process with excessive error correction performance relative to the quality of the received signal increases, but the decoding process in the next step and the processing related to the determination of the decoding parameters can be set in parallel, which contributes to the speed of processing and the improvement of circuit feasibility. In addition, these modified structures, that is, structures obtained by modifying a part of the basic structure, can also be used in combination in consideration of changes in signal quality and the feasibility of the decoder 1.

[0057] In the decoder 1 of the present embodiment, the error rate estimation unit 13 estimates the bit error rate of the received signal based on one or more decoding results obtained in the decoding process repeatedly performed by the error correction decoding unit 12, and the decoding parameter control unit 14 determines the decoding parameters based on the estimated result of the bit error rate. However, the bit error rate of the received signal is an example of information indicating the quality of the received signal, and the configuration of determining the decoding parameters using the bit error rate is not limited. Instead of the bit error rate, other information indicating the quality of the received signal may be used to determine the decoding parameters. That is, the error rate estimation unit 13 is an example of a signal quality estimation unit that estimates the quality of the received signal based on one or more decoding results obtained in the decoding process repeatedly performed by the error correction decoding unit 12.

[0058] Implementation method 2.

[0059] In the above embodiment 1, in order to determine the decoding parameters of the spatially coupled LDPC code, the error rate is estimated using the decoding result of the initial step of the received code sequence. However, since the decoding parameters obtained based on the decoding result of the initial step are applied to the entire code sequence, it is required that the transmission path is relatively static and the performance change is small from the beginning to the end of the code. Therefore, in this embodiment, a decoder applied to the following situation is described, in which there is a time change in the transmission path characteristics and the performance deviates at the beginning and end of the code.

[0060] The structure of the decoder of this embodiment is the same as that of the decoder of Embodiment 1. Figure 1 and Figure 2 The structure shown. In addition, window decoding is applied to the decoding method as in the first embodiment. In the present embodiment shown below, the parts different from the first embodiment are described. In addition, for the convenience of description, the decoder of the present embodiment is described as decoder 1a.

[0061] In the initial step of window decoding performed by the decoder 1a of the second embodiment, the same processing as the initial step of window decoding performed by the decoder 1 of the first embodiment is performed. That is, in the initial step of window decoding, the decoder 1a performs the following steps: Figure 7 As shown, the values ​​that can achieve the maximum error correction performance among the decoding parameters (window size, number of decoding iterations) that can satisfy the target throughput are set for the head of the LLR data sequence, and decoding processing is performed.

[0062] In the next step after the initial step, decoder 1a performs Fig.10 In addition, Fig.10 1 is a diagram for explaining the second step of the error correction decoding process performed by the decoder 1a of the second embodiment. Fig.10 As shown, the error correction decoding unit 12 of the decoder 1a performs decoding processing using decoding parameters determined based on the decoding result of the initial step in the same manner as in the first embodiment. On the other hand, in the present embodiment, the decoding result in the current step is output to the error rate estimation unit 13 to update the decoding parameters in the next step. That is, in the decoder 1a, the decoding parameters are updated sequentially based on the decoding results obtained in each step of the error correction decoding processing. In this way, even if there is a change in reception quality between spatially coupled LDPC codes due to time variations in the transmission path, it is possible to follow the optimal decoding parameters of the decoding processing, and the low power consumption of the decoder 1a can be achieved more stably.

[0063] In this embodiment, as a basic structure, only the decoding result of one step is used in estimating the error rate of the received signal, but the decoding results of multiple steps may be used in estimating the error rate as in Embodiment 1. In addition, although the decoding parameters in the step at the current moment are determined based on the error rate estimated in the previous step, they may be determined based on the error rate estimated in a further previous step.

[0064] In addition, in the present embodiment, when determining the decoding parameters, only the decoding result of the previous step is used to estimate the error rate of the received signal, but the decoding results of multiple steps including the previous step may also be used. By using the decoding results of multiple steps, for example, the estimation accuracy of the current communication quality can be improved by taking a weighted average. In addition, the error rate of the next step can be estimated by applying a Kalman filter or the like. In addition, regarding these variations, it is also possible to combine several variations and use them in consideration of the change in signal quality and the feasibility of the decoder 1a.

[0065] In the above description, error rate estimation and updating of decoding parameters are performed in all decoding process steps, but they may be performed intermittently.

[0066] Implementation method 3.

[0067] In the above embodiments 1 and 2, the decoding parameters are optimized within a received spatially coupled LDPC code. Therefore, when a new spatially coupled LDPC code sequence is input, the decoding parameters are initialized and set to a value that can achieve the maximum error correction performance, and the error correction decoding process is promoted. However, in the received signals that are continuous in time, the reception quality is unlikely to be significantly different. Therefore, the decoder of this embodiment uses the decoding result of a certain spatially coupled LDPC code to obtain an estimated value of the bit error rate, and based on the estimated value, determines the initial value of the decoding parameter when the next spatially coupled LDPC code is error-corrected.

[0068] The structure of the decoder of this embodiment is the same as that of the decoders of Embodiments 1 and 2. Figure 1 and Figure 2 The structure shown. In addition, window decoding is applied to the decoding method as in Embodiments 1 and 2. In this embodiment shown below, the parts different from Embodiments 1 and 2 are described. In addition, for the convenience of description, the decoder of this embodiment is described as decoder 1b.

[0069] Fig.11 This is a diagram for explaining the error correction decoding process performed by the decoder 1b of the third embodiment. For the purpose of explanation, the code table of the object currently undergoing the error correction decoding process is recorded as the nth spatially coupled LDPC code. When the error correction decoding process is performed in series, when the nth spatially coupled LDPC code is decoded, the decoding of the n-1th spatially coupled LDPC code is completed. The decoder 1b of this embodiment estimates the error rate of the received signal based on the decoding result of the n-1th spatially coupled LDPC code, and determines the decoding parameters based on the estimated error rate. That is, as Fig.11As shown, the decoding result of the n-1th spatially coupled LDPC code is input to the error rate estimation unit 13, and the error rate estimation unit 13 estimates the error rate of the received signal. Next, the decoding parameter control unit 14 determines the decoding parameters based on the estimated value of the error rate obtained by the error rate estimation unit 13. Then, the error correction decoding unit 12 of the decoder 1b uses the decoding parameters determined by the decoding parameter control unit 14 to start the error correction decoding process of the nth spatially coupled LDPC code. That is, the decoder 1b applies the decoding parameters determined using the decoding result of the n-1th spatially coupled LDPC code to the initial step of the error correction decoding process for the nth spatially coupled LDPC code. The decoder 1b, like the decoder 1 of the first embodiment, determines the decoding parameters to be applied to the decoding process in the next step and thereafter based on the obtained decoding result when the decoding result is obtained in the initial step. In the error correction decoding process of the next n+1th spatially coupled LDPC code, the decoder 1b applies the decoding parameters determined using the decoding result of the nth spatially coupled LDPC code to the decoding process in the initial step. Similarly, the decoder 1b uses the decoding result of the previous spatially coupled LDPC code to determine the initial values ​​of the decoding parameters used in the error correction decoding process of the spatially coupled LDPC code, that is, the decoding parameters applied to the decoding process in the initial step.

[0070] In this way, from the initial step of the error correction decoding process, decoding can be performed with parameters corresponding to the quality of the received signal, and low power can be effectively achieved. In addition, when the decoder 1b starts decoding the spatially coupled LDPC code string, that is, when there is no spatially coupled LDPC code equivalent to the above-mentioned n-1th spatially coupled LDPC code, the error correction decoding process is started using the decoding parameters that have the highest error correction performance, similarly to the first and second embodiments.

[0071] In this embodiment, the error correction decoding processing of the n-1th spatially coupled LDPC code and the error correction decoding processing of the nth spatially coupled LDPC code are sequentially performed as a premise for explanation. However, in reality, the following situation is considered: in a decoder that realizes an arbitrary throughput, the window decoding unit 21 and the data storage unit 22 are parallelized, and the nth and n-1th spatially coupled LDPC codes are decoded at the same timing. Therefore, it can also be configured that the decoding parameters determined based on the decoding result of the n-1th spatially coupled LDPC code are applied starting from the error correction decoding processing of the spatially coupled LDPC codes after n+i (i≧0).

[0072] Implementation method 4.

[0073] In the above-mentioned Embodiment 3, the initial value of the decoding parameter applied in the error correction decoding process of the current spatially coupled LDPC code is determined by using the decoding result of the previous spatially coupled LDPC code. In the case of implementing the structure described in Embodiment 3, in the error rate estimation unit 13 that estimates the error rate of the received signal required to determine the decoding parameter in the decoder 1b, it is necessary to add a function of calculating the error rate of the entire spatially coupled LDPC code, compared with the error rate estimation unit 13 used in Embodiments 1 and 2. Therefore, in this embodiment, a method for a decoder that does not need to add a function of calculating the error rate of the entire spatially coupled LDPC code is described.

[0074] The structure of the decoder of this embodiment is similar to that of the decoders of Embodiments 1 to 3. Figure 1 and Figure 2 The structure shown. In addition, window decoding is applied to the decoding method in the same manner as in Embodiments 1 to 3. In addition, for convenience of description, the decoder of this embodiment is described as a decoder 1c.

[0075] Fig.12 This is a diagram for explaining the error correction decoding process performed by the decoder 1c according to the fourth embodiment. Fig.12 The following is shown: the decoder 1c performs the same error correction decoding process as that described in the first embodiment, and determines the decoding parameters using the previous decoding result of the spatially coupled LDPC code.

[0076] As described above, in the decoder 1 of the first embodiment, the decoding parameters are determined based on the decoding result of the initial step, and the same parameters are applied to all decoding processing steps after the initial step of the received spatially coupled LDPC code. Fig.12 As shown, in a decoder 1c that decodes a spatially coupled LDPC code by the same steps as those in Embodiment 1, an error rate estimation unit 13 estimates a bit error rate based on a decoding result obtained in an initial step of an error correction decoding process for an n-1th spatially coupled LDPC code, and a decoding parameter control unit 14 determines a decoding parameter based on the estimated value of the bit error rate. Then, the decoding parameter is applied to an initial step of an error correction decoding process for an nth spatially coupled LDPC code.

[0077] In this way, when the decoder 1c decodes the spatially coupled LDPC code by the same steps as those in the first embodiment, the decoding parameters determined based on the decoding result obtained in the initial step of the error correction decoding process for the n-1th spatially coupled LDPC code are applied not only to the error correction decoding process for the n-1th spatially coupled LDPC code, but also to the initial step of the error correction decoding process for the nth spatially coupled LDPC code. The decoder 1c applies the decoding parameters determined based on the decoding result in the initial step in each step after the initial step for the nth spatially coupled LDPC code. The decoder 1c also determines the decoding parameters used in the error correction decoding process for the n+1th and subsequent spatially coupled LDPC codes by the same method.

[0078] Fig.13 This is a diagram for explaining another error correction decoding process performed by the decoder 1c according to the fourth embodiment. Fig.13 The following is shown: the decoder 1c performs the same error correction decoding process as the error correction decoding process described in the second embodiment, and determines the decoding parameters using the previous decoding result of the spatially coupled LDPC code.

[0079] As described above, the decoder 1a of the second embodiment determines the decoding parameters used in the subsequent steps based on the decoding results obtained in each step of the error correction decoding process of the spatially coupled LDPC code. That is, the decoder 1a updates the decoding parameters based on the decoding results in each step of the error correction decoding process of the spatially coupled LDPC code. Fig.13 As shown, in a decoder 1c that decodes a spatially coupled LDPC code by the same steps as those in Embodiment 2, an error rate estimation unit 13 estimates a bit error rate based on a decoding result in the final step of an error correction decoding process for the n-1th spatially coupled LDPC code, and a decoding parameter control unit 14 determines a decoding parameter based on the estimated value of the bit error rate. Then, the decoding parameter is applied to an initial step of an error correction decoding process for the nth spatially coupled LDPC code.

[0080] In this way, when decoding the spatially coupled LDPC code by the same steps as those in Embodiment 2, the decoder 1c estimates the bit error rate and updates the decoding parameters based on the decoding result in the final step of the error correction decoding process for the n-1th spatially coupled LDPC code, and applies the updated decoding parameters to the initial step of the error correction decoding process for the nth spatially coupled LDPC code. The decoder 1c also determines the decoding parameters used in the error correction decoding process for the n+1th and subsequent spatially coupled LDPC codes by the same method.

[0081] By adopting the above-mentioned structure, it is possible to perform decoding with decoding parameters corresponding to the quality of the received signal from the initial step of the error correction decoding process of each spatially coupled LDPC code without adding a function of calculating the error rate of the entire spatially coupled LDPC code to Embodiment 1 and Embodiment 2. As a result, it is possible to effectively achieve low power consumption.

[0082] In addition, the error correction decoding processing described in this embodiment is described based on the basic structure of each of the first and second embodiments, but can also be implemented based on the modified structure described in each embodiment.

[0083] In addition, it is also possible to configure in the same manner as in Embodiment 3, taking into account constraints such as throughput and installation conditions, and starting from the error correction decoding processing of the spatially coupled LDPC codes after the n+ith (i≧0), the decoding parameters determined based on the n-1th decoding result are applied. In addition, it is also possible to set a limit on the number of times such a process of using the decoding result of the previous spatially coupled LDPC code to determine the initial value of the decoding parameter is repeated. That is, it is also possible to configure that each time the number of times such a process is repeated reaches a predetermined number of times, the decoding parameters are returned to the setting that can achieve the maximum error correction performance, and the processing is re-divided. It is also possible not to set a limit on the number of times the processing is repeated, but to set a limit on the time for which the processing is repeated, and each time a predetermined time has passed, the decoding parameters are returned to the setting that can achieve the maximum error correction performance.

[0084] Next, the hardware structure of the decoder described in Embodiments 1 to 4 is described. The decoder described in Embodiments 1 to 4 can be implemented by a dedicated processing circuit. The dedicated processing circuit is, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a circuit combining them.

[0085] In addition, the decoders described in Embodiments 1 to 4 may also be configured by Fig.14 The control circuit composed of the processor 101 and the memory 102 shown in the figure is implemented. Fig.14This is a diagram showing an example of hardware for implementing the decoder of Embodiments 1 to 4. The processor 101 is a CPU (also referred to as a Central Processing Unit, a central processing device, a processing device, an arithmetic device, a microprocessor, a microcomputer, a processor, or a DSP (Digital Signal Processor). The memory 102 is, for example, a nonvolatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, an EPROM (Erasable Programmable Read Only Memory), or an EEPROM (registered trademark) (Electrically Erasable Programmable Read Only Memory).

[0086] In by Fig.14 When the control circuit shown realizes the decoder described in Embodiments 1 to 4, a program for operating the likelihood generation unit 11, the error correction decoding unit 12, the error rate estimation unit 13, and the decoding parameter control unit 14 of the decoder is stored in advance in the memory 102. The processor 101 operates as the likelihood generation unit 11, the error correction decoding unit 12, the error rate estimation unit 13, and the decoding parameter control unit 14 of the decoder by reading and executing the program stored in the memory 102. In addition, the data storage unit 22 constituting the error correction decoding unit 12 is realized by the memory 102.

[0087] Alternatively, in the likelihood generating unit 11, the error correction decoding unit 12, the error rate estimating unit 13, and the decoding parameter control unit 14, a part of the likelihood generating unit 11, the error correction decoding unit 12, the error rate estimating unit 13, and the decoding parameter control unit 14 may be implemented by a dedicated processing circuit. Fig.14 The processor 101 and memory 102 shown implement the rest.

[0088] The configuration described in the above embodiment is an example of the content of the present invention, and can be combined with other known technologies. Part of the configuration can be omitted or modified within the scope not departing from the gist of the present invention.

[0089] Description of symbols

[0090] 1 decoder, 11 likelihood generating unit, 12 error correction decoding unit, 13 error rate estimating unit, 14 decoding parameter control unit, 21 window decoding unit, 22 data storage unit.

Claims

1. A decoding device, characterized in that: The decoding device comprises: an error correction decoding unit that performs an error correction decoding process in which a decoding process is repeatedly performed on received data that has been subjected to spatially coupled low-density parity check coding, using a window size and a decoding repetition number indicated by a decoding parameter; as well as a decoding parameter control unit that updates the decoding parameter based on a decoding result obtained in the repeatedly executed decoding process, The decoding parameter control unit determines the initial value of the decoding parameter applied in the decoding process performed on the received data of the current decoding object based on the decoding result obtained in the decoding process initially performed in the decoding process repeatedly performed on the received data of the decoding object that precedes the received data of the current decoding object.

2. The decoding device according to claim 1, characterized in that The decoding device includes a signal quality estimation unit that estimates the quality of a received signal based on one or more decoding results obtained in the repeatedly executed decoding process. The decoding parameter control unit updates the decoding parameter based on the quality estimated by the signal quality estimation unit.

3. The decoding device according to claim 1, characterized in that The decoding parameter control unit determines decoding parameters to be applied to the subsequent decoding processes based on a decoding result obtained in the first decoding process after the error correction decoding unit starts the error correction decoding process.

4. The decoding device according to claim 2, characterized in that The decoding parameter control unit determines decoding parameters to be applied to the subsequent decoding processes based on a decoding result obtained in the first decoding process after the error correction decoding unit starts the error correction decoding process.

5. The decoding device according to claim 1, characterized in that: The decoding parameter control unit determines decoding parameters to be applied to the subsequent decoding process based on the obtained decoding result each time a decoding result is obtained in the repeatedly executed decoding process.

6. The decoding device according to claim 2, characterized in that: The decoding parameter control unit determines decoding parameters to be applied to the subsequent decoding process based on the obtained decoding result each time a decoding result is obtained in the repeatedly executed decoding process.

7. The decoding device according to any one of claims 1 to 6, characterized in that: The decoding parameter control unit sets the decoding parameter applied in the first decoding process after the error correction decoding unit starts the error correction decoding process to a value with the highest error correction performance among the settable values.

8. A control circuit for controlling a decoding device, characterized in that: The control circuit enables the decoding device to perform the following steps: Step 1, performing error correction decoding processing, in which the received data after spatially coupled low-density parity check coding is repeatedly decoded with a window size and a decoding repetition number indicated by a decoding parameter; as well as In step 2, the decoding parameters are updated based on the decoding results obtained in the repeatedly executed decoding process. In the second step, the initial values ​​of the decoding parameters applied in the decoding process performed on the received data of the current decoding object are determined based on the decoding result obtained in the decoding process initially performed in the decoding process repeatedly performed on the received data of the decoding object that is earlier than the received data of the current decoding object.

9. A storage medium storing a program for controlling a decoding device, characterized in that: The program causes the decoding device to execute the following steps: Step 1, performing error correction decoding processing, in which the received data after spatially coupled low-density parity check coding is repeatedly decoded with a window size and a decoding repetition number indicated by a decoding parameter; as well as In step 2, the decoding parameters are updated based on the decoding results obtained in the repeatedly executed decoding process. In the second step, the initial values ​​of the decoding parameters applied in the decoding process performed on the received data of the current decoding object are determined based on the decoding result obtained in the decoding process initially performed in the decoding process repeatedly performed on the received data of the decoding object that is earlier than the received data of the current decoding object.

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