Integrated chip and method of forming the same
By introducing fin spacers into FinFET devices, the lateral growth of the epitaxial source/drain regions is controlled, solving the short-circuit problem between adjacent devices caused by the reduction in FinFET device size, and improving device performance and reliability.
CN113948509BActive Publication Date: 2026-07-24TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- CN202110652202.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-02-04
- Filing Date
- 2021-06-11
- Publication Date
- 2026-07-24
- Estimated Expiration
- 2041-06-11
AI Technical Summary
Technical Problem
As the size of FinFET devices decreases, the lateral growth of the epitaxial source/drain regions leads to short-circuit problems between adjacent devices, affecting device performance and reliability.
Method used
By introducing fin spacers in FinFET devices, the lateral growth of the epitaxial source/drain regions can be controlled. The different sidewall heights of the fin spacers can be used to limit the lateral extension of the epitaxial source/drain segments and prevent merging between adjacent devices.
Benefits of technology
It effectively reduces merging between adjacent FinFET devices, improves device performance and reliability, and reduces short-circuit risk.
✦ Generated by Eureka AI based on patent content.
Abstract
The present invention relates to integrated chips. An integrated chip can include a semiconductor substrate having sidewalls defining a plurality of fins. A dielectric material is disposed between the plurality of fins, and a gate structure is disposed over the dielectric material and around the plurality of fins. Epitaxial source / drain regions are disposed along opposite sides of the gate structure and include a plurality of source / drain segments disposed on the plurality of fins and doped epitaxial material disposed on and between the plurality of source / drain segments, respectively. A first source / drain segment of the plurality of source / drain segments extends laterally to different distances beyond opposite sides of an underlying first fin of the plurality of fins in opposite directions. Embodiments of the present invention also relate to methods of forming integrated chips.
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