Semiconductor device
By introducing floating vias into semiconductor devices, the dielectric breakdown problem of through-vias is solved by utilizing the non-uniformity of plasma charging and the electron shielding effect, thereby improving the reliability and yield of the devices and avoiding short-circuit failures.
CN114171454BActive Publication Date: 2026-07-24RENESAS ELECTRONICS CORP
3 Cites 0 Cited by
Patent Information
- Application Number
- CN202111037239.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-09-11
- Filing Date
- 2021-09-06
- Publication Date
- 2026-07-24
- Estimated Expiration
- 2041-09-06
AI Technical Summary
Technical Problem
In three-dimensional stacked semiconductor devices, the damage caused by plasma charging through through-holes reduces the reliability and manufacturing yield of semiconductor devices.
Method used
By introducing a through-via with a floating potential (floating via) into the through-via, dielectric breakdown is intentionally induced to protect the through-via connected to the circuit from dielectric breakdown. The reliability of the through-via is improved by utilizing the non-uniformity of plasma charging and the electron shielding effect.
Benefits of technology
Without increasing the base chip area, dielectric breakdown and short-circuit faults through vias are effectively suppressed, improving the reliability and manufacturing yield of semiconductor devices.
✦ Generated by Eureka AI based on patent content.
Abstract
The present disclosure provides a semiconductor device in which a portion of a plurality of through-holes formed in a non-transistor region is a floating via having a floating potential.
Need to check novelty before this filing date? Find Prior Art