LED display device

Abstract

A display device includes a circuit board including a driving circuit, a pixel array including a plurality of pixels on the circuit board and a light blocking partition between the plurality of pixels, each pixel including a plurality of sub-pixels and the light blocking partition between the plurality of sub-pixels. Each of the plurality of sub-pixels includes a lower light emitting diode (LED) unit configured to generate light of a first wavelength. A first sub-pixel includes a transparent resin structure on a first lower LED unit, a second sub-pixel includes an inter-cell insulating layer on a second lower LED unit and an upper LED unit having a second semiconductor stack on the inter-cell insulating layer and configured to generate light of a second wavelength, and a third sub-pixel includes a wavelength conversion structure on a third lower LED unit and configured to convert light of the first wavelength to light of a third wavelength.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0142487, filed with the Korean Intellectual Property Office on October 29, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of this disclosure relate to display devices having LEDs. Background Technology

[0004] Light-emitting diodes (LEDs) are used not only as light sources for lighting equipment, but also as light sources for various electronic products. For example, LEDs are widely used as light sources for various display devices such as TVs, mobile phones, PCs, laptops, and PDAs.

[0005] Existing display devices mainly consist of a display panel formed by a liquid crystal display (LCD) and a backlight. However, recently, a technology has been developed that eliminates the need for LED elements as individual pixels for backlighting. Such display devices can be compact and can also be implemented as high-brightness display devices with superior light efficiency compared to existing LCDs. Summary of the Invention

[0006] One or more example embodiments provide a high-efficiency LED display device that can be manufactured with a simplified process.

[0007] According to an embodiment, a display device is provided, comprising: a circuit board including a driving circuit; a pixel array including a plurality of pixels disposed on the circuit board and a light-blocking separator, each of the plurality of pixels including a plurality of sub-pixels, the plurality of sub-pixels including at least a first sub-pixel, a second sub-pixel and a third sub-pixel, and the light-blocking separator being disposed between the plurality of sub-pixels, wherein each of the first sub-pixel, the second sub-pixel and the third sub-pixel respectively includes a first lower light-emitting diode (LED) unit, a second lower LED unit and a third lower LED unit, each of the lower LED units having a first semiconductor stack configured to generate light of a first wavelength, the first sub-pixel including a transparent resin structure disposed on the first lower LED unit, the second sub-pixel including an inter-unit insulating layer disposed on the second lower LED unit and an upper LED unit having a second semiconductor stack disposed on the inter-unit insulating layer, the second semiconductor stack being configured to generate light of a second wavelength, and the third sub-pixel including a wavelength conversion structure disposed on the third lower LED unit and configured to convert the first wavelength light into third wavelength light.

[0008] According to an embodiment, a display device is provided, including: a circuit board including a driving circuit; and a pixel array including a plurality of pixels disposed on the circuit board, light-blocking separators disposed between the plurality of sub-pixels, and a wiring layer electrically connecting each of the plurality of sub-pixels to the driving circuit, each of the plurality of pixels including a plurality of sub-pixels, the plurality of sub-pixels including a blue (B) sub-pixel, a green (G) sub-pixel, and a red (R) sub-pixel, wherein each of the plurality of sub-pixels includes a lower light-emitting diode (LED) unit having a first semiconductor stack configured to generate blue light, the lower LED unit including a first lower LED unit, a second lower LED unit, and a third lower LED unit, the blue sub-pixel including a... The transparent resin structure on the first lower LED unit includes a green sub-pixel comprising an inter-unit insulating layer disposed on the second lower LED unit and an upper LED unit having a second semiconductor stack disposed on the inter-unit insulating layer, the second semiconductor stack being configured to generate green light; the red sub-pixel comprises a wavelength conversion structure disposed on the third lower LED unit and configured to convert the blue light into red light; and the wiring layer comprises a wiring insulating layer disposed between the circuit board and the pixel array, a first electrode to a third electrode penetrating the wiring insulating layer and respectively connecting each of the plurality of sub-pixels to the driving circuit, and a common electrode connecting each of the plurality of sub-pixels to the driving circuit.

[0009] According to an embodiment, a display device is provided, comprising: a circuit board including a driving circuit; and a pixel array including a wiring layer disposed on the circuit board, a pixel light source layer providing a light source for a plurality of pixels, and a light blocking separator, each of the plurality of pixels including a plurality of sub-pixels having a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the light blocking separator separating each of the plurality of sub-pixels, wherein the pixel light source layer is divided into a first-level region and a second-level region disposed on the first-level region, the first-level region including a lower light-emitting diode (LED) unit disposed in each of the plurality of sub-pixels, each of the lower LED units having a first semiconductor stack configured to generate light of a first wavelength, the lower LED unit including a first lower LED unit, a second lower LED unit, and a third lower LED unit, the second-level region including: a transparent resin structure disposed on the first lower LED unit, an inter-unit insulating layer disposed on the second lower LED unit, an upper LED unit disposed on the inter-unit insulating layer and having a second semiconductor stack configured to generate light of a second wavelength, and a wavelength conversion structure disposed on the third lower LED unit and configured to convert light of the first wavelength into light of a third wavelength.

[0010] According to an embodiment, a display device is provided, including: a circuit board including a driving circuit; and a pixel array including a wiring layer disposed on the circuit board and a pixel light source layer providing a light source for a plurality of pixels, each of the plurality of pixels including a plurality of sub-pixels having a first sub-pixel, a second sub-pixel, and a third sub-pixel, the pixel light source layer being divided into a first hierarchical region and a second hierarchical region disposed on the first hierarchical region, wherein the first hierarchical region includes a lower LED unit in each of the plurality of sub-pixels, and each of the lower LED units has a first semiconductor stack configured to generate light of a first wavelength, and the second hierarchical region includes: a transparent resin structure disposed on the lower LED unit of the first sub-pixel, an inter-unit insulating layer disposed in the second sub-pixel, an upper LED unit having a second semiconductor stack disposed on the inter-unit insulating layer and configured to generate light of a second wavelength, and a wavelength conversion structure disposed on the lower LED unit of the third sub-pixel and configured to convert light of the first wavelength into light of a third wavelength. Attached Figure Description

[0011] The above and other aspects, features, and advantages of the present invention will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 This is a schematic perspective view of an LED display device according to an example embodiment;

[0013] Figure 2 yes Figure 1 An enlarged plan view of part A;

[0014] Figure 3 It is along Figure 2 The side section view taken from line II′;

[0015] Figure 4 This is a side cross-sectional view showing the structure of the common electrode of an LED display device according to an example embodiment;

[0016] Figure 5 This is a driving circuit diagram of a display device according to an example embodiment;

[0017] Figure 6 This is a side cross-sectional view of an LED display device according to an example embodiment;

[0018] Figure 7 This is a side cross-sectional view of an LED display device according to an example embodiment;

[0019] Figures 8A to 8D This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment;

[0020] Figure 9 It is shown Figure 8C A schematic 3D diagram of the wafer bonding process;

[0021] Figures 10A to 10H This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment;

[0022] Figures 11A to 11D This is a plan view illustrating a method of manufacturing an LED display device according to an example embodiment;

[0023] Figure 12 It is shown Figure 10E A schematic 3D diagram of the wafer bonding process;

[0024] Figures 13A to 13D This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment;

[0025] Figures 14A to 14C This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment;

[0026] Figures 15A to 15H This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment; and

[0027] Figure 16A and Figure 16B This is a plan view illustrating a method for manufacturing an LED display device according to an example embodiment. Detailed Implementation

[0028] In the following description, exemplary embodiments will be illustrated with reference to the accompanying drawings.

[0029] It will be understood that when an element, component, layer, pattern, structure, region, etc., of a semiconductor device (collectively referred to below as "element") is described as being "above," "over," "above," "below," "under," "connected to," or "coupled to" another element of the semiconductor device, it may be directly above, below, connected to, or coupled to the other element, or there may be intermediate elements. Conversely, when an element of a semiconductor device is described as being "directly above," "directly above," "directly on," "directly below," "directly below," "directly below," "directly connected to," or "directly coupled to" another element of the semiconductor device, there are no intermediate elements. In this disclosure, the same reference numerals denote the same elements.

[0030] For ease of description, spatial relative terms such as “above,” “over,” “upper,” “top,” “upper part,” “lower,” “below,” “below,” “lower part,” etc., are used herein to describe the relationship of one element to another element shown in the figure. It should be understood that spatial relative terms are intended to include different orientations of the semiconductor device in use or operation other than those shown in the figure. For example, if the semiconductor device in the figure were flipped, an element described as “below” or “below” other elements would be oriented as “above” other elements. Therefore, the term “below” can include both above and below orientations. Semiconductor devices may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein shall be interpreted accordingly.

[0031] As used herein, expressions such as "at least one of" modify the entire list of elements when following a list of elements, not individual elements within the list. For example, the expression "at least one of A, B, and C" should be understood as including only A, only B, only C, including both A and B, including both A and C, including both B and C, or including all of A, B, and C. Here, when the term "identical" is used to compare the dimensions of two or more elements, the term can encompass dimensions that are "substantially identical."

[0032] It should be understood that although the terms first, second, third, fourth, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of the inventive concept, the first element discussed below may be referred to as the second element.

[0033] It should also be understood that even if a step or operation in manufacturing the apparatus or structure of the present invention is described after another step or operation, that step or operation may be performed before the other step or operation, unless the step or operation is described as being performed after the other step or operation.

[0034] This document describes one or more embodiments with reference to cross-sectional views as schematic diagrams of examples (and intermediate structures). Therefore, variations in the illustrated shapes are expected, for example, due to manufacturing techniques and / or tolerances. Thus, one or more embodiments should not be construed as limited to the specific shapes of the regions shown herein, but rather include shape deviations, for example, due to manufacturing processes. For example, implantation regions illustrated as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary variation from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface through which implantation occurs. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shapes of device regions and are not intended to limit the scope of the inventive concept. Furthermore, in the figures, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity.

[0035] For the sake of brevity, conventional elements of semiconductor devices may or may not be described in detail herein. However, even if a particular element is described or shown in the semiconductor device of this disclosure, that element may not be included in the claimed semiconductor device unless the element is described as being included in the claimed semiconductor device.

[0036] Figure 1 This is a schematic perspective view of an LED display device according to an example embodiment, and Figure 2 It is shown Figure 1 A magnified plan view of part "A".

[0037] Reference Figure 1 and Figure 2 The display device 10 according to an example embodiment includes: a circuit board 200 including driving circuitry; and a pixel array 100 (also referred to as an "LED module for display"). The pixel array 100 may be disposed on the circuit board 200 and may include a plurality of pixels PX. In addition, the display device 10 may also include a frame 11 surrounding the circuit board 200 and the pixel array 100.

[0038] Each of the plurality of pixels PX according to an embodiment may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 configured to emit light of a specific wavelength (e.g., color) to provide a color image. For example, the first to third sub-pixels SP1, SP2, and SP3 may be configured to emit red light, green light, and blue light, respectively. In each pixel, the first to third sub-pixels SP1, SP2, and SP3 may be arranged in a Bayer pattern. For example, the plurality of pixels PX may include a first sub-pixel SP1 and a third sub-pixel SP3 arranged along a first diagonal direction, and two second sub-pixels SP2 arranged along a second diagonal direction intersecting the first diagonal direction.

[0039] In this embodiment, pixel PX is described as being arranged in a 2×2 Bayer pattern, from the first sub-pixels to the third sub-pixels SP1, SP2, and SP3. However, the arrangement is not limited to this. In other embodiments, each pixel (PX) can be configured in a different arrangement, such as 3×3 or 4×4. In addition, some sub-pixels can also be configured to emit light of a different color (e.g., yellow) than the indicated colors (R, G, B).

[0040] like Figure 1 As shown, the pixel (PX) array 100 in this embodiment can be arranged in a 15×15 configuration, but the number of rows and columns can be implemented in any suitable manner (e.g., 1,024×768). Depending on the desired resolution, the pixel array 100 can have different arrangements.

[0041] Frame 11 may be disposed around LED module 100 and provided as a guide defining the arrangement space of the pixel PX array. Frame 11 may comprise at least one material such as polymer, ceramic, semiconductor, and metal. In a particular example, frame 11 may comprise a black matrix. Frame 11 is not limited to a black matrix and, depending on the application of the product, may use a white matrix or other colored structures as frame 11. For example, a white matrix may comprise a reflective or scattering material.

[0042] The display device 10 in this embodiment is shown as having a quadrilateral planar structure, but it can have structures with different shapes. In some embodiments, the circuit board 200 may be a driving circuit board including TFT units. In some embodiments, the circuit board 200 may include a portion of the driving circuitry for the display device and other driving devices. In some embodiments, the circuit board 200 may be formed using a flexible substrate to realize a display device with a curved profile.

[0043] In this embodiment, the light source for the first to third sub-pixels SP1, SP2, and SP3 can be implemented by LED units arranged in a two-layer stacked structure, such as... Figure 3 As shown. Figure 3 yes Figure 2 The image shows a cross-sectional side view of the device along line II′.

[0044] Reference Figure 3 The display device 10 according to this embodiment includes a circuit board 200 and a pixel array 100 disposed on the circuit board 200. The pixel array 100 includes, for example: Figure 1 and Figure 2 The multiple pixels shown are arranged on the circuit board 200. Figure 3 The cross-sectional view shown can be understood as an example of the structure of a pixel PX among multiple pixels.

[0045] The pixel array 100 may include a wiring layer 160 disposed on the circuit board 200 and a pixel light source layer 190 disposed on the wiring layer 160 and providing light sources for the respective first to third sub-pixels SP1, SP2 and SP3. The pixel array 100 may include light-blocking separators 150 disposed between the first sub-pixel SP1, the second sub-pixel SP2 and the third sub-pixel SP3.

[0046] The first to third sub-pixels SP1, SP2, and SP3 may each include a first lower LED unit LC_A1, a second lower LED unit LC_A2, and a third lower LED unit LC_A3. Specifically, the first sub-pixel SP1 may include the first lower LED unit LC_A1, the second sub-pixel SP2 may include the second lower LED unit LC_A2, and the third sub-pixel SP3 may include the third lower LED unit LC_A3. Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may include a first semiconductor stack SL1 configured to generate light of a first wavelength. For example, the first wavelength of light may be blue light (e.g., 435 nm to 460 nm).

[0047] The first semiconductor stack SL1 may include a first conductivity type semiconductor layer 122, an active layer 125, and a second conductivity type semiconductor layer 127. In some embodiments, the first semiconductor stack SL1 may include a nitride semiconductor. For example, the first conductivity type semiconductor layer 122 may include n-type In... x Al y Ga 1-x-y The active layer 125 can be an N-type (0≤x<1, 0≤x+y<1) nitride semiconductor, and for example, the n-type impurity can include Si, Ge, Se, or Te. The active layer 125 can have a multiple quantum well (MQW) structure in which quantum well layers and quantum barrier layers are stacked alternately. For example, the quantum well layers and quantum barrier layers can be In with different compositions. x Al y Ga 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) layers. In a specific example, the quantum well layer could be In... x Ga 1-x N (0 < x ≤ 1), and the quantum barrier layer can be GaN or AlGaN. For example, as described above, the active layer 125 can be configured to emit blue light (e.g., 435 nm to 460 nm). The second conductivity type semiconductor layer 127 can include p-type In. x Al y Ga 1-x-yA nitride semiconductor layer of N (0≤x<1, 0≤y<1, 0≤x+y<1), for example, p-type impurities may include Mg, Zn, or Be. It should be understood that although a first semiconductor stack SL1 is shown only with respect to one of the second sub-pixels SP2, each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may include a first semiconductor stack SL1 having a first conductivity type semiconductor layer 122, an active layer 125, and a second conductivity type semiconductor layer 127.

[0048] The first sub-pixel SP1 may include a transparent resin structure 191 (or a transparent resin layer) disposed on the first lower LED unit LC_A1. For example, the transparent resin structure 191 may include a transparent resin such as silicone resin or epoxy resin, or silicon oxide such as SiO2. In the first sub-pixel SP1, blue light B generated from the first lower LED unit LC_A1 can be emitted through the transparent resin structure 191 as is.

[0049] The third sub-pixel SP3 may further include a wavelength conversion structure 192 (or wavelength conversion layer) disposed on the third lower LED unit LC_A3. The wavelength conversion structure 192 may be configured to convert light of a first wavelength into light of a third wavelength. In some embodiments, the wavelength conversion structure 192 may include a wavelength conversion material 192a that converts light of the first wavelength (e.g., blue light) into light of the third wavelength (e.g., red light), and a transparent resin 192b mixed with the wavelength conversion material 192a. For example, the wavelength conversion material 192a may be a phosphor or a quantum dot. In the third sub-pixel SP3, blue light generated from the third lower LED unit LC_A3 can be converted into red light R by the wavelength conversion structure 192 and then emitted.

[0050] The second sub-pixel SP2 may include an inter-cell insulating layer 105 disposed on the second lower LED cell LC_A2, and an upper LED cell LC_B having a second semiconductor stack SL2 disposed on the inter-cell insulating layer 105 and configured to generate light of a second wavelength (e.g., green light). The inter-cell insulating layer 105 electrically isolates the second lower LED cell LC_A2 from the upper LED cell LC_B. From a process perspective, the inter-cell insulating layer 105 may be an oxide layer for wafer bonding of the first semiconductor stack SL1 and the second semiconductor stack SL2 (see [link to relevant documentation]). Figure 8C and Figure 9 For example, the inter-unit insulating layer 105 may include at least one of SiO2, SiN, SiCN, SiOC, SiON, and SiOCN.

[0051] Similar to the first semiconductor stack SL1, the second semiconductor stack SL2 may include a first conductivity type semiconductor layer 142, an active layer 145, and a second conductivity type semiconductor layer 147. However, as described above, the active layer 145 of the second semiconductor stack SL2 may be configured to emit green light (e.g., 480 nm to 530 nm). In the second sub-pixel SP2, the second lower LED unit LC_A2 is not driven, while only the upper LED unit LC_B is driven, thereby emitting green light G generated from the upper LED unit LC_B.

[0052] As described above, the first level region of the pixel light source layer 190 may include first lower LED units to third lower LED units LC_A1, LC_A2, and LC_A3, which together include a first semiconductor stack SL1. On the other hand, the second level region located on the first level region may be implemented differently for corresponding first to third sub-pixels SP1, SP2, and SP3 to emit light of different colors.

[0053] In the first semiconductor stack SL1 and the second semiconductor stack SL2 located in the first and second layer regions respectively, the second conductivity type semiconductor layers 127 and 147 may be configured to be closer to the circuit board 200 than the first conductivity type semiconductor layers 122 and 142.

[0054] Each of the first to third lower LED units LC_A1, LC_A2, and LC_A3 may include an ohmic contact layer 132 disposed on the lower surface of the second conductivity type semiconductor layer 127. Similarly, the upper LED unit LC_B may include an ohmic contact layer 136 disposed on the lower surface of the second conductivity type semiconductor layer 147. Ohmic contact layers 132 and 136 may include a highly reflective metal. For example, ohmic contact layers 132 and 136 may include materials such as Ag, Ni, Al, Cr, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, etc.

[0055] On the other hand, each of the first to third lower LED units LC_A1, LC_A2, and LC_A3 may include a light-transmitting ohmic contact layer 131 disposed on the upper surface of the first conductivity type semiconductor layer 122. For example, the light-transmitting ohmic contact layer 131 may include ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, or In4Sn3O. 12 or Zn (1-x) Mg xO(0≤x≤1). Similarly, the upper LED unit LC_B may include a light-transmitting ohmic contact layer disposed on the upper surface of the first conductivity type semiconductor layer 142. The aforementioned inter-unit insulating layer 105 may be disposed between the light-transmitting ohmic contact layer 131 of the second lower LED unit LC_A2 and the high-reflectivity ohmic contact layer 136 of the upper LED unit LC_B.

[0056] In this embodiment, the wiring layer 160 may include a wiring insulating layer 161 disposed between the circuit board 200 and the pixel light source layer 190, first and third individual electrodes 165A and second individual electrodes 165B penetrating the wiring insulating layer 161 and connecting the corresponding first to third sub-pixels SP1, SP2 and SP3 to the driving circuit, and a common electrode structure that connects the first to third sub-pixels SP1, SP2 and SP3 to the driving circuit. Specifically, the first and third individual electrodes 165A may be connected to the first sub-pixel SP1 and the third sub-pixel SP3 respectively, and the second individual electrode 165B may be connected to the second sub-pixel SP2.

[0057] For example, the first and third individual electrodes 165A can penetrate the wiring insulating layer 161 and can electrically connect the second conductivity type semiconductor layers 127 of the first lower LED unit LC_A1 and the third lower LED unit LC_A3 to the driving circuit, respectively. On the other hand, the second individual electrode 165B can penetrate the wiring insulating layer 161, the second lower LED unit LC_A2, the first semiconductor stack SL1, and the inter-unit insulating layer 105 to electrically connect the second conductivity type semiconductor layer 127 of the upper LED unit LC_B to the driving circuit. In this embodiment, the second lower LED unit LC_A2 penetrated by the second individual electrode 165B can be an undriven passive LED unit.

[0058] like Figure 3 As shown, the common electrode structure in this embodiment may include a transparent electrode layer 180, which is disposed on the first conductivity type semiconductor layer 142 of the upper LED unit LC_B and extends to the first conductivity type semiconductor layer 122 of the first lower LED unit LC_A1 and the third lower LED unit LC_A3. Additionally, as... Figure 4 As shown, the transparent electrode layer 180 may have a portion 180E extending into another passive LED unit NL. A common electrode 165C penetrating the wiring insulation layer 161 and the other passive LED unit NL can connect the extension portion 180E of the transparent electrode layer 180 to the driving circuit. The common electrode 165C may be manufactured together with the first and third individual electrodes 165A and the second individual electrode 165B.

[0059] In this embodiment, the first to third lower LED units LC_A1, LC_A2, and LC_A3, as well as the upper LED unit LC_B, may each have a downwardly sloping side surface. With regard to the second sub-pixel SP2, the side surface of the second lower LED unit LC_A2, the side surface of the inter-unit insulating layer 105, and the side surface of the upper LED unit LC_B may provide continuously sloping side surfaces. This continuously sloping side surface can be understood as a side surface formed in an etching process performed along a single direction (see [link to relevant documentation]). Figure 10A ).

[0060] The light-blocking separator 150 is introduced to prevent optical interference between the first sub-pixel and the third sub-pixels SP1, SP2, and SP3. The light-blocking separator 150 has a structure in which the lower surface of the first sub-pixel to the third sub-pixel SP1, SP2, and SP3 extends toward the upper surface of the first sub-pixel to the third sub-pixel SP1, SP2, and SP3. In this embodiment, the light-blocking separator 150 may have a tapered shape with an upper width smaller than a lower width.

[0061] The light-blocking separator 150 may include an insulating film 151 disposed on the side surfaces of the first sub-pixel to the third sub-pixel SP1, SP2 and SP3, a reflective metal film 155 disposed on the insulating film 151, and a filling insulating structure 159 (or filling insulating layer) disposed on the reflective metal film 155.

[0062] For example, the insulating film 151 may include at least one of SiO2, SiN, SiCN, SiOC, SiON, and SiOCN. The insulating film 151 may be formed relatively conformally. For example, the reflective metal film 155 may include Ag, Ni, or Al. The filling insulating structure 159 may include silicon oxide or a silicon oxide-based insulating material, such as tetraethyl orthosilicate (TEOS), undoped silicate glass (USG), phosphosilicate glass (PSG), borosilicate glass (BSG), borophosphosilicate glass (BPSG), fluoride silicate glass (FSG), spin-coated glass (SOG), Tonen silazane (TOSZ), or combinations thereof. The reflective structure of the light-blocking separator 150 may be implemented as a distributed Bragg reflection (DBR) layer or an omnidirectional reflection (ODR) layer. For example, a distributed Bragg reflection (DBR) layer may be formed by alternately stacking a first dielectric layer and a second dielectric layer with different refractive indices. A dielectric DBR layer may be formed instead of the reflective metal film 155, and in this case, the insulating film 151 may be omitted.

[0063] In this embodiment, the height of the light-blocking separator 150 can correspond to the thickness of the first to third sub-pixels SP1, SP2, and SP3. For example, the upper end of the light-blocking separator 150 can be located at a horizontal height substantially the same as the upper surface of the upper LED unit LC_B. The transparent electrode layer 180 can extend along the upper end of the light-blocking separator 150 and the side surfaces adjacent to the first sub-pixel SP1 and the third sub-pixel SP3 to the first conductivity type semiconductor layer 122 of the first lower LED unit LC_A1 and the third lower LED unit LC_A3. In this case, the upper end of the light-blocking separator 150 can be provided by an insulating film 151.

[0064] The circuit board 200 in this embodiment may include a wiring connection layer 280 and a device layer 250. A driving circuit including multiple TFT cells 245 is implemented in the device layer 250. The device layer 250 may include: a driving circuit including a semiconductor substrate 210 and TFT cells 245 formed on the semiconductor substrate 210; an interconnect portion 242 electrically connected to the TFT cells 245; and an interlayer insulating film 241 disposed on the semiconductor substrate 210 and covering the driving circuit and the interconnect portion 242. For example, the semiconductor substrate 210 may include a semiconductor such as Si or Ge, or a compound semiconductor such as SiGe, SiC, GaAs, InAs, or InP.

[0065] The wiring connection layer 280 may include a dielectric layer 281 disposed on the interlayer insulating film 241 and metal wiring 285 disposed on the dielectric layer 281 and connected to the interconnect portion 242. The metal wiring 285 may be electrically connected to the drive circuit through the interconnect portion 242. The dielectric layer 281 may have a substantially flat surface in contact with the surface of the wiring insulating layer 161.

[0066] The wiring connection layer 280 may include bonding pads 285P disposed on the metal wiring 285 and exposed to the wiring layer 160. The bonding pads 285P may have a substantially flat surface that is coplanar with the surface of the dielectric layer 281. The flat surface of the dielectric layer 281 is bonded to the flat bottom surface of the wiring layer 160, and the bonding pads 285P are respectively connected to the first and third individual electrodes 165A, the second individual electrode 165B, and the common electrode 165C.

[0067] The driving circuitry including the plurality of TFT cells 245 implemented on the circuit board 200 may be a driving circuitry for controlling the driving of pixels (specifically, sub-pixels). The semiconductor substrate 210 may include a through electrode 263, such as a through-silicon via (TSV), connected to the driving circuitry, and a first wiring 261 and a second wiring 262 connected to the through electrode. For example, the drain regions of the plurality of TFT cells 245 may be connected to the first wiring 261 via the through electrode 263, and the first wiring 261 may be connected to a data line.

[0068] Figure 5 A driving circuit implemented in a display device according to an example embodiment is shown.

[0069] Reference Figure 5 The diagram shows a circuit diagram of a display device 10 with n×n sub-pixels. The first to third sub-pixels SP1, SP2, and SP3 can receive data signals via data lines D1 to Dn, which are respectively paths in the vertical direction (row direction). The first to third sub-pixels SP1, SP2, and SP3 can receive control signals (e.g., gate signals) via gate lines G1 to Gn, which are horizontal (column) paths.

[0070] Multiple pixels PX, including first sub-pixels to third sub-pixels SP1, SP2, and SP3, provide an active region DA for display, and the active region DA is provided as the user's display area. A passive region NA of the display device 10 may be formed along one or more edges of the active region DA. In the passive region NA, there are no pixels PX along the periphery of the display device 10, and the passive region NA may correspond to the frame 11 of the display device 10.

[0071] The first driver circuit 12 and the second driver circuit 13 can be configured to control the operation of pixel PX, for example, the operation of multiple sub-pixels SP1, SP2, and SP3. Some or all of these first driver circuits 12 and second driver circuits 13 can be implemented on the device layer 250 of the circuit board 200. The first driver circuits 12 and second driver circuits 13 can be formed as integrated circuits, thin-film transistor panel circuits, or other suitable circuits, and can be disposed in the passive region NA of the display device 10. The first driver circuits 12 and second driver circuits 13 may include a microprocessor, a memory such as a storage device, processing circuitry, and communication circuitry. During operation, the system control circuitry can provide image information IS to be displayed on the display device 10 to the first driver circuits 12 and second driver circuits 13.

[0072] To display an image on pixel PX, the first driver circuit 12 sends clock signals and other control signals to the second driver circuit 13 (also referred to as the "gate driver circuit"), while simultaneously providing image data to data lines D1 to Dn. The second driver circuit 13 can be implemented using integrated circuits and / or thin-film transistor circuits. Gate signals used to control the arrangement of the first to third sub-pixels SP1, SP2, and SP3 along the column direction can be transmitted via the gate lines G1 to Gn of the display device.

[0073] As described above, the LED display device according to this embodiment provides a light source with a two-layer structure having a lower LED unit and an upper LED unit that emit light of different wavelengths, and a light conversion structure is partially introduced in the upper layer to achieve the desired pixels. The LED display device according to this embodiment can be implemented by changing to various structures.

[0074] Figure 6 This is a side cross-sectional view of an LED display device according to an example embodiment.

[0075] Reference Figure 6 The LED display device 10A according to the example embodiment can be understood as having the same characteristics as... Figures 1 to 4 The LED display device 10 shown has a similar structure, except that the height of the light-blocking separator 150A is lower than the height of the first to third sub-pixels SP1, SP2, and SP3, and an additional side reflective layer is introduced. Unless otherwise stated, refer to... Figures 1 to 4 The components of this embodiment are understood by referring to the description of the same or similar components of the LED display device 10 shown in the figure.

[0076] Unlike the embodiments described above, in this embodiment, the upper end of the light-blocking separator 150A is positioned above the active layer 145 of the upper LED unit LC_B, but below the upper surface of the upper LED unit LC_B. Because the light-blocking separator 150A has a relatively low height, optical interference between sub-pixels SP1, SP2, and SP3 may occur. To prevent optical interference, the pixel array 100A may further include a side reflective layer 175, which is disposed in the side region of the upper LED unit LC_B above the upper end of the light-blocking separator 150A. The side reflective layer 175 may extend to the side surface of the light-blocking separator 150A, adjacent to the first sub-pixel SP1 and the third sub-pixel SP3.

[0077] As described above, in this embodiment, the side reflective layer 175 can be provided together with the light blocking separator 150A to prevent optical interference between sub-pixels SP1, SP2 and SP3.

[0078] Figure 7This is a side cross-sectional view of an LED display device according to an example embodiment.

[0079] Reference Figure 7 The display device 10B according to an example embodiment includes a circuit board 200 and a pixel array 100B disposed on the circuit board 200. The pixel array 100B includes a plurality of pixels having a pattern similar to that of the embodiments described above. Unless otherwise indicated, reference can be made to... Figures 1 to 4 The components of this embodiment are understood by referring to the description of the same or similar components of the LED display device 10 described in the previous section.

[0080] The pixel array 100B in this embodiment may include a wiring layer 160 disposed on the circuit board 200 and a pixel light source layer 190B. The pixel light source layer 190B provides light sources for the first to third sub-pixels SP1, SP2 and SP3 disposed on the wiring layer 160. The pixel light source layer 190B may be divided into a first-level region and a second-level region disposed on the first-level region.

[0081] The first layer region is located in each of the first to third sub-pixels SP1, SP2, and SP3, and may include a lower LED unit LC_A having a first semiconductor stack SL1 configured to generate light of a first wavelength. Conversely, the second layer region may include a transparent resin structure 191 disposed on the lower LED unit LC_A of the first sub-pixel SP1, and a wavelength conversion structure 192 disposed on the lower LED unit LC_A of the third sub-pixel SP3 and configured to convert light of the first wavelength into light of a third wavelength. Furthermore, the second layer region may include an inter-cell insulating layer 105 disposed in the second sub-pixel SP2, and an upper LED unit LC_B having a second semiconductor stack SL2 disposed on the inter-cell insulating layer 105 and configured to generate light of a second wavelength.

[0082] Unlike the above embodiments, in this embodiment, the lower LED unit LC_A is not located in the first-level region of the second sub-pixel SP2, and a portion of the wiring insulation layer 161 can extend into the second-level region.

[0083] Furthermore, instead of the light-blocking separator 150 of the above embodiment, the pixel array 100B in this embodiment may also include a first reflective layer 155' disposed on the side surface and the lower surface of the lower LED unit LC_A, and a second reflective layer 175' disposed on the side surface of the upper LED unit LC_B and the side surface of the inter-unit insulating layer 105. The first reflective layer 155' and the second reflective layer 175' can be disposed after forming the insulating film 151' on the surfaces of the lower LED unit LC_A and the upper LED unit LC_B. In another embodiment, at least one of the first reflective layer and the second reflective layer can replace the DBR layer. In this case, the insulating film 151' can be omitted.

[0084] Similar to the embodiments described above, the first semiconductor stack SL1 and the second semiconductor stack SL2 may each include first conductivity type semiconductor layers 122 and 142, active layers 125 and 145, and second conductivity type semiconductor layers 127 and 147. The second conductivity type semiconductor layers 127 and 147 may be configured to be adjacent to the circuit board 200 relative to the first conductivity type semiconductor layers 122 and 142.

[0085] Each of the lower LED units LC_A may further include a high-reflectivity ohmic contact layer 132 disposed on the lower surface of the second conductivity type semiconductor layer 127 and a light-transmitting ohmic contact layer 131 disposed on the upper surface of the first conductivity type semiconductor layer 122. In addition, the upper LED unit LC_B may further include a high-reflectivity ohmic contact layer 136 disposed on the lower surface of the second conductivity type semiconductor layer 147.

[0086] In this embodiment, the light-transmitting ohmic contact layer 131 of the lower LED unit LC_A may have an extension that overlaps with the upper LED unit LC_B in the vertical direction. For example, the area of ​​the light-transmitting ohmic contact layer 131 may be larger than the area of ​​the lower LED unit LC_A. The first reflective layer 155' may extend to the lower surface of the extension of the light-transmitting ohmic contact layer 131.

[0087] In this embodiment, each of the lower LED units LC_A may have a side surface that is inclined in the downward direction, and conversely, the upper LED unit LC_B may have a side surface that is inclined in the upward direction. The side surfaces of the upper LED unit LC_B and the side surfaces of the inter-unit insulating layer 105 may provide continuously inclined side surfaces.

[0088] The wiring layer 160 may include a wiring insulation layer 161 disposed between the circuit board 200 and the pixel light source layer 190, first and third individual electrodes 165A and second individual electrodes 165B that penetrate the wiring insulation layer 161 and connect the corresponding first to third sub-pixels SP1, SP2 and SP3 to the driving circuit, and a common electrode layer 180 that connects the first to third sub-pixels SP1, SP2 and SP3 to the driving circuit.

[0089] Specifically, the first and third individual electrodes 165A can penetrate the wiring insulation layer 161 and can electrically connect the second conductivity type semiconductor layer 127 of the lower LED unit LC_A to the driving circuit. On the other hand, the second individual electrode 165B can penetrate the wiring insulation layer 161 and the inter-unit insulation layer 105 and can electrically connect the second conductivity type semiconductor layer 127 of the upper LED unit LC_B to the driving circuit.

[0090] Figures 8A to 8D This is a cross-sectional view showing the process of forming an epitaxial bonding structure for a pixel light source layer in a method of manufacturing an LED display device according to an example embodiment.

[0091] First, refer to Figure 8A A first semiconductor stack SL1 can be formed on the first growth substrate 101A.

[0092] The first growth substrate 101A may include an insulating material, a conductive material, or a semiconductor material, such as sapphire, Si, SiC, MgAl2O4, MgO, LiAlO2, LiGaO2, GaN, etc. The first semiconductor stack SL1 may include a first conductivity type semiconductor layer 122, an active layer 125, and a second conductivity type semiconductor layer 127 sequentially formed on the first growth substrate 101A. For example, each layer of the first semiconductor stack SL1 may be a nitride semiconductor layer, as described above, and may be grown using processes such as metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), and molecular beam epitaxy (MBE).

[0093] Although not shown in the accompanying drawings, a buffer layer and an undoped semiconductor layer (e.g., undoped GaN) may be additionally formed on the upper surface of the first growth substrate 101A before forming the first semiconductor stack SL1. The first conductivity type semiconductor layer 122 may be formed of a semiconductor doped with n-type impurities, and may be an n-type nitride semiconductor layer. The second conductivity type semiconductor layer 127 may be formed of a semiconductor doped with p-type impurities, and may be a p-type nitride semiconductor layer. As described above, the active layer 125 may be configured to emit light of a first wavelength (e.g., blue light).

[0094] Additionally, an ohmic contact layer 132 may be formed on the second conductivity type semiconductor layer 127. In some embodiments, the ohmic contact layer 132 may be a high-reflectivity ohmic contact layer. For example, a high-reflectivity ohmic contact layer may include Ag, Cr, Ni, Ti, Al, Rh, Ru, Au, or combinations thereof.

[0095] Next, refer to Figure 8B The support structures 102 and 104 are bonded to the upper surface of the first semiconductor stack SL1, and a light-transmitting ohmic contact layer 131 can be formed on the lower surface of the first semiconductor stack SL1 (e.g., a first conductivity type semiconductor layer 122).

[0096] The support structure according to the embodiment may include a support substrate 102 such as a silicon substrate and a dielectric layer 104 such as silicon oxide. After depositing the dielectric layer 104 on the support substrate 102, the upper surface of the dielectric layer 104 may be planarized, and a fusion bonding process may be performed on the high-reflectivity ohmic contact layer 132. After fusion bonding, the first growth substrate 101A may be removed, and a light-transmitting ohmic contact layer 131 may be formed on the first conductivity type semiconductor layer 122. After removing the first growth substrate 101A, a polishing process may be performed to additionally remove the buffer layer and the undoped semiconductor layer. For example, the light-transmitting ohmic contact layer 131 may include ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O. 12 or Zn (1-x) Mg x O(0≤x≤1).

[0097] Next, refer to Figure 8C A second semiconductor stack SL2 can be formed on the second growth substrate 101B, and a first semiconductor stack SL1 can be bonded to the second semiconductor stack SL2.

[0098] For example, similar to the first growth substrate 101A, the second growth substrate 101B may include an insulating material, a conductive material, or a semiconductor material, such as sapphire, SiC, MgAl2O4, MgO, LiAlO2, LiGaO2, GaN, etc. The second semiconductor stack SL2 may include a first conductivity type semiconductor layer 142, an active layer 145, and a second conductivity type semiconductor layer 147 sequentially formed on the second growth substrate 101B. For example, the second semiconductor stack SL2 may be a nitride semiconductor layer, similar to the first semiconductor stack SL1. However, the active layer 145 may be configured to emit light of a second wavelength (e.g., green light).

[0099] A transparent ohmic contact layer 136 can be formed on the second semiconductor stack SL2. The transparent ohmic contact layer 136 may include ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O 12 or Zn (1-x) Mg x O(0≤x≤1). After depositing a dielectric layer 105 (or inter-cell insulating layer) on the transparent ohmic contact layer 136, the upper surface of the dielectric layer 105 is planarized. The dielectric layer 105 may include at least one of, for example, SiO2, SiN, SiCN, SiOC, SiON, and SiOCN. Subsequently, a fused bonding is performed on the transparent ohmic contact layer 131 of the first semiconductor stack SL1 on the planarized upper surface of the dielectric layer 105. Figure 9 As shown, the process of bonding the first semiconductor stack SL1 and the second semiconductor stack SL2 can be performed at the wafer level. A hybrid epitaxial bonding structure can be provided in which the first semiconductor stack SL1 and the second semiconductor stack SL2 are bonded to each other by a wafer-level bonding process.

[0100] Next, refer to Figure 8D The support substrate 102 can be removed from the hybrid epitaxial bonding structure in which the first semiconductor stack SL1 and the second semiconductor stack SL2 are bonded to each other. In the process of removing the support substrate 102, the dielectric layer 104 can be removed together. In another embodiment, a portion of the dielectric layer 104 can be retained on the ohmic contact layer 132.

[0101] Therefore, it can be used Figure 8D The hybrid epitaxial bonding structure shown is used to fabricate the pixel array of an LED display device. Specifically, LED cells located on two layers can be fabricated using a first semiconductor stack SL1 and a second semiconductor stack SL2 of the hybrid epitaxial bonding structure. Based on this manufacturing process, LED display devices with various structures can be manufactured.

[0102] Figures 10A to 10H This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment, and Figures 11A to 11D It is shown Figure 10A , Figure 10C , Figure 10D and Figure 10H A plan view of the process.

[0103] Reference Figure 10A and Figure 11A The etching process can be performed by dividing the hybrid epitaxial bonding structure into sub-pixel regions.

[0104] A first LED unit LC_A and a second LED unit LC_B are disposed in each sub-pixel region. The first LED unit LC_A and the second LED unit LC_B can be divided by trenches ST arranged at predetermined intervals. The first LED unit LC_A and the second LED unit LC_B can be coupled by an inter-unit insulating layer 105 formed of a dielectric layer. Figure 11A As shown, the sub-pixel regions formed by this etching process can be arranged in a quadrilateral grid shape. The first LED unit LC_A is also referred to as the "lower LED unit," and the second LED unit LC_B is also referred to as the "upper LED unit" (see [reference]). Figure 3 , Figure 6 and Figure 7 ).

[0105] The trench ST is configured to divide the first semiconductor stack SL1 into a first LED unit LC_A and partially divide the second semiconductor stack SL2 to provide a second LED unit LC_B. At least an active layer 145 in the second semiconductor stack SL2 can be divided by the trench ST. In this embodiment, the trench ST can be formed to have sufficient depth to form... Figure 3 The light-blocking separator 150 is shown. Furthermore, the trench ST may have a cross-sectional shape where the upper width is greater than the lower width.

[0106] Next, refer to Figure 10B An insulating film 151, a reflective layer 155, and a filling insulating structure 159 can be formed sequentially to fill the trench ST.

[0107] To prevent unwanted connections between the reflective layer 155 and the first semiconductor stack SL1 and the second semiconductor stack SL2, an insulating film 151 may be formed prior to the formation of the reflective layer 155. For example, the insulating film 151 may include at least one of SiO2, SiN, SiCN, SiOC, SiON, and SiOCN. The insulating film 151 may be formed relatively conformally. For example, the reflective layer 155 may include a reflective metal such as Ag, Ni, or Al. The filling insulating structure 159 may include silicon oxide or a silicon oxide-based insulating material. In some embodiments, the reflective layer may be implemented as a distributed Bragg reflector (DBR) layer or an omnidirectional reflector (ODR) layer. When a DBR layer is introduced as the reflective layer 155, the insulating film 151 may be omitted.

[0108] Next, refer to Figure 10C and Figure 11BA planarization process can be performed to remove portions of the insulating structure 159 and the reflective layer 155 located on the first semiconductor stack SL1. This planarization process provides a light-blocking separator 150 located in the trench ST. The reflective layer 155 on the upper surface of the first semiconductor stack SL1 can be removed, while the insulating film 151 can remain on the upper surface of the first semiconductor stack SL1.

[0109] Next, refer to Figure 10D and Figure 11C A wiring insulating layer 161 can be formed on the first semiconductor stack SL1, and a first via electrode 165A and a second via electrode 165B can be formed thereon.

[0110] The wiring insulation layer 161 can be formed of a low-dielectric material such as silicon oxide. A first via electrode 165A can be formed to connect to the ohmic contact layer 132 of the first LED cell LC_A. A second via electrode 165B can be formed to penetrate the first LED cell LC_A and the inter-cell insulation layer 105 to connect to the ohmic contact layer 136 of the second LED cell LC_B. The first LED cell LC_A penetrated by the second via electrode 165B does not emit light. In the final structure, as described above, the first via electrode 165A can be configured as a first separate electrode and a third separate electrode, and the second via electrode 165B can be configured as a second separate electrode.

[0111] For example, the first via electrode 165A and the second via electrode 165B may comprise copper or a copper-containing alloy and may be formed using a dual damascene process.

[0112] Next, refer to Figure 10E It can Figure 10D The product is bonded to the circuit board 200 by connecting the first via electrode 165A and the second via electrode 165B to the drive circuit respectively.

[0113] In this embodiment, for ease of description, the detailed structure of the circuit board is omitted, but reference can be made to... Figure 3 To understand this, we need to describe the structure of the circuit board. Circuit board and Figure 10D The resulting product (intermediate product of the pixel array) can be integrally bonded using wafer bonding methods such as hybrid bonding. For example, the flat surface of dielectric layer 281 can be bonded to the flat surface of wiring layer 160, and bonding pads 285P can be bonded to the first via electrode 165A and the second via electrode 165B, respectively (see...). Figure 3 Although not shown, the via electrode used for the common electrode (see reference). Figure 4 The 165C pad can be similarly bonded to the 285P bonding pad. For example... Figure 12 As shown, this bonding process can be performed at the wafer level.

[0114] Next, refer to Figure 10F The second growth substrate 101B can be removed from the second semiconductor stack SL2, and the thickness of the second semiconductor stack SL2 can be reduced.

[0115] The thickness of the second semiconductor stack SL2 can be reduced by using a polishing process such as chemical mechanical planarization (CMP) on the second semiconductor stack SL2. This polishing process can be performed until the light-blocking separator 150 is exposed. The insulating film 151 of the light-blocking separator 150 can be exposed by this process.

[0116] Next, refer to Figure 10G The upper LED unit is selectively removed to expose the first lower LED unit LC_A1 and the third lower LED unit LC_A3 in the blue sub-pixel region and the red sub-pixel region, thereby forming the first opening region O1 and the second opening region O2.

[0117] This selective removal process can also remove the inter-cell insulating layer 105 and the upper LED cells in the blue and red sub-pixel regions, thereby exposing the light-transmitting ohmic contact layers 131 of the lower LED cells LC_A1 and LC_A3. Then, an electrode layer (or transparent electrode layer) 180 can be formed on the exposed surfaces of the light-transmitting ohmic contact layers 131 of the first semiconductor stack SL1 and the second semiconductor stack SL2, and on the surface of the first conductivity type semiconductor layer 142 of the remaining upper LED cell LC_B. The first opening region O1 and the second opening region O2 can be located in the layer region (or the second layer region) corresponding to the remaining upper LED cell LC_B and the inter-cell insulating layer 105.

[0118] Next, refer to Figure 10H and Figure 11D A transparent resin structure 191 and a wavelength conversion structure 192 can be formed in the first opening region O1 and the second opening region O2, respectively.

[0119] A transparent resin structure 191 is formed in the first opening region O1 of the blue sub-pixel SP1, while a wavelength conversion structure 192 is formed in the second opening region O2 of the red sub-pixel SP3. For example, the transparent resin structure 191 can be formed from a transparent resin such as silicone or epoxy resin, or from silicon oxide such as SiO2. The wavelength conversion structure 192 can be formed from a transparent resin 192b mixed with a wavelength conversion material 192a that converts blue light to red light. In the blue sub-pixel SP1, blue light B generated from the first lower LED unit LC_A1 is emitted as is through the transparent resin structure 191, while in the red sub-pixel SP3, blue light generated from the third lower LED unit LC_A3 can be converted into red light R by the wavelength conversion structure 192 and then emitted as red light R. On the other hand, in the green sub-pixel SP2, green light can be emitted from the upper LED unit LC_B. During this driving process, the second lower LED unit LC_A2 can function as a passive LED unit and not emit light.

[0120] Figures 13A to 13D This is a cross-sectional view illustrating a method for manufacturing an LED display device according to an example embodiment. The manufacturing process can be understood as... Figure 6 The manufacturing process of the LED display device 10A shown.

[0121] Reference Figure 13A This can form trenches used to divide the hybrid epitaxial bonding structure into sub-pixel regions.

[0122] and Figure 10A Similar to the process shown above, the trench ST′ used to form the first LED unit LC_A and the second LED unit LC_B can be formed in a grid shape. In this embodiment, the depth of the trench ST′ is less than that in the above reference. Figure 3 and Figure 4 The depth of the trench ST described in one or more embodiments.

[0123] Next, refer to Figure 13B An insulating film 151, a reflective layer 155, and a filling insulating structure 159 can be sequentially formed to fill the trench ST′. Subsequently, a planarization process can be performed to remove portions of the filling insulating structure 159 and the reflective layer 155 located on the first semiconductor stack SL1 to provide a light-blocking separator 150. Additionally, a wiring insulating layer 161 can be formed on the first semiconductor stack SL1, and a first via electrode 165A and a second via electrode 165B can be formed using a dual damascene process.

[0124] Next, refer to Figure 13C It can Figure 13BThe product is bonded to the circuit board 200, such that the first via electrode 165A and the second via electrode 165B are respectively connected to the drive circuit of the circuit board 200. This bonding process can be performed by wafer bonding methods such as hybrid bonding as described in the above embodiments. Subsequently, the second growth substrate 101B can be removed from the second semiconductor stack SL2, and the thickness of the second semiconductor stack SL2 can be reduced.

[0125] In this embodiment, unlike one or more of the embodiments described above, a polishing process can be performed on the second semiconductor stack SL2 so that the light-blocking separator 150 is not exposed. Even after the polishing process, a first conductivity type semiconductor layer 142 with a predetermined thickness d can be retained on the light-blocking separator 150.

[0126] Subsequently, referring to Figure 13D The upper LED unit is selectively removed, exposing the first lower LED unit LC_A1 and the third lower LED unit LC_A3 in the blue and red sub-pixel regions, respectively, to form the first opening region O1 and the second opening region O2. Additionally, a side reflective layer 175 can be formed before forming the transparent electrode layer 180. The side reflective layer 175 is introduced to prevent optical interference between sub-pixels SP1, SP2, and SP3. The side reflective layer 175 is disposed on the side region of the upper LED unit LC_B at a position higher than the upper end of the light-blocking separator 150, and can extend to the side regions of the light-blocking separator 150A exposed by the first opening region O1 and the second opening region O2. After forming a conformal reflective metal layer over the entire area, the side reflective layer 175 can be removed by selective etching or anisotropic etching so that it remains only in the side regions of the upper LED unit LC_B and the light-blocking separator 150. Then, a common electrode layer (or transparent electrode layer) 180 is formed on the exposed surface of the light-transmitting ohmic contact layer 131 of the first semiconductor stack SL1 and the second semiconductor stack SL2, and on the surface of the first conductivity type semiconductor layer 142 of the remaining LED unit LC_B.

[0127] Next, a transparent resin structure 191 is formed in the first opening region O1 of the blue sub-pixel SP1, and a wavelength conversion structure 192 is formed in the second opening region O2 of the red sub-pixel SP3 (see [link]). Figure 10H ), thereby creating Figure 6 The display device shown.

[0128] Figures 14A to 14C This is a cross-sectional view illustrating a method for manufacturing an LED display device according to an example embodiment. This manufacturing process can be understood as... Figures 13A to 13DThe process of manufacturing an LED display device shown in the figure is similar to that of a process, except that different types of light blocking separators are provided and a portion of the light blocking separators is connected to the transparent electrode layer 180 to form part of a common electrode.

[0129] Reference Figure 14A An insulating film 151 is conformally formed in the trench ST′, and the interior of the trench ST′ may be filled with a metallic material to form a filled metal portion 155′, replacing the reflective layer 155 and the filled insulating structure 159.

[0130] The fill metal portion 155' can be formed by depositing a fill metal material inside the trench and on the first semiconductor stack SL1, and then performing a planarization process to remove the portion located on the first semiconductor stack SL1. As described above, the light blocking separator 150' according to this embodiment may include an insulating film 151 and a fill metal portion 155', and can effectively block light between sub-pixels through the fill metal portion 155'.

[0131] Additionally, a wiring insulating layer 161 can be formed on the first semiconductor stack SL1, and a first via electrode 165A and a second via electrode 165B can be formed using a dual damascene process.

[0132] Next, refer to Figure 14B It can Figure 14A The product is bonded to the circuit board 200 by connecting the first via electrode 165A and the second via electrode 165B to the drive circuit of the circuit board 200, respectively. This bonding process can be performed by a wafer bonding method such as hybrid bonding similar to one or more embodiments described above. Subsequently, the second growth substrate 101B can be removed from the second semiconductor stack SL2, and the thickness of the second semiconductor stack SL2 can be reduced. In this embodiment, a polishing process can be performed on the second semiconductor stack SL2 so that the light-blocking separator 150′ is not exposed. After the polishing process, a first conductivity type semiconductor layer 142 with a predetermined thickness d can be formed on the light-blocking separator 150.

[0133] Subsequently, referring to Figure 14CThe upper LED unit can be selectively removed, exposing the first lower LED unit LC_A1 and the third lower LED unit LC_A3 in the blue sub-pixel region and the red sub-pixel region, respectively, to form the first opening region O1 and the second opening region O2. Additionally, before forming the transparent electrode layer 180, the insulating film 151 can be partially removed to expose a portion of the filling metal portion 155'. In this embodiment, a portion of the insulating film 151 located on the exposed upper surface of the light-blocking separator 150' can be removed. For example, this removal process can be performed using an anisotropic etching process. Next, a common electrode layer (or transparent electrode layer) 180 can be formed on the exposed surfaces of the light-transmitting ohmic contact layer 131 of the first semiconductor stack SL1 and the second semiconductor stack SL2 and on the surface of the remaining first conductivity type semiconductor layer 142 of the upper LED unit LC_B. In this embodiment, the transparent electrode layer 180 can contact the exposed region CT of the filling metal portion 155', and the filling metal portion 155' can be used as part of the common electrode structure. In the formation process of the first via electrode 165A and the second via electrode 165B described above, by forming via electrodes that contact the fill metal portion 155′, a common electrode structure (a combination of transparent electrode layer 180, fill metal portion 155′ and one or more additional via electrodes) can be connected to the drive circuit of the circuit board.

[0134] Furthermore, a transparent resin structure 191 is formed in the first opening region O1 of the blue sub-pixel SP1, and a wavelength conversion structure 192 is formed in the second opening region O2 of the red sub-pixel SP3 (see [link]). Figure 10H This allows for the manufacture of the necessary display devices.

[0135] Figures 15A to 15H This is a cross-sectional view illustrating a method of manufacturing an LED display device according to an example embodiment, and Figure 16A and Figure 16B They are shown separately. Figure 15A and Figure 15C The diagram shows a plan view of the manufacturing process. This manufacturing process can be understood as... Figure 7 The manufacturing process of the LED display device 10B shown.

[0136] Reference Figure 15A and Figure 16A The first semiconductor stack SL1 is etched to form the first LED unit LC_A, and the light-transmitting ohmic contact layer 131 of the first semiconductor stack SL1 is partially etched to form the first opening region Oa, thereby exposing a portion of the inter-unit insulating layer 105. Figure 16AAs shown, the first LED unit LC_A can be provided in an island-shaped structure, and the first opening region Oa can be provided in a closed structure. Furthermore, the light-transmitting ohmic contact layer 131 has an extension 131E in a region larger than the area of ​​the first LED unit LC_A, which does not overlap with the first LED unit LC_A in the vertical direction.

[0137] Next, refer to Figure 15B An insulating film 151' is formed on the surface of the first LED unit LC_A, and a first reflective layer 155' is formed on the insulating film 151'. The first reflective layer 155' can be separated from the first LED unit LC_A and the light-transmitting ohmic contact layer 131 by the insulating film 151'. The insulating film 151' and the first reflective layer 155' can be patterned to form a first opening region Oa and a second opening region Ob. The second opening region Ob can define the contact area of ​​the first LED unit LC_A.

[0138] Next, refer to Figure 15C and Figure 16B A wiring insulation layer 161 is formed on the first LED unit LC_A and the inter-unit insulation layer 105, and a first via electrode 165A and a second via electrode 165B can be formed thereon.

[0139] The wiring insulating layer 161 may be a low-dielectric material such as silicon oxide. The first via electrode 165A may be formed to connect to the ohmic contact layer 132 of the first LED cell LC_A through the second opening region Oa. The second via electrode 165B may be formed to penetrate the inter-cell insulating layer 105 in the first opening region Oa and connect to the ohmic contact layer 136 of the second semiconductor stack SL2. For example, the first via electrode 165A and the second via electrode 165B may comprise copper or a copper-containing alloy and may be formed using a dual damascene process.

[0140] Next, refer to Figure 15D It can Figure 15C The product is bonded to the circuit board 200 by connecting the first via electrode 165A and the second via electrode 165B to the drive circuit respectively.

[0141] As described above, circuit board 200 and Figure 15C The products (intermediate products of the pixel array) can be mixed and bonded. Specifically, the wiring insulation layer 161 and the dielectric layer of the circuit board 200 can be bonded, and the pad areas (e.g., Cu) of the circuit board 200 can be bonded to the first via electrode 165A and the second via electrode 165B, respectively.

[0142] Next, refer to Figure 15EThe second growth substrate 101B can be removed from the second semiconductor stack SL2, and the thickness of the second semiconductor stack SL2 can be reduced. Next, referring to... Figure 15F The second semiconductor stack SL2 is etched to form the upper LED unit LC_B of the green sub-pixel. In this etching process, opening regions Oc1 and Oc2 can be formed in the removal area of ​​the second semiconductor stack SL2 to expose the lower LED unit LC_A corresponding to the blue and red sub-pixel regions.

[0143] In this selective removal process, the inter-unit insulating layer 105 can also be removed together with the upper LED unit LC_B in the blue sub-pixel region and the red sub-pixel region to expose the light-transmitting ohmic contact layer 131 of the lower LED unit LC_A.

[0144] Then, a common electrode layer (or transparent electrode layer) 180 is formed on the exposed surfaces of the transparent ohmic contact layer 131 of the first semiconductor stack SL1 and the second semiconductor stack SL2, and on the surface of the first conductivity type semiconductor layer 142 of the remaining upper LED unit LC_B. The first opening region Oc1 and the second opening region Oc2 may be located in the layer region (or the second layer region) corresponding to the remaining upper LED unit LC_B and the inter-unit insulating layer 105.

[0145] As described above, the light-transmitting ohmic contact layer 131 of the lower LED unit LC_A has an extension 131E that overlaps with the upper LED unit LC_B in the vertical direction, and light leakage can be effectively prevented by the first reflective layer 155′ extending to the lower surface of the extension 131E of the light-transmitting ohmic contact layer 131.

[0146] Next, refer to Figure 15G Before forming the transparent electrode layer 180, a second reflective layer 175' may be introduced to prevent optical interference between sub-pixels SP1, SP2, and SP3. The second reflective layer 175' may be disposed on the side regions adjacent to the opening regions Oc1 and Oc2 of the upper LED unit LC_B and the inter-unit insulating layer 105. After forming a conformal reflective metal layer over the entire region, the second reflective layer 175' may be removed by selective etching or anisotropic etching, so that it remains only in the side regions of the upper LED unit LC_B and the inter-unit insulating layer 105, similar to the side reflective layer 175 in the above embodiment. Then, a common electrode layer (or transparent electrode layer) 180 is formed on the exposed surfaces of the light-transmitting ohmic contact layers 131 of the first semiconductor stack SL1 and the second semiconductor stack SL2, and on the surface of the remaining first conductivity type semiconductor layer 142 of the upper LED unit LC_B.

[0147] Next, refer to Figure 15HA transparent resin structure 191 is formed in the first opening region Oc1 of the blue sub-pixel SP1, and a wavelength conversion structure 192 is formed in the second opening region Oc2 of the red sub-pixel SP3, thereby manufacturing a Figure 7 The display device is shown. In the blue sub-pixel SP1, blue light B generated from the lower LED unit LC_A is emitted as is through the transparent resin structure 191. In the red sub-pixel SP3, the blue light generated from the lower LED unit LC_A is converted into red light R through the wavelength conversion structure 192 and then emitted. On the other hand, the green sub-pixel SP2 can emit green light from the upper LED unit LC_B.

[0148] As described above, according to the example embodiment, a high-efficiency LED display device that can be manufactured with a simplified process can be provided.

[0149] Although exemplary embodiments have been described and illustrated above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the inventive concept as defined by the appended claims.

Claims

1. A display device, comprising: A circuit board, including a drive circuit; A pixel array includes a plurality of pixels arranged on the circuit board and light-blocking separators. Each of the plurality of pixels includes a plurality of sub-pixels, the plurality of sub-pixels including at least a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the light-blocking separators are disposed between the plurality of sub-pixels. The first sub-pixel, the second sub-pixel, and the third sub-pixel each include a first lower light-emitting diode (LED) unit, a second lower LED unit, and a third lower LED unit, respectively. Each of the first to third lower LED units has a first semiconductor stack configured to generate light of a first wavelength. The first sub-pixel includes a transparent resin structure disposed on the first lower light-emitting diode unit. The second sub-pixel includes an inter-cell insulating layer disposed on the second lower light-emitting diode unit and an upper light-emitting diode unit having a second semiconductor stack disposed on the inter-cell insulating layer, the second semiconductor stack being configured to generate light of a second wavelength. The third sub-pixel includes a wavelength conversion structure disposed on the third lower light-emitting diode unit and configured to convert light of the first wavelength into light of the third wavelength.

2. The display device according to claim 1, wherein, Each of the first semiconductor stack and the second semiconductor stack includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein the second conductivity type semiconductor layer is configured to be closer to the circuit board than the first conductivity type semiconductor layer.

3. The display device according to claim 2, wherein, The pixel array further includes: A wiring insulation layer is disposed between the circuit board and each of the first to third lower light-emitting diode units. The first electrode penetrates the wiring insulation layer and is electrically connected to the second conductivity type semiconductor layer of the first lower light-emitting diode unit and the driving circuit. The second electrode penetrates the wiring insulation layer, the second lower light-emitting diode unit and the inter-unit insulation layer, and is electrically connected to the second conductivity type semiconductor layer of the upper light-emitting diode unit and the driving circuit; The third electrode penetrates the wiring insulating layer and electrically connects the second conductivity type semiconductor layer of the third lower light-emitting diode unit and the driving circuit; and A common electrode structure is configured to connect the first conductivity type semiconductor layer of each of the first lower light-emitting diode units to the third lower light-emitting diode units and the first conductivity type semiconductor layer of the upper light-emitting diode unit to the driving circuit.

4. The display device according to claim 3, wherein, Each of the first lower light-emitting diode unit to the third lower light-emitting diode unit and the upper light-emitting diode unit includes an ohmic contact layer disposed on the lower surface of the second conductivity type semiconductor layer.

5. The display device according to claim 4, wherein, The ohmic contact layer comprises a highly reflective metal.

6. The display device according to claim 5, wherein, Each of the first to the third lower light-emitting diode units includes a light-transmitting ohmic contact layer disposed on the upper surface of the first conductivity type semiconductor layer.

7. The display device according to claim 6, wherein, The inter-unit insulating layer is disposed between the light-transmitting ohmic contact layer of the second lower light-emitting diode unit and the highly reflective metal of the upper light-emitting diode unit.

8. The display device according to claim 3, wherein, The common electrode structure also includes: A transparent electrode layer is disposed on the first conductivity type semiconductor layer of the upper light-emitting diode unit and extends to the first conductivity type semiconductor layer of the first lower light-emitting diode unit to the third lower light-emitting diode unit. A common electrode that penetrates the wiring insulation layer and connects the transparent electrode layer and the driving circuit.

9. The display device according to claim 1, wherein, The first lower light-emitting diode unit to the third lower light-emitting diode unit and the upper light-emitting diode unit each have a downwardly inclined side surface.

10. The display device according to claim 1, wherein, The light-blocking separator extends from the lower surface of each of the plurality of sub-pixels toward the upper surface of each of the plurality of sub-pixels, and The width of the upper end of the light-blocking separator is smaller than the width of the lower end of the light-blocking separator.

11. The display device according to claim 10, wherein, The light-blocking separator has an insulating film disposed on the side surface of the plurality of sub-pixels, a reflective metal film disposed on the insulating film, and a filling insulating structure disposed on the reflective metal film.

12. The display device according to claim 10, wherein, The upper end of the light-blocking separator is substantially at the same horizontal level as the upper surface of the upper light-emitting diode unit.

13. The display device according to claim 10, wherein, The upper end of the light-blocking separator is located at a horizontal height that is higher than the active layer of the upper light-emitting diode unit and lower than the upper surface of the upper light-emitting diode unit.

14. The display device according to claim 13, wherein, The pixel array further includes a side reflective layer disposed on a portion of the side surface of the upper light-emitting diode unit, wherein the side reflective layer is located at a position above the upper end of the light-blocking separator.

15. A display device, comprising: A circuit board, including a drive circuit; as well as A pixel array includes a plurality of pixels arranged on the circuit board, light-blocking separators, and a wiring layer. Each of the plurality of pixels includes a plurality of sub-pixels, including blue sub-pixels, green sub-pixels, and red sub-pixels. The light-blocking separators are disposed between the plurality of sub-pixels. The wiring layer electrically connects each of the plurality of sub-pixels to the driving circuit. Each of the plurality of sub-pixels includes a lower light-emitting diode (LED) unit having a first semiconductor stack configured to generate blue light, the lower LED unit comprising a first lower LED unit, a second lower LED unit, and a third lower LED unit. The blue sub-pixel includes a transparent resin structure disposed on the first lower light-emitting diode unit. The green sub-pixel includes an inter-cell insulating layer disposed on the second lower light-emitting diode unit and an upper light-emitting diode unit having a second semiconductor stack disposed on the inter-cell insulating layer, the second semiconductor stack being configured to generate green light. The red sub-pixel includes a wavelength conversion structure, which is disposed on the third lower light-emitting diode unit and configured to convert the blue light into red light. The wiring layer includes: a wiring insulation layer disposed between the circuit board and the pixel array; a first electrode to a third electrode that penetrate the wiring insulation layer and connect each of the plurality of sub-pixels to the driving circuit respectively; and a common electrode that connects each of the plurality of sub-pixels to the driving circuit.

16. A display device, comprising: A circuit board, including a drive circuit; as well as A pixel array includes a wiring layer disposed on the circuit board and a pixel light source layer providing light sources for a plurality of pixels. Each of the plurality of pixels includes a plurality of sub-pixels having a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel light source layer is divided into a first-level region and a second-level region disposed on the first-level region. The first hierarchical region includes a lower light-emitting diode (LED) unit located in each of the plurality of sub-pixels, and each of the lower LED units has a first semiconductor stack configured to generate light of a first wavelength. The second layer region includes: a transparent resin structure disposed on the lower light-emitting diode unit of the first sub-pixel, an inter-unit insulating layer disposed in the second sub-pixel, an upper light-emitting diode unit having a second semiconductor stack disposed on the inter-unit insulating layer and configured to generate light of a second wavelength, and a wavelength conversion structure disposed on the lower light-emitting diode unit of the third sub-pixel and configured to convert light of the first wavelength into light of a third wavelength.

17. The display device according to claim 16, wherein, The pixel array further includes a first reflective layer disposed on the side surface and the lower surface of the lower light-emitting diode unit, and a second reflective layer disposed on the side surface of the upper light-emitting diode unit and the side surface of the inter-unit insulating layer.

18. The display device according to claim 17, wherein, Each of the first semiconductor stack and the second semiconductor stack includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The second type of conductive semiconductor layer is positioned closer to the circuit board than the first type of conductive semiconductor layer.

19. The display device according to claim 18, wherein, Each of the lower light-emitting diode units further includes a high-reflectivity ohmic contact layer disposed on the lower surface of the second conductivity type semiconductor layer, and a light-transmitting ohmic contact layer disposed on the upper surface of the first conductivity type semiconductor layer.

20. The display device according to claim 19, wherein, The light-transmitting ohmic contact layer has an extension that overlaps with the upper light-emitting diode unit in the vertical direction, and the first reflective layer extends to the lower surface of the extension of the light-transmitting ohmic contact layer.

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