A method and apparatus for writing buffer data in a memory management unit

Abstract

This application discloses a method and apparatus for writing buffer data in a memory management unit, relating to the field of chip verification technology, and is invented to shorten verification time and improve verification efficiency. The method includes: traversing a page table to obtain the mapping relationship between virtual addresses and physical addresses recorded in the page table; filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; converting the target mapping relationship into a predetermined format to obtain a target mapping relationship; and writing the predetermined format target mapping relationship into a substitution bypass buffer in the memory management unit through a backdoor access function. This application is applicable to verification related to substitution bypass buffers.

Description

Technical Field

[0001] This application relates to the field of chip verification technology, and in particular to a method, apparatus, electronic device, and readable storage medium for writing buffer data in a memory management unit. Background Technology

[0002] To improve processor speed, modern high-performance processors often incorporate Translation Look-aside Buffers (TLBs) in their Memory Management Unit (MMU) to enhance the speed of virtual-to-physical address translation. To balance speed and capacity, two levels of TLBs are typically used: L1TLB (Level 1 Translation Look-aside Buffer) and L2TLB (Level 2 Translation Look-aside Buffer). L1TLB offers faster access speeds but smaller capacity, while L2TLB boasts larger capacity but slower access speeds.

[0003] In existing technologies, when performing TLB-related verification, the MMU first searches the L1TLB when performing virtual address to physical address conversion. If no relevant address mapping is found (TLB miss), it then searches the L2TLB. If neither is found, other modules are used for conversion. After that, the mapping relationship is loaded into the two-level DTLB. Because during the verification process, there may be instances where neither of the two TLBs caches the required address mapping, requiring address conversion through other modules, the verification time is long and the verification efficiency is low. Summary of the Invention

[0004] In view of this, embodiments of this application provide a method, apparatus, electronic device, and readable storage medium for writing buffer data in a memory management unit, which can shorten verification time and improve verification efficiency.

[0005] In a first aspect, embodiments of this application provide a method for writing buffer data in a memory management unit, comprising: traversing a page table to obtain a mapping relationship between virtual addresses and physical addresses recorded in the page table; filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; converting the target mapping relationship into a format to obtain a target mapping relationship in a predetermined format; and writing the target mapping relationship in the predetermined format into a substitution bypass buffer in the memory management unit through a backdoor access function.

[0006] According to a specific implementation of an embodiment of this application, the step of filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship includes: filtering the mapping relationship according to a predetermined testing strategy to obtain a target mapping relationship that matches the testing strategy.

[0007] According to a specific implementation of this application, the step of filtering the mapping relationships according to a predetermined testing strategy to obtain target mapping relationships matching the testing strategy includes: filtering the mapping relationships according to the predetermined testing strategy to obtain different types of target mapping relationships matching the testing strategy; wherein, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship, the number of the first type of target mapping relationship accounts for a first predetermined proportion in the total number of all different types of target mapping relationships, and the number of the second type of target mapping relationship accounts for a second predetermined proportion in the total number of all different types of target mapping relationships.

[0008] According to a specific implementation of an embodiment of this application, the target mapping relationship includes a mapping relationship between identification information and physical address information; the step of converting the target mapping relationship to a predetermined format to obtain a target mapping relationship includes:

[0009] The identification information and physical address information are concatenated to obtain a target mapping relationship in a predetermined format.

[0010] According to a specific implementation of an embodiment of this application, the substitution bypass buffer in the memory management unit includes a first-level substitution bypass buffer and a second-level substitution bypass buffer; wherein, the step of writing the target mapping relationship of the predetermined format into the substitution bypass buffer in the memory management unit through the backdoor access function includes: writing the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through the backdoor access function.

[0011] According to a specific implementation of this application, after writing the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer, the method further includes: recording the position and writing status of the entry written into the target mapping relationship.

[0012] According to a specific implementation of this application, after converting the target mapping relationship to a predetermined format to obtain a target mapping relationship of a predetermined format, the method further includes: modifying the target mapping relationship of the predetermined format; the step of writing the target mapping relationship of the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function includes: writing the modified target mapping relationship of the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function; or, after writing the target mapping relationship of the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function, the method further includes: modifying at least one target mapping relationship already written into the substitution bypass buffer to inject erroneous data.

[0013] Secondly, embodiments of this application provide a device for writing buffer data in a memory management unit, comprising: a traversal module for traversing a page table to obtain a mapping relationship between virtual addresses and physical addresses recorded in the page table; a filtering module for filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; a conversion module for converting the target mapping relationship into a predetermined format to obtain a target mapping relationship; and a writing module for writing the predetermined format target mapping relationship into a substitution bypass buffer in the memory management unit through a backdoor access function.

[0014] According to a specific implementation of an embodiment of this application, the filtering module includes: a filtering submodule, used to filter the mapping relationship according to a predetermined testing strategy to obtain a target mapping relationship that matches the testing strategy.

[0015] According to a specific implementation of an embodiment of this application, the filtering submodule is specifically used to: filter the mapping relationship according to a predetermined testing strategy to obtain different types of target mapping relationships that match the testing strategy; wherein, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship, the number of the first type of target mapping relationship accounts for a first predetermined proportion in the total number of all different types of target mapping relationships, and the number of the second type of target mapping relationship accounts for a second predetermined proportion in the total number of all different types of target mapping relationships.

[0016] According to a specific implementation of an embodiment of this application, the target mapping relationship includes a mapping relationship between identification information and physical address information; the conversion module is specifically used to: concatenate the identification information and physical address information to obtain a target mapping relationship in a predetermined format.

[0017] According to a specific implementation of an embodiment of this application, the substitution bypass buffer in the memory management unit includes a first-level substitution bypass buffer and a second-level substitution bypass buffer; wherein, the writing module includes: a writing submodule, used to write the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through a backdoor access function.

[0018] According to a specific implementation of an embodiment of this application, the apparatus further includes: a recording module, configured to record the position and writing status of the entries written into the target mapping relationship after the writing submodule writes the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer.

[0019] According to a specific implementation of an embodiment of this application, the apparatus further includes: a modification module, configured to modify the target mapping relationship in the predetermined format after the conversion module performs format conversion on the target mapping relationship to obtain a target mapping relationship in the predetermined format; the writing module is specifically configured to: write the modified target mapping relationship in the predetermined format into a substitution bypass buffer in the memory management unit through a backdoor access function; or, the apparatus further includes: a modification module, configured to modify at least one target mapping relationship already written into the substitution bypass buffer in the memory management unit after the writing module writes the target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function, so as to inject erroneous data.

[0020] Thirdly, embodiments of this application provide an electronic device, which includes: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, and is used to execute the method of writing buffer data in the memory management unit described in any of the foregoing implementations.

[0021] Fourthly, embodiments of this application provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement the method for writing buffer data in the memory management unit described in any of the foregoing implementations.

[0022] The method, apparatus, electronic device, and readable storage medium for writing buffer data in the memory management unit of this embodiment can filter mapping relationships according to a predetermined strategy to obtain target mapping relationships. Then, the target mapping relationship in a predetermined format is written into the substitution bypass buffer in the memory management unit through a backdoor access function. When performing verification related to the substitution bypass buffer, the method for writing buffer data in the memory management unit of this embodiment can write the target mapping relationship into the substitution bypass buffer in the memory management unit through a backdoor function. Therefore, when the MMU performs virtual address to physical address substitution, the target mapping relationship can be found in the substitution bypass buffer, shortening the verification time and improving the verification efficiency. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 A flowchart illustrating a method for writing buffer data in a memory management unit according to an embodiment of this application;

[0025] Figure 2 A flowchart illustrating a method for writing buffer data in a memory management unit according to a specific embodiment of this application;

[0026] Figure 3 A schematic diagram of the structure of a device for writing buffer data in a memory management unit provided in an embodiment of this application;

[0027] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0028] The embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be understood that the described embodiments are merely some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0029] To enable those skilled in the art to better understand the technical concept, implementation scheme and beneficial effects of the embodiments of this application, detailed descriptions are provided below through specific embodiments.

[0030] An embodiment of this application provides a method for writing buffer data in a memory management unit, comprising: traversing a page table to obtain a mapping relationship between virtual addresses and physical addresses recorded in the page table; filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; converting the target mapping relationship into a predetermined format to obtain a target mapping relationship in a predetermined format; and writing the target mapping relationship in the predetermined format into a substitution bypass buffer in the memory management unit through a backdoor access function to improve verification efficiency.

[0031] Figure 1 A flowchart illustrating a method for writing buffer data in a memory management unit according to an embodiment of this application is shown below. Figure 1 As shown, the method for writing buffer data in the memory management unit of this embodiment may include:

[0032] S101. Traverse the page table to obtain the mapping relationship between virtual addresses and physical addresses recorded in the page table.

[0033] The Memory Management Unit (MMU) is the unit in the central processing unit (CPU) responsible for translating virtual addresses into physical addresses.

[0034] A page table is a special data structure, typically with a multi-level structure, located in the page table area of ​​the system space. It is a data structure that stores the mapping relationship between virtual addresses and physical addresses, as well as their physical address attributes.

[0035] A virtual address refers to a virtual (non-physical) address that can be used by software running on the CPU to access physical memory using an indirect address access method. In this method, the memory address accessed by the program is no longer the actual physical memory address, but a virtual address, which is then mapped to the appropriate physical memory address. This ensures that different programs ultimately access memory addresses located in different regions, without overlap, achieving the effect of memory address space isolation.

[0036] The physical address can be an address placed on the address bus. When reading, the circuit uses the value of each bit of this address to transfer the data from the corresponding physical memory address onto the data bus. When writing, the circuit uses the value of each bit of this address to store the data from the corresponding physical memory address onto the data bus.

[0037] Through the mapping relationship between virtual addresses and physical addresses, a virtual address can be matched with a corresponding physical address.

[0038] S102. According to the predetermined strategy, the mapping relationship is filtered to obtain the target mapping relationship.

[0039] According to the predetermined strategy, the required mapping relationship, i.e. the target mapping relationship, can be determined from the mapping relationship between virtual addresses and physical addresses.

[0040] S103. Convert the target mapping relationship to obtain a target mapping relationship in a predetermined format.

[0041] Convert the format of the target mapping relationship from the format in the page table to the format adapted to the TLB.

[0042] S104. Through the backdoor access function, the target mapping relationship in a predetermined format is written into the substitution bypass buffer in the memory management unit.

[0043] Backdoor access can be defined as the opposite of frontdoor access. Broadly speaking, any operation that accesses the registers or memory inside the unit under test (DUT) without using the DUT's bus is considered a backdoor access. In some cases, backdoor access functions such as uvm_hdl_read() and uvm_hdl_deposit() of UVM DPI can be used. These backdoor functions do not access the physical bus, thus saving simulation or verification time and improving simulation or verification efficiency.

[0044] The substitution bypass buffer can be used for interaction between virtual addresses and physical addresses, providing a buffer for finding physical addresses and effectively reducing the time consumed in finding physical addresses.

[0045] In this embodiment, the mapping relationship can be filtered according to a predetermined strategy to obtain the target mapping relationship. Then, the target mapping relationship in a predetermined format is written into the substitution bypass buffer in the memory management unit through a backdoor access function. When performing verification related to the substitution bypass buffer, the target mapping relationship can be written into the substitution bypass buffer in the memory management unit through the backdoor function using the buffer data writing method in this embodiment. Thus, when the MMU performs virtual address to physical address substitution, the target mapping relationship can be found in the substitution bypass buffer, shortening the verification time and improving the verification efficiency.

[0046] To further shorten verification time and improve verification efficiency, another embodiment of this application is basically the same as the above embodiment, except that in this embodiment, the mapping relationship is filtered according to a predetermined strategy to obtain the target mapping relationship (S102), which may include:

[0047] S102a. According to the predetermined test strategy, the mapping relationship is filtered to obtain the target mapping relationship that matches the test strategy.

[0048] In this embodiment, the predetermined testing strategy may include test items, test objectives, and test methods.

[0049] According to the predetermined test strategy, a target mapping relationship that is compatible with the test strategy can be obtained from a large number of mapping relationships. In this way, when the MMU performs virtual address to physical address substitution during testing, the target mapping relationship that matches the test strategy is stored in the substitution bypass buffer. This can further improve the hit rate of the substitution bypass buffer, further shorten the verification time, and improve the verification efficiency.

[0050] Another embodiment of this application is basically the same as the above embodiments, except that, in this embodiment, the mapping relationship is filtered according to a predetermined testing strategy to obtain a target mapping relationship that matches the testing strategy (S102a), which may include:

[0051] Based on the predetermined testing strategy, the mapping relationships are filtered to obtain different types of target mapping relationships that match the testing strategy.

[0052] In this embodiment, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship. The number of first-type target mapping relationships accounts for a first predetermined proportion of the total number of all different types of target mapping relationships; the number of second-type target mapping relationships accounts for a second predetermined proportion of the total number of all different types of target mapping relationships.

[0053] The first type of target mapping relationship can be a mapping relationship with a larger corresponding physical space, while the second type of target mapping relationship can be a mapping relationship with a smaller corresponding physical space.

[0054] The first pre-order ratio can be 0.7, the second pre-order ratio can be 0.3; the first pre-order ratio can be 0.43, the second pre-order ratio can be 0.5, and so on.

[0055] When expressed as decimals, the sum of the first predetermined ratio and the second predetermined ratio can be 1 or less than 1.

[0056] By filtering the mapping relationships according to the predetermined testing strategy, different types of target mapping relationships that match the testing strategy can be obtained, forming different kinds of mixed proportions of mapping relationships, which facilitates test scenarios in which different types of entries are refreshed or overwritten in different storage locations.

[0057] In some examples, the target mapping relationship may include a mapping relationship between identification information and physical address information; the step of converting the target mapping relationship into a predetermined format (S103) may include:

[0058] S103a. The identification information and physical address information are concatenated to obtain a target mapping relationship in a predetermined format.

[0059] Identification information can be used for comparison during a search. It can determine whether an entry has been matched based on whether the requested tag matches the entry's tag. Typical identification information may include: virtual address, hardware thread number, address space identifier (ASID), process context identifier (PCID), and / or the size of the mapped range (i.e., page size), etc.

[0060] Physical address information can include details related to the physical address, such as: the physical address itself, access permissions (writable, belongs to the user or the system), and address attributes (whether it accesses the cache, whether it's located in I / O space or memory space). Depending on the current CPU register configuration, the address attributes may need to be modified.

[0061] Due to the storage method of the target TLB, namely the placement order of the above-mentioned identification information and physical address information, the above-mentioned identification information and physical address information can be concatenated. Then, the identification information and physical address information will be placed in the corresponding positions of their respective arrays. For example, the identification information can be placed in the CAM array for lookup, and the physical address information can be placed in the RAM array for storage.

[0062] Due to the characteristics of the target TLB's encoding method, in some cases, some or all of the information in the target mapping relationship can be modified and encoded.

[0063] Another embodiment of this application is basically the same as the above embodiment, except that the substitution bypass buffer in the memory management unit of this embodiment includes a first-level substitution bypass buffer and a second-level substitution bypass buffer; the step of writing the target mapping relationship in a predetermined format into the substitution bypass buffer in the memory management unit through the backdoor access function in this embodiment (S104) may include:

[0064] S104a. Through the backdoor access function, the target mapping relationship in a predetermined format is written into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer.

[0065] The memory management unit in this embodiment is provided with a first-level substitution bypass buffer and a second-level substitution bypass buffer. A target mapping relationship in a predetermined format can be written into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through a backdoor access function.

[0066] The Level 1 Translation Look-aside Buffer (L1TLB) can include the Level 1 Data Translation Look-aside Buffer (L1DTLB) and the Level 1 Instruction Translation Look-aside Buffer (L1ITLB); the Level 2 Translation Look-aside Buffer can include the Level 2 Data Translation Look-aside Buffer (L2DTLB) and the Level 2 Instruction Translation Look-aside Buffer (L2ITLB).

[0067] An entry can be the smallest storage unit in the first-level substitution bypass buffer and / or the second-level substitution bypass buffer, capable of storing target mapping relationships.

[0068] In this embodiment, as needed, a target mapping relationship in a predetermined format can be written into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through a backdoor access function. This allows for more flexible writing of the target mapping relationship in a predetermined format into substitution bypass buffers at different levels. Furthermore, it can balance buffer capacity and verification speed.

[0069] To avoid duplication or to ensure that the first-level substitution bypass buffer and / or the second-level substitution bypass buffer are filled, in some examples, after writing the target mapping relation of a predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer (S104a), the method may further include:

[0070] S105. Record the position and writing status of the entries written to the target mapping relationship.

[0071] The location of an entry can be determined by its group number and path number; the write status includes "written".

[0072] By recording the position and write status of written entries, duplicate writes can be avoided or the entire first-level substitution bypass buffer and / or second-level substitution bypass buffer can be ensured to be filled. Furthermore, based on the selection of group number and route number, special entry validity states can be constructed to facilitate testing the loading and eviction of entries in the first-level substitution bypass buffer and / or second-level substitution bypass buffer.

[0073] To facilitate testing for faults such as page faults or data faults, the target data can be modified before writing to the cache. In another embodiment of this application, which is essentially the same as the above embodiment, the difference is that, in this embodiment, after converting the target mapping relationship to a predetermined format (S103), the method may further include:

[0074] S106. Modify the target mapping relationship of the predefined format.

[0075] The process of writing the predetermined target mapping relationship into the substitution bypass buffer in the memory management unit via the backdoor access function (S104) may include:

[0076] The modified target mapping relationship in the predetermined format is written into the substitution bypass buffer in the memory management unit through the backdoor access function.

[0077] As an alternative embodiment, the target data can be modified after the target relationship is written to the buffer. In this embodiment, after the target mapping relationship of a predetermined format is written to the substitution bypass buffer in the memory management unit through the backdoor access function (S104), the method may further include:

[0078] S106. Modify at least one target mapping relationship that has been written into the substitution bypass buffer to inject erroneous data.

[0079] When verifying cases such as page faults or data faults, the target mapping relationship already written in the replacement bypass buffer can be modified to inject erroneous data.

[0080] Page faults refer to faults that occur during the process of using page tables to replace virtual addresses with physical addresses, including types such as privilege escalation and page faults.

[0081] In this embodiment, by modifying at least one target mapping relationship written into the substitution bypass buffer, a page fault test scenario is constructed to test its processing flow. Injecting data faults can test data verification and error correction functions.

[0082] It is understood that the methods described in the above embodiments can be used in TLB verification, module-level verification environments, and core verification environments. Furthermore, different test scenarios can be easily constructed using the methods described in the above embodiments.

[0083] Verifying L2DTLB is more difficult than verifying L1DTLB in existing verification work for the following reasons: 1. L2DTLB is only accessed when L1DTLB misses; 2. L2DTLB has a large capacity, and filling it and traversing it once requires a lot of simulation time; 3. In order to improve utilization efficiency, the implementation of L2DTLB is generally more complex, with multiple different storage structures and special associativity methods (such as skewed associativity), which leads to the complexity and diversity of verification scenarios; 4. Considering the overall time and efficiency of verification, it is not cost-effective to build a separate verification environment for L2DTLB.

[0084] To improve the verification speed of L2DTLB, the following section uses L2DTLB as an example to provide a detailed explanation of the scheme in this application.

[0085] See Figure 2 The method for writing buffer data in the memory management unit of this embodiment may include:

[0086] 1. Traverse the generated page tables and select the mapping relationships that can be stored in L2DTLB.

[0087] 2. Based on the predetermined strategy, select a target mapping relationship and convert it into the format of an entry in L2DTLB.

[0088] 3. Through the backdoor access function, write the target mapping relationship into the entry at the specified position in L2DTLB, and record the loading status and position (group number and road number) of each entry.

[0089] The backdoor access function (read or write) for each entry in the L2DTLB is implemented using two DPIs: uvm_hdl_read and uvm_hdl_deposit. The reason for choosing these two DPIs is that the HDL path can be treated as a string, which is convenient to implement and has good maintainability, especially for the regular path naming method of L2DTLB.

[0090] Steps 2 and 3 can be repeated until all required target mappings are written, or the entire L2DTLB is filled.

[0091] In cases where an error injection is required, such as a page fault or data fault, the following may also be included before step 3:

[0092] 4. Modify the target mapping relationship.

[0093] Through the above process, the speed of L2DTLB verification can be improved, it is easier to test each entry of the entire L2DTLB, and the quality of L2DTLB verification can be improved. Various special test scenarios can be easily constructed; for example, different types of entries are refreshed or overwritten in different storage locations, page faults are injected into the DTLB to facilitate testing its processing flow, and data errors are created to test data verification and error correction functions.

[0094] It should be noted that the writing method in this application embodiment can be preloaded after the L2DTLB reset is completed and before the formal test begins, or the above process can be executed during the test.

[0095] An embodiment of this application provides a device for writing buffer data in a memory management unit, comprising: a traversal module for traversing a page table to obtain the mapping relationship between virtual addresses and physical addresses recorded in the page table; a filtering module for filtering the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; a conversion module for converting the target mapping relationship into a predetermined format to obtain a target mapping relationship; and a writing module for writing the predetermined format target mapping relationship into a substitution bypass buffer in the memory management unit through a backdoor access function, which can shorten the verification time and improve the verification efficiency.

[0096] Figure 3 This is a schematic diagram of the structure of a buffer data writing device in a memory management unit provided in an embodiment of this application, as shown below. Figure 3 As shown, the buffer data writing device in the memory management unit of this embodiment may include: a traversal module 11, used to traverse the page table to obtain the mapping relationship between virtual addresses and physical addresses recorded in the page table; a filtering module 12, used to filter the mapping relationship according to a predetermined strategy to obtain a target mapping relationship; a conversion module 13, used to convert the target mapping relationship into a predetermined format to obtain a target mapping relationship in a predetermined format; and a writing module 14, used to write the target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function.

[0097] The apparatus of this embodiment can be used to perform Figure 1 The technical solutions of the method embodiments shown are similar in principle and in effect, and will not be described again here.

[0098] The apparatus of this embodiment can filter mapping relationships according to a predetermined strategy to obtain target mapping relationships, and then write the target mapping relationships in a predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function. When performing verification related to the substitution bypass buffer, the target mapping relationship can be written into the substitution bypass buffer in the memory management unit through the buffer data writing method in this embodiment via the backdoor function. Thus, when the MMU performs virtual address to physical address substitution, the target mapping relationship can be found in the substitution bypass buffer, shortening the verification time and improving the verification efficiency.

[0099] As an optional implementation, the filtering module includes: a filtering submodule, used to filter the mapping relationship according to a predetermined testing strategy to obtain a target mapping relationship that matches the testing strategy.

[0100] As an optional implementation, the filtering submodule is specifically used to: filter the mapping relationships according to a predetermined testing strategy to obtain different types of target mapping relationships that match the testing strategy; wherein, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship, the number of the first type of target mapping relationship accounts for a first predetermined proportion in the total number of all different types of target mapping relationships, and the number of the second type of target mapping relationship accounts for a second predetermined proportion in the total number of all different types of target mapping relationships.

[0101] As an optional implementation, the target mapping relationship includes a mapping relationship between identification information and physical address information; the conversion module is specifically used to: concatenate the identification information and physical address information to obtain a target mapping relationship in a predetermined format.

[0102] As an optional implementation, the substitution bypass buffer in the memory management unit includes a first-level substitution bypass buffer and a second-level substitution bypass buffer; wherein, the writing module includes: a writing submodule, used to write the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through a backdoor access function.

[0103] As an optional implementation, the apparatus further includes: a recording module, configured to record the position and writing status of the entries written into the target mapping relationship after the writing submodule writes the target mapping relationship of the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer.

[0104] As an optional implementation, the apparatus further includes: a modification module, configured to modify the target mapping relationship in the predetermined format after the conversion module performs format conversion on the target mapping relationship to obtain a target mapping relationship in the predetermined format; the writing module is specifically configured to: write the modified target mapping relationship in the predetermined format into a substitution bypass buffer in the memory management unit through a backdoor access function; or, the apparatus further includes: a modification module, configured to modify at least one target mapping relationship already written into the substitution bypass buffer in the memory management unit after the writing module writes the target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function, so as to inject erroneous data.

[0105] The apparatus described in the above embodiments can be used to execute the technical solutions of the above method embodiments. The implementation principle and technical effects are similar, and will not be repeated here.

[0106] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, as shown below. Figure 4 As shown, the device may include: a housing 61, a processor 62, a memory 63, a circuit board 64, and a power supply circuit 65. The circuit board 64 is disposed inside the space enclosed by the housing 61, and the processor 62 and the memory 63 are disposed on the circuit board 64. The power supply circuit 65 is used to supply power to the various circuits or devices of the above-mentioned electronic device. The memory 63 is used to store executable program code. The processor 62 runs the program corresponding to the executable program code by reading the executable program code stored in the memory 63, and is used to execute the method of writing buffer data in any of the memory management units provided in the foregoing embodiments. Therefore, it can also achieve the corresponding beneficial technical effects, which have been described in detail above and will not be repeated here.

[0107] The aforementioned electronic devices exist in various forms, including but not limited to:

[0108] (1) Mobile communication devices: These devices are characterized by their mobile communication capabilities and primarily aim to provide voice and data communication. These terminals include: smartphones (e.g., iPhones), multimedia phones, feature phones, and low-end phones, etc.

[0109] (2) Ultra-mobile personal computer devices: These devices fall under the category of personal computers, possessing computing and processing capabilities, and generally also have mobile internet access features. These terminals include PDAs, MIDs, and UMPCs, such as the iPad.

[0110] (3) Portable entertainment devices: These devices can display and play multimedia content. This category includes: audio and video players (such as iPods), handheld game consoles, e-books, as well as smart toys and portable car navigation devices.

[0111] (4) Server: A device that provides computing services. The components of a server include a processor, hard disk, memory, system bus, etc. Servers are similar to general computer architectures, but because they need to provide highly reliable services, they have higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability.

[0112] (5) Other electronic devices with data interaction functions.

[0113] Accordingly, embodiments of this application also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement the method for writing buffer data in any of the memory management units provided in the foregoing embodiments. Therefore, it can also achieve the corresponding technical effects, which have been described in detail above and will not be repeated here.

[0114] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0115] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0116] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0117] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this application, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0118] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0119] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for writing data to a buffer in a memory management unit, characterized in that, In the verification of the substitution bypass buffer, the method includes: Traverse the page table to obtain the mapping relationship between virtual addresses and physical addresses recorded in the page table; According to a predetermined testing strategy, the mapping relationships are filtered to obtain target mapping relationships that match the testing strategy. This includes: filtering the mapping relationships according to the predetermined testing strategy to obtain different types of target mapping relationships that match the testing strategy; wherein, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship, the number of the first type of target mapping relationship accounts for a first predetermined proportion in the total number of all different types of target mapping relationships, and the number of the second type of target mapping relationship accounts for a second predetermined proportion in the total number of all different types of target mapping relationships. The target mapping relationship includes the mapping relationship between identification information and physical address information; converting the target mapping relationship into a predetermined format to obtain a target mapping relationship in a predetermined format includes: concatenating the identification information and physical address information to obtain a target mapping relationship in a predetermined format; The target mapping relationship in the predetermined format is written into the substitution bypass buffer in the memory management unit through the backdoor access function.

2. The method according to claim 1, characterized in that, The substitution bypass buffer in the memory management unit includes a first-level substitution bypass buffer and a second-level substitution bypass buffer. The step of writing the target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through the backdoor access function includes: The target mapping relationship in the predetermined format is written into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer through the backdoor access function.

3. The method according to claim 2, characterized in that, After writing the predetermined target mapping relationship into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer, the method further includes: Record the position and writing status of the entries written to the target mapping relationship.

4. The method according to claim 1, characterized in that, After converting the target mapping relationship to a predetermined format, the method further includes: Modify the target mapping relationship in the predetermined format; The step of writing the predetermined target mapping relationship into the substitution bypass buffer in the memory management unit through the backdoor access function includes: The modified target mapping relationship in the predetermined format is written into the substitution bypass buffer in the memory management unit via a backdoor access function; or, After writing the predetermined target mapping relationship into the substitution bypass buffer in the memory management unit through the backdoor access function, the method further includes: At least one target mapping relationship already written into the substitution bypass buffer is modified to inject erroneous data.

5. A device for writing buffer data in a memory management unit, characterized in that, The apparatus, used in the verification of a replacement bypass buffer, comprises: The traversal module is used to traverse the page table and obtain the mapping relationship between the virtual address and the physical address recorded in the page table; A filtering module is used to filter the mapping relationships according to a predetermined testing strategy to obtain different types of target mapping relationships that match the testing strategy; wherein, the different types of target mapping relationships include a first type of target mapping relationship and a second type of target mapping relationship, the number of the first type of target mapping relationship accounts for a first predetermined proportion in the total number of all different types of target mapping relationships, and the number of the second type of target mapping relationship accounts for a second predetermined proportion in the total number of all different types of target mapping relationships. The conversion module is used to concatenate the identification information and physical address information to obtain a target mapping relationship in a predetermined format when the target mapping relationship includes a mapping relationship between identification information and physical address information. The write module is used to write the target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through the backdoor access function.

6. The apparatus according to claim 5, characterized in that, The substitution bypass buffer in the memory management unit includes a first-level substitution bypass buffer and a second-level substitution bypass buffer. The writing module includes: The write submodule is used to write the target mapping relationship in the predetermined format into a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer via a backdoor access function.

7. The apparatus according to claim 6, characterized in that, The device further includes: The recording module is used to record the position and writing status of the entries written to the target mapping relationship after the writing submodule writes the target mapping relationship of the predetermined format to a specified entry in the first-level substitution bypass buffer and / or a specified entry in the second-level substitution bypass buffer.

8. The apparatus according to claim 5, characterized in that, The device further includes: The modification module is used to modify the target mapping relationship in the predetermined format after the conversion module converts the target mapping relationship into a predetermined format. The writing module is specifically used to: write the modified target mapping relationship in the predetermined format into the substitution bypass buffer in the memory management unit through a backdoor access function; or, The device further includes: The modification module is used to modify at least one target mapping relationship already written in the substitution bypass buffer of the memory management unit after the writing module writes the target mapping relationship in the predetermined format into the substitution bypass buffer through the backdoor access function, so as to inject erroneous data.

9. An electronic device, characterized in that, The electronic device includes: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the method of writing buffer data in the memory management unit according to any one of claims 1-4.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the method for writing buffer data in the memory management unit according to any one of claims 1-4.

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