Chip debugging method and device, storage medium and electronic device

By creating an initial debugging model in the chip to simulate the running environment and implementing the target function, the problem of low chip debugging efficiency is solved, and accurate and efficient debugging results are achieved.

CN114896115BActive Publication Date: 2025-03-28SUZHOU CENTEC COMM CO LTD
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Patent Information

Application Number
CN202210577498.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-25
Publication Date
2025-03-28
Estimated Expiration
2042-05-25

AI Technical Summary

Technical Problem

In the prior art, chip debugging efficiency is low, accurate trigger conditions cannot be set and problems that arise during the debugging process of chips are difficult to accurately locate.

Method used

By receiving function debugging requests, create an initial debugging model to simulate the operating environment of the chip, realize the target function and control the target debugging model to execute the target function to obtain the debugging results of the target function.

Benefits of technology

It reduces the difficulty and time of chip debugging, improves debugging efficiency, and can obtain the chip debugging results accurately and efficiently.

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Abstract

The present application discloses a chip debugging method and device, a storage medium and an electronic device. The chip debugging method comprises: receiving a function debugging request, wherein the function debugging request is used to request debugging of a target function in the chip; responding to the function debugging request, creating a target function in an initial debugging model, and obtaining a target debugging model, wherein the initial debugging model is used to simulate the operating environment of the chip; controlling the target debugging model to execute the target function, and obtaining a target debugging result of the target function. The above technical solution is adopted to solve the problems of low efficiency of chip debugging in related technologies.
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