Flexible micro-led, preparation method thereof and display device

Abstract

The application provides a flexible Micro-LED, a preparation method thereof and a display device, and belongs to the field of LED display. The preparation method of the flexible Micro-LED comprises the following steps: obtaining an epitaxial wafer and a flexible substrate; etching a plurality of spaced-apart PN junctions on the side of the epitaxial wafer away from the substrate; spraying a first conductive layer on the side of each PN junction away from the substrate; aligning and bonding each PN junction with a first conductive part; coating the fifth photoresist on the side of the first CPI film away from the substrate, etching a plurality of spaced-apart photoetching grooves on the fifth photoresist, and filling each photoetching groove with a quantum dot; attaching a plurality of spaced-apart color filters on the side of the second CPI film away from the substrate; aligning and bonding each color filter with a photoetching groove; and peeling off the substrate to form the flexible Micro-LED. The thickness of the Micro-LED is reduced by peeling off the substrate and replacing it with the CPI film. The flexible Micro-LED is formed by selecting and processing flexible materials such as flexible CPI films, silver nanowire conductive layers, flexible photoresists and flexible substrates.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of LED display, in particular to a flexible Micro-LED, a preparation method thereof and a display device. BACKGROUND

[0002] Micro-LED display technology refers to a display technology in which microscale LED (light-emitting diode) is used as a light-emitting pixel unit, and the LED is assembled on a driving panel to form a high-density LED array.

[0003] The existing flexible Micro-LED is supported by a glass bottom plate during production, resulting in poor flexibility and ductility of the Micro-LED. SUMMARY

[0004] Therefore, the present application aims to overcome the deficiencies in the prior art and provide a flexible Micro-LED, a preparation method thereof and a display device.

[0005] The present application provides the following technical solution: a preparation method of a flexible Micro-LED, comprising the following steps:

[0006] S1, obtaining an epitaxial wafer and a flexible substrate;

[0007] S2, etching a plurality of spaced-apart PN junctions on a side of the epitaxial wafer away from the substrate;

[0008] S3, spraying a first conductive layer on a side of each PN junction away from the substrate;

[0009] S4, disposing a plurality of spaced-apart first conductive portions and a plurality of spaced-apart second conductive portions on the flexible substrate, aligning and bonding each PN junction with a first conductive portion, and peeling off the substrate;

[0010] S5, depositing a passivation layer on a side of the flexible substrate to cover each PN junction;

[0011] S6, etching a guide hole on the passivation layer to expose each second conductive portion and each N semiconductor layer, spraying a second conductive layer on the passivation layer, and filling the guide hole to realize PN junction conduction;

[0012] S7, a first CPI film is laminated on the side of the second conductive layer away from the substrate, the fifth photoresist is coated on the side of the first CPI film away from the substrate, a plurality of spaced photoetching grooves are etched on the fifth photoresist, and a quantum dot is filled in a part of the photoetching grooves;

[0013] S8, a substrate is obtained, a second CPI film is laminated on the substrate, and a plurality of spaced color filters are attached to the side of the second CPI film away from the substrate;

[0014] S9, the second CPI film is attached to the fifth photoresist, so that each color filter is in position bonding with a quantum dot and each color filter is in position bonding with a photoetching groove, and finally the substrate is peeled off to form a flexible Micro-LED.

[0015] In some embodiments of the present application, in step S1, the epitaxial wafer comprises the substrate, the N semiconductor layer, the quantum well and the P semiconductor layer.

[0016] Further, step S2 further comprises S201, laminating a protective layer on the side of the epitaxial wafer away from the substrate;

[0017] S202, a second photoresist layer is sprayed or spin-coated on the side of the protective layer away from the substrate, and the second photoresist layer is etched or developed to form a plurality of spaced photoresist segments;

[0018] S203, etching the protective layer so that the orthogonal projection of the protective layer on the plane where the second photoresist layer is located is completely coincident with the photoresist segments;

[0019] S204, removing the remaining second photoresist layer;

[0020] S205, etching the N semiconductor layer, the quantum well and the P semiconductor layer to form a plurality of spaced PN junctions, each PN junction being coincident with the protective layer after etching in step S203 in the orthogonal projection on the plane where the protective layer is located;

[0021] S206, removing the protective layer.

[0022] Further, step S3 further comprises S301, filling a third photoresist in the gap between any two adjacent PN junctions, and forming a plurality of spaced photoresist columns on the third photoresist by third photoetching;

[0023] S302, spraying the first conductive layer on the side of the PN junction away from the substrate;

[0024] S303, removing the photoresist column to laminate a first conductive segment on the side of each PN junction away from the substrate.

[0025] Further, in step S4, the number of the PN junctions is equal to the number of the first conductive parts, and the projection of each of the PN junctions on the plane where the first conductive parts are located coincides with one of the first conductive parts.

[0026] Further, step S6 further comprises S601, depositing a fourth photoresist layer on the side of the passivation layer away from the flexible substrate;

[0027] S602, etching a plurality of through holes on the fourth photoresist layer to make the projection of each of the first conductive parts and each of the second conductive parts on the plane where the fourth photoresist layer is located cover one of the through holes;

[0028] S603, etching a plurality of the guide holes on the passivation layer through the through holes;

[0029] S604, removing the fourth photoresist layer to set the second conductive layer on the side of the passivation layer away from the flexible substrate, and the second conductive layer fills each of the guide holes to make the second conductive part and each of the N semiconductor layers communicate.

[0030] Further, in step S7, the projection of each of the PN junctions on the plane where the fifth photoresist is located at least partially covers one of the photoetching grooves.

[0031] Further, in step S7, the quantum dots are any one of red quantum dots and green quantum dots;

[0032] The color of any two adjacent quantum dots is different.

[0033] Further, the color filter is any one of a red color filter, a green color filter and a blue color filter, and the color between any two adjacent color filters is different.

[0034] Further, in step S8, the color filter is any one of a red color filter, a green color filter and a blue color filter, and the color between any two adjacent color filters is different.

[0035] Further, in step S9, the red color filter is bonded with the red quantum dot, the green color filter is bonded with the green quantum dot, and the blue color filter is bonded with the empty photoetching groove.

[0036] Further, the projection of the quantum dot on the plane where the substrate is located is a circle or a regular polygon.

[0037] Further, the projection of the quantum dot on the plane where the substrate is located is a regular hexagon.

[0038] Some embodiments of the present application also provide a flexible Micro-LED using the preparation method of the flexible Micro-LED.

[0039] Some embodiments of the present application also provide a display device comprising the flexible Micro-LED.

[0040] Embodiments of the present application have the advantages of reducing the thickness of the Micro-LED by peeling off the substrate and replacing the substrate with a second CPI film, improving the flexibility of the Micro-LED, and forming the flexible Micro-LED by bonding the flexible CPI film, the silver nanowire conductive layer, the flexible photoresist, and the flexible substrate.

[0041] In order to make the above objectives, characteristics and advantages of the present application more apparent and easy to understand, the following preferred embodiments are specifically described below, and the accompanying drawings are referred to for detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0043] Figure 1 A flow chart of a preparation method of a flexible Micro-LED provided by some embodiments of the present application is shown;

[0044] Figure 2 A flow chart of etching to form a PN junction in a preparation method of a flexible Micro-LED provided by some embodiments of the present application is shown;

[0045] Figure 3 A flow chart of spraying a first conductive layer in a preparation method of a flexible Micro-LED provided by some embodiments of the present application is shown;

[0046] Figure 4 A flow chart of etching a passivation layer in a preparation method of a flexible Micro-LED provided by some embodiments of the present application is shown;

[0047] Figure 5 A structure schematic diagram of a wafer in a flexible Micro-LED provided by some embodiments of the present application is shown from one perspective;

[0048] Figure 6 A structure schematic diagram of an etching protection layer on a wafer in a flexible Micro-LED provided by some embodiments of the present application is shown from one perspective;

[0049] Figure 7A perspective view of a structure of etching a first conductive layer on an epitaxial wafer in a flexible Micro-LED is shown according to some embodiments of the present application;

[0050] Figure 8 A perspective view of a structure of spraying a first conductive layer on an epitaxial wafer in a flexible Micro-LED is shown according to some embodiments of the present application;

[0051] Figure 9 A perspective view of a structure of removing a third photoresist on an epitaxial wafer in a flexible Micro-LED is shown according to some embodiments of the present application;

[0052] Figure 10 A perspective view of a structure of flip-chip on a substrate in a flexible Micro-LED is shown according to some embodiments of the present application;

[0053] Figure 11 A perspective view of a structure of removing a substrate in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 10

[0054] A perspective view of a structure of etching a passivation layer on a flexible substrate in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 12

[0055] A perspective view of a structure of etching a fifth photoresist on a flexible substrate in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 13

[0056] A perspective view of a structure of partially filling a pixel in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 14

[0057] A perspective view of a structure of bonding a substrate and a flexible substrate in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 15

[0058] A perspective view of a structure of peeling off a substrate in a flexible Micro-LED is shown according to some embodiments of the present application; Figure 16 Figure 15 A perspective view of a structure of a color filter on a substrate in a flexible Micro-LED is shown according to some embodiments of the present application.

[0059] Figure 17 Main element symbol explanation:

[0060] Main element symbol explanation:

[0061] ​100 - epitaxial wafer; 200 - flexible substrate; 110 - substrate; 300 - PN junction; 400 - first conductive layer; 210 - first conductive part; 220 - second conductive part; 500 - passivation layer; 600 - second conductive layer; 700 - fifth photoresist; 800 - quantum dot; 900 - base; 910 - second CPI film; 920 - color filter; 120 - N semiconductor layer; 130 - quantum well; 140 - P semiconductor layer; 150 - protective layer; 160 - second photoresist layer; 1000 - third photoresist; 1200 - fourth photoresist layer; 1100 - first CPI film; 800a - red quantum dot; 800b - green quantum dot; 920a - red color filter; 920b - green color filter; 920c - blue color filter. DETAILED DESCRIPTION

[0062] Embodiments of the present application are described in detail below with reference to the attached drawing figures, wherein the same or like reference numerals and characters throughout the figures denote the same elements or elements having the same function. The embodiments described below are merely exemplary for the purpose of explanations and are not to be understood as limiting the present application.

[0063] It is noted that, when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. Like numbers refer to like elements throughout the description. The terms "vertical", "horizontal", "left", "right", and the like as used herein are described for purposes of explanation only and are not intended to limit the scope of the present application.

[0064] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0065] In addition, the terms "first", "second", "third", etc. are used only for the purpose of description and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly specified and limited.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the templates herein is used only for the purpose of describing particular embodiments and is not intended to be limiting of the present application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0067] As shown in Figures 1 to 17 Some embodiments of the present application provide a preparation method of flexible Micro-LED, mainly applied to LED display, such as LED display. The preparation method of flexible Micro-LED includes the following steps:

[0068] S1, obtaining an epitaxial wafer and a flexible substrate.

[0069] It should be noted that the epitaxial wafer 100 includes a substrate 110, an N semiconductor layer 120, a quantum well 130 and a P semiconductor layer 140 which are stacked in sequence.

[0070] Specifically, the substrate 110 includes a buffer layer and a U-GaN layer which are stacked in sequence, and the N semiconductor layer 120 is stacked on one side of the U-GaN.

[0071] In addition, in the present embodiment, the flexible substrate 200 is a CMOS flexible polymer substrate.

[0072] It should be noted that CMOS is the abbreviation of Complementary Metal Oxide Semiconductor. It refers to a technology for manufacturing large-scale integrated circuit chips or chips manufactured by this technology, which is a readable and writable RAM chip on the computer motherboard.

[0073] S2, etching a plurality of spaced PN junctions on the side of the epitaxial wafer away from the substrate.

[0074] Specifically, a plurality of spaced PN junctions are formed on the side of the epitaxial wafer away from the substrate by second lithography. The shape of the PN junction 300 can be cylindrical, right prism or regular polygon, and the distance between any two adjacent PN junctions 300 is equal.

[0075] It should be noted that in some embodiments of the present application, the shape of the PN junction 300 is a regular hexagonal prism.

[0076] It should be noted that the N semiconductor layer 120, the quantum well 130 and the P semiconductor layer 140 are etched at the same time to form a plurality of spaced PN junctions 300. The etching method is to form a plurality of equally spaced regular hexagonal prism PN junctions by chemical and physical vapor deposition, lithography, etching and other technologies.

[0077] In addition, the etching method can also be wet etching. Wet etching is a technology of soaking etching material in etching liquid for etching. It is a pure chemical etching, has excellent selectivity, and stops etching after etching the current thin film layer, without damaging the thin film of other materials of the next layer, thereby improving the etching precision.

[0078] S3, spraying a first conductive layer on the side of each PN junction away from the substrate.

[0079] It should be noted that the first conductive layer 400 is a metal nanometer layer, which can be any one of a nickel nanometer layer, a platinum nanometer layer or a silver nanometer layer, and can be specifically set according to actual conditions.

[0080] Specifically, in the embodiment, the first conductive layer 400 is a silver nanometer layer. The nanometer layer is a layer of nanometer scale.

[0081] In addition, the first conductive layer 400 is a silver nanometer layer formed by connection of silver nanowires, so as to form an electrical connection between the first conductive layer 400 and the PN junction 300.

[0082] It should be noted that the orthographic projection of each first conductive layer 400 on the plane where the PN junction 300 is located away from the substrate 110 coincides with the PN junction 300.

[0083] S4, disposing a plurality of spaced first conductive parts and a plurality of spaced second conductive parts on the flexible substrate, aligning and bonding each PN junction with a first conductive part, and peeling off the substrate.

[0084] The number of the first conductive parts 210 is equal to the number of the PN junctions 300, and the first conductive parts 210 and the second conductive parts 220 are respectively in a layered structure.

[0085] In addition, the orthographic projection of each PN junction 300 on the plane where the first conductive part 210 is located coincides with a first conductive part 210, that is, the spacing between any two adjacent first conductive parts 210 is equal.

[0086] It should be noted that the second conductive part 220 is disposed at the edge of the flexible substrate 200 close to the side of the first conductive part 210, and there is a gap between the first conductive part 210 and the second conductive part 220.

[0087] It can be understood that one first conductive part 210 is bonded with one PN junction 300.

[0088] It should be noted that based on step S3, the first conductive layer 400 is sprayed on one side of the PN junction 300. It can be understood that when the PN junction 300 is bonded with the first conductive part 210 arranged on the flexible substrate 200, the first conductive layer 400 coated on each PN junction 300 is bonded with one first conductive part 210 to flip the PN junction 300 to the flexible substrate 200 to form the connection between the flexible substrate 200 and the PN junction 300.

[0089] S5, depositing a passivation layer on one side of the flexible substrate to cover each PN junction.

[0090] In the embodiment, the deposition method is chemical vapor deposition. Chemical vapor deposition is a chemical technology that mainly uses one or more gas phase compounds or elements containing thin film elements to perform a chemical reaction on the surface of the substrate 110 to generate a thin film.

[0091] The passivation layer 500 is an insulating passivation layer 500.

[0092] Specifically, the passivation layer 500 is deposited on one side of the flexible substrate 200 close to the PN junction 300 to wrap each PN junction 300 by the passivation layer 500 and the flexible substrate 200 to form the support, fixation, sealing and protection of the PN junction 300.

[0093] S6, etching a guide hole on the passivation layer to leak out each second conductive part and each N semiconductor layer, and then spraying a second conductive layer on the passivation layer and filling the guide hole to realize the conduction of the PN junction.

[0094] The second conductive layer 600 is sprayed on the passivation layer 500, and the second conductive layer 600 is filled in the guide hole to form an electrical connection between the second conductive part 220 and the N semiconductor layer through the second conductive layer 600 to realize the conduction of the PN junction.

[0095] Specifically, a plurality of spaced guide holes are formed on the passivation layer 500 by dry etching. Dry etching is a technology for etching thin films by using plasma.

[0096] The sum of the number of the first conductive part 210 and the number of the second conductive part 220 is not more than the number of the guide hole. Specifically, one guide hole is connected to one second conductive part 220, and at this time, the orthographic projection of each guide hole on the plane where the flexible substrate 200 is located is located in one first conductive part 210 or one second conductive part 220.

[0097] In addition, the plurality of second guide holes can be connected to the same second conductive part 220, and in this case, the orthographic projection of each guide hole on the plane of the flexible substrate 200 is located in a first conductive part 210 or the orthographic projection of the plurality of guide holes on the plane of the flexible substrate 200 is located in the same second conductive part 220.

[0098] It can be understood that the orthographic projection of one first conductive part 210 on the plane of the side of the passivation layer 500 away from the flexible substrate 200 covers one guide hole, and the orthographic projection of one second conductive part 220 on the plane of the side of the passivation layer 500 away from the flexible substrate 200 covers at least one guide hole.

[0099] It should be noted that the purpose of etching the guide hole on the passivation layer 500 is to expose the side of the second conductive part 220 away from the flexible substrate 200 and the side of the PN junction 300 away from the flexible substrate 200, and at the same time, the second conductive layer 600 is sprayed on the side of the passivation layer 500 away from the flexible substrate 200, so that the second conductive layer 600 is filled in each guide hole, and the side of the second conductive part 220 and the PN junction 300 away from the flexible substrate 200 are electrically connected through the second conductive layer 600.

[0100] In the embodiment, the second conductive layer 600 is a silver nano layer, and the spraying mode of the silver nano layer is inkjet printing, so as to reduce the thickness of the second conductive layer 600.

[0101] S7, a first CPI film is laminated on the side of the second conductive layer away from the flexible substrate, a fifth photoresist 700 is coated on the side of the first CPI film away from the flexible substrate, a plurality of spaced photoetching grooves are formed in the fifth photoresist 700, and a quantum dot is filled in a part of the photoetching grooves.

[0102] Specifically, the first CPI film 1100 is laminated on the second conductive layer 600 by means of nano-spraying treatment. The first CPI film 1100 completely covers the side of the second conductive layer 600 away from the flexible substrate 200.

[0103] The second CPI film 910 and the first CPI film 1100 are both polyimide transparent films.

[0104] It should be noted that polyimide has excellent thermal stability, high tensile strength, outstanding high-temperature resistance, radiation resistance, chemical corrosion resistance and electrical insulation performance, and stable chemical properties, and is particularly suitable for use as a flexible printed circuit board substrate and various high-temperature resistant motor and electrical insulation materials.

[0105] In addition, the fifth photoresist 700 completely covers the side of the first CPI film 1100 away from the flexible substrate 200.

[0106] Meanwhile, a plurality of through holes are etched on the fifth photoresist 700 by exposure and development, and a visible photoresist pattern is formed at the same time, and the position of each through hole is determined so as to fill the through hole with quantum dots.

[0107] In the embodiment, the fifth photoresist 700 is a flexible photoresist, and the fifth photoresist 700 layer is formed on the side of the second conductive layer 600 away from the flexible substrate 200, and a plurality of spaced photoetching grooves are etched on the fifth photoresist 700 by exposure and development.

[0108] The development is that the photoresist in the exposed area of the positive photoresist and the non-exposed area of the negative photoresist is dissolved in the developing solution, and a three-dimensional pattern is formed on the photoresist.

[0109] It should be noted that the number of photoetching grooves is equal to the number of PN junctions 300, and each photoetching groove is directed to a PN junction 300, and a part of the photoetching grooves are filled with quantum dots. In addition, the number of photoetching grooves is multiple, which can be set according to actual conditions, and the multiple photoetching grooves are arranged at intervals.

[0110] Specifically, the quantum dots are printed into the photoetching grooves by inkjet printing.

[0111] In the embodiment, the number of photoetching grooves is 1.5 times the number of quantum dots. It can be understood that one third of the photoetching grooves are not filled with quantum dots, and this part of the photoetching grooves is empty photoetching grooves.

[0112] It should be noted that the shape of the photoetching groove is a regular hexagon.

[0113] S8, obtain a substrate, stack a second CPI film on the substrate, and attach a plurality of spaced color filters to the side of the second CPI film away from the substrate.

[0114] Specifically, a plurality of spaced color filters are formed on the side of the second CPI film away from the substrate by first photoetching. In the embodiment, the substrate 900 is transparent glass, and the second CPI film 910 is formed on the side of the substrate 900 in the thickness direction by nano-spraying.

[0115] Nano-spraying is a technology that uses nano technology to spray nano materials with high hardness and high corrosion resistance on the surface of PCB and components, and quickly forms a thin, transparent protective film (11-12 mN / m) on the surface of the workpiece to form a dense nano coating. The nano coating does not sacrifice protection and can prevent surface scratches from causing material erosion. At the same time, it can also prevent water, moisture, dust, oil and chemical corrosion; nano-spraying construction process is simple, odorless, and is an environmentally friendly coating with wide applicability and no environmental pollution.

[0116] In addition, the number of color filters is equal to the number of PN junctions 300, and each color filter corresponds to a photoetching groove.

[0117] S9, the second CPI film is attached to the fifth photoresist so that each color filter is bonded to a quantum dot, and finally the substrate is peeled off to form a flexible Micro-LED.

[0118] Specifically, the substrate 900 is attached to the side of the flexible photoresist away from the flexible substrate 200.

[0119] At this time, the orthogonal projection of a color filter on the plane of the quantum dot coincides with a quantum dot, that is, the sum of the thickness of the color filter and the thickness of the quantum dot is equal to the depth of the photoetching groove, and the depth of the photoetching groove is equal to the thickness of the flexible photoresist. It should be noted that a part of the color filter is bonded to the quantum dot, and a part of the color filter is bonded to the empty photoetching groove.

[0120] The substrate 900 and the second CPI film 910 are peeled off by laser glass technology to form a flexible Micro-LED, so as to realize the color display of the flexible Micro-LED vertical structure.

[0121] As shown in Figure 5 In some embodiments of the present application, in step S1, the epitaxial wafer 100 comprises the substrate 110, the N semiconductor layer 120, the quantum well 130 and the P semiconductor layer 140 which are stacked in sequence.

[0122] In the present embodiment, the orthogonal projection of the N semiconductor layer 120, the quantum well 130 and the P semiconductor layer 140 on the plane of the substrate 110 coincides with the substrate 110.

[0123] As shown in Figure 6 and Figure 7 In some embodiments of the present application, the step S2 further comprises S201, and the protective layer 150 is stacked on the side of the epitaxial wafer 100 away from the substrate 110.

[0124] In the present embodiment, the protective layer 150 is deposited on the P semiconductor layer 140 by vapor deposition.

[0125] It should be noted that the protective layer 150 is a silicon dioxide layer. It can be understood that the protective layer 150 is stacked on the side of the P semiconductor layer 140 away from the substrate 110.

[0126] In the present embodiment, the orthogonal projection of the protective layer 150 on the P semiconductor layer 140 coincides with the P semiconductor layer 140, so as to form a protective effect on the P semiconductor layer 140 by the protective layer 150.

[0127] S202, a second photoresist layer 160 is etched on the side of the protective layer 150 away from the substrate 110, and the second photoresist layer 160 is exposed and developed to form a plurality of spaced photoresist segments.

[0128] The second photoresist layer 160 is etched on the protective layer 150 by exposure and development, that is, a plurality of spaced photoresist segments are formed by exposure and development.

[0129] It should be noted that the second photoresist layer 160 is etched to form a preset pattern by directional exposure and development.

[0130] S203, etching is performed on the protective layer 150 so that the orthogonal projection of the protective layer 150 on the plane where the second photoresist layer 160 is located completely coincides with the photoresist segments.

[0131] Specifically, the protective layer 150 is etched based on the pattern etched on the second photoresist layer, and the etching on the protective layer 150 is dry etching.

[0132] S204, the remaining second photoresist layer is removed.

[0133] Specifically, after the etching on the protective layer 150 is completed, the remaining second photoresist layer 160 is removed by plasma stripping.

[0134] It should be noted that dry stripping is also called plasma stripping, which has a similar principle to plasma cleaning. The photoresist is removed by the reaction between oxygen nuclei and photoresist in the plasma environment. Since the basic component of the photoresist is carbon-hydrogen organic matter, under the action of radio frequency or microwave, oxygen is ionized into oxygen atoms and reacts with the photoresist to generate carbon monoxide, carbon dioxide and water, etc. The reaction gas is pumped out by vacuum to complete the removal of the photoresist. Adding nitrogen or hydrogen to the reaction gas can improve the stripping performance and enhance the removal of residues.

[0135] S205, etching is performed on the N semiconductor layer 120, the quantum well 130 and the P semiconductor layer 140 to form a plurality of spaced PN junctions 300, and each PN junction 300 is coincided with the protective layer 150 etched in step S203 in the orthogonal projection on the plane where the protective layer 150 is located.

[0136] In this embodiment, the etching is wet etching.

[0137] It should be noted that the wet etching is used to form a plurality of spaced columnar structure PN junctions 300, and the distance between any two adjacent PN junctions 300 is equal.

[0138] S206, removing the protective layer 150.

[0139] Specifically, the protective layer 150 is dissolved by BOE (Buffered Oxide Etch) corrosion, so as to remove the protective layer 150 from the PN junction 300.

[0140] As shown in Figure 8 and Figure 9 In some embodiments of the present application, step S3 further comprises S301, filling a third photoresist 1000 in the gap between any two adjacent PN junctions 300, and performing a third time of photolithography on the third photoresist 1000 to form a plurality of spaced photoresist columns.

[0141] Specifically, the filled third photoresist 1000 is exposed and developed to form a visible photoresist pattern, and the position of the photoresist is determined to facilitate subsequent removal of the third photoresist 1000.

[0142] It should be noted that the height of each photoresist column is equal, that is, the vertical distance from the side of each photoresist column away from the substrate 110 to the side of the photoresist column close to the substrate 110 is equal, and the height of each photoresist column is greater than the height of the PN junction 300.

[0143] The height of the PN junction 300 refers to the vertical distance from the side of the PN junction 300 away from the substrate 110 to the side of the PN junction 300 close to the substrate 110.

[0144] S302, spraying the first conductive layer 400 on the side of the PN junction 300 away from the substrate 110.

[0145] The first conductive layer 400 is a silver nano layer. Specifically, the spraying method is inkjet printing.

[0146] S303, removing the photoresist column to stack a first conductive segment on the side of each PN junction 300 away from the substrate 110.

[0147] Specifically, the photoresist column is peeled off from between the PN junctions 300 by dry etching.

[0148] In some embodiments of the present application, in step S4, the number of the PN junctions 300 is equal to the number of the first conductive parts 210, and the orthogonal projection of each PN junction 300 on the plane where the first conductive part 210 is located coincides with one of the first conductive parts 210.

[0149] As shown in Figure 4 and Figure 12As shown, in some embodiments of the present invention, step S6 further includes S601, depositing a fourth photoresist layer 1200 on the side of the passivation layer 500 away from the flexible substrate 200.

[0150] Specifically, a fourth photoresist layer 1200 is formed on the passivation layer 500 by spraying, and the fourth photoresist layer 1200 completely covers the side of the passivation layer 500 away from the flexible substrate 200.

[0151] S602, a plurality of vias are etched on the fourth photoresist layer 1200 so that the orthogonal projection of each first conductive part 210 and each second conductive part 220 on the plane of the fourth photoresist layer 1200 covers a via.

[0152] Specifically, multiple through holes are formed on the fourth photoresist through a fourth photolithography process using exposure and development.

[0153] The sum of the number of first conductive parts 210 and the number of second conductive parts 220 is no more than the number of guide holes.

[0154] It should be noted that the first conductive part 210 is a P-PAD and the second conductive part 220 is an N-PAD.

[0155] S603, a plurality of spaced-apart guide holes are etched through the through-hole onto the passivation layer 500.

[0156] Specifically, the passivation layer 500 is etched using a dry etching method to form multiple spaced-apart guide holes on the passivation layer 500.

[0157] S604, remove the fourth photoresist layer 1200, and provide the second conductive layer 600 on the side of the passivation layer 500 away from the flexible substrate 200. The second conductive layer 600 fills each of the guide holes to connect the second conductive part and each N semiconductor layer.

[0158] Specifically, the fourth photoresist is removed by plasma method, and the second conductive layer 600 is printed on the side of the passivation layer 500 away from the flexible substrate 200 by inkjet printing, and the second conductive layer 600 is filled in each guide hole to form a conductive pillar in the guide hole.

[0159] It should be noted that the second conductive layer 600 is a silver nanolayer, through which the second conductive part 220 is electrically connected to the PN junction 300.

[0160] like Figures 13 to 16 As shown, in some embodiments of the present invention, in step S7, the orthographic projection of each of the PN junctions 300 onto the plane where the fifth photoresist 700 is located at least partially covers one of the photoresist grooves.

[0161] It is understood that the orthographic projection of each PN junction 300 onto the plane containing the fifth photoresist 700 covers one of the photolithographic grooves. Alternatively, the orthographic projection of each PN junction 300 onto the plane containing the fifth photoresist 700 covers one of the photolithographic grooves.

[0162] Optionally, the orthographic projection of each PN junction 300 onto the plane containing the fifth photoresist 700 lies within one of the photolithography grooves. This can be specifically configured according to actual conditions.

[0163] It should be noted that, in some embodiments of the present invention, the quantum dot is either a red quantum dot 800a or a green quantum dot 800b, and any two adjacent quantum dots are of different colors.

[0164] It should be noted that the number of red quantum dots 800a is equal to the number of green quantum dots 800b.

[0165] like Figures 15 to 17 As shown, in some embodiments of the present invention, in step S8, the color filter is any one of a red color filter 920a, a green color filter 920b, and a blue color filter 920c, and the colors of any two adjacent color filters are different.

[0166] Among them, the number of red filters 920a is equal to the number of red quantum dots, the number of green filters 920b is equal to the number of green quantum dots, and the number of blue filters 920c is equal to the number of blank photolithography grooves.

[0167] Specifically, the red filter 920a is bonded to the red quantum dot 800a, the green filter 920b is bonded to the green quantum dot 800b, and the blue filter 920c is bonded to the blank photolithography groove.

[0168] In addition, the orthographic projections of the quantum dots and color filters onto the plane of the flexible substrate 200 are either circles or regular polygons, which can be specifically set according to the actual situation.

[0169] In some embodiments of the present invention, the orthographic projection of the quantum dot and the color filter onto the plane of the flexible substrate 200 is a regular hexagon, that is, the PN junction 300 is a regular hexagonal prism.

[0170] Some embodiments of the present invention also provide a flexible Micro-LED, which is a flexible Micro-LED fabricated using the fabrication method of the flexible Micro-LED described in any of the above embodiments.

[0171] Some embodiments of the present application also provide a display device, comprising at least the flexible Micro-LED of any one of the above-mentioned embodiments.

[0172] In all examples shown and described herein, any specific values should be interpreted as merely exemplary and not limiting, and thus other examples of the example embodiments can have different values.

[0173] It should be noted that like reference numerals and letters refer to like items throughout the several views, and once an item is defined in one view, it is not necessary to further define and explain it in the subsequent views.

[0174] The above-described embodiments are merely illustrative of several embodiments of the present application, and the description is relatively specific and detailed, but should not be understood as limiting the scope of the present application. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application.

Claims

1. A method for fabricating a flexible Micro-LED, characterized in that, Includes the following steps: S1, Obtain an epitaxial wafer and a flexible substrate, wherein the epitaxial wafer includes a substrate, an N semiconductor layer, a quantum well, and a P semiconductor layer; S2, etching a plurality of phase-spaced PN junctions on the side of the epitaxial wafer away from the substrate, etching on the N semiconductor layer, quantum well and P semiconductor layer to form the plurality of phase-spaced PN junctions; S3, a first conductive layer is sprayed on the side of each PN junction away from the substrate. The first conductive layer is a metal nanolayer. S4, a plurality of phase-spaced first conductive portions and a plurality of phase-spaced second conductive portions are disposed on a flexible substrate, the number of PN junctions being equal to the number of first conductive portions, each PN junction being aligned and bonded to a first conductive portion, and the substrate being peeled off. S5, deposit a passivation layer on one side of the flexible substrate to cover each PN junction; S6, etch guide holes on the passivation layer to expose each second conductive part and each N semiconductor layer, then spray the second conductive layer on the passivation layer and fill the guide holes to achieve PN junction conduction. S7, a first CPI film is stacked on the side of the second conductive layer away from the substrate, a fifth photoresist is coated on the side of the first CPI film away from the substrate, a plurality of spaced photoresist grooves are etched on the fifth photoresist, a portion of the photoresist grooves are filled with quantum dots, and the orthogonal projection of each PN junction on the plane of the fifth photoresist at least partially covers one of the photoresist grooves, and the fifth photoresist is a flexible photoresist. S8, Obtain a substrate, stack a second CPI film on the substrate, and attach multiple phase-spaced color filters to the side of the second CPI film away from the substrate; S9, the second CPI film is attached to the fifth photoresist so that each color filter is aligned and bonded to a photolithography groove, and finally the substrate is peeled off to form a flexible Micro-LED.

2. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, Step S2 further includes S201, where a protective layer is stacked on the side of the epitaxial wafer away from the substrate; S202, a second photoresist layer is sprayed or spin-coated on the side of the protective layer away from the substrate, and etched or developed on the second photoresist layer to form multiple phase-spaced photoresist segments; S203, etching on the protective layer so that the orthographic projection of the protective layer on the plane where the second photoresist layer is located completely coincides with the photoresist segment; S204, remove the remaining second photoresist layer; S205, the orthographic projection of each PN junction onto the plane of the protective layer coincides with the etched protective layer in step S203; S206, Remove the protective layer.

3. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, Step S3 further includes S301, filling the gap between any two adjacent PN junctions with a third photoresist, and performing a third photolithography on the third photoresist to form a plurality of spaced photoresist pillars; S302, the first conductive layer is sprayed on the side of the PN junction away from the substrate; S303, Remove the photoresist pillars to stack a first conductive segment on the side of each PN junction away from the substrate.

4. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, In step S4, the orthographic projection of each PN junction onto the plane containing the first conductive portion coincides with one of the first conductive portions.

5. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, Step S6 also includes S601, depositing a fourth photoresist layer on the side of the passivation layer away from the flexible substrate; S602, a plurality of vias are etched on the fourth photoresist layer so that the orthogonal projection of each first conductive part and each second conductive part on the plane of the fourth photoresist layer covers a via. S603, a plurality of phase-spaced guide holes are etched on the passivation layer through the through-hole; S604, remove the fourth photoresist layer, and deposit the second conductive layer on the side of the passivation layer away from the flexible substrate. The second conductive layer fills each of the guide holes to connect the second conductive portion and each N semiconductor layer.

6. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, In step S7, the quantum dot is either a red quantum dot or a green quantum dot; Any two adjacent quantum dots have different colors.

7. The method for fabricating flexible Micro-LEDs according to claim 6, characterized in that, In step S8, the color filter is any one of a red color filter, a green color filter, and a blue color filter, and any two adjacent color filters are different colors.

8. The method for fabricating flexible Micro-LEDs according to claim 7, characterized in that, In step S9, the red filter is bonded to the red quantum dot, the green filter is bonded to the green quantum dot, and the blue filter is bonded to the empty photolithography groove.

9. The method for fabricating flexible Micro-LEDs according to claim 1, characterized in that, The orthographic projection of the quantum dot onto the plane of the substrate is a circle or a regular polygon.

10. The method for fabricating flexible Micro-LEDs according to claim 9, characterized in that, The quantum dot's orthographic projection onto the plane of the substrate is a regular hexagon.

11. A flexible Micro-LED, characterized in that, The method for fabricating flexible Micro-LEDs according to any one of claims 1 to 10.

12. A display device, characterized in that, Including the flexible Micro-LED as described in claim 11.

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