Package substrate
By introducing a first magnetic layer and a second magnetic layer structure into the packaging substrate, the area of the inductor is increased and radiated noise is suppressed, solving the problems of insufficient inductance and severe noise, and realizing high-efficiency inductance and miniaturization of the packaging substrate.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MURATA MFG CO LTD
- Filing Date
- 2022-04-18
- Publication Date
- 2026-04-10
AI Technical Summary
In the prior art, the inductors on the packaging substrate are arranged on the same plane, resulting in insufficient inductance and serious radiated noise, which cannot meet the miniaturization requirements and requires additional noise suppression components.
The packaging substrate structure includes a first magnetic layer and a second magnetic layer. The first magnetic layer contains first magnetic particles and resin, and the second magnetic layer contains second magnetic particles with a flatness higher than that of the first magnetic particles. The inductor wiring is disposed in the first magnetic layer, and the second magnetic layer is used to suppress radiated noise.
This approach increases the inductance of the inductor, reduces losses, and effectively suppresses radiated noise, supporting miniaturization of the packaging substrate and optimization of composite components.
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Figure CN115224008B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a packaging substrate. BACKGROUND
[0002] A system of a semiconductor package having a packaging substrate in which an inductor or a capacitor is embedded is disclosed in Patent Literature 1. A voltage control device (hereinafter, referred to as a voltage regulator) including an activation element (active element) such as a switching element is mounted on the packaging substrate. The voltage regulator acts in conjunction with the inductor or the capacitor.
[0003] The inductor is formed by a path linking a via hole in the packaging substrate, a via hole in a circuit substrate, and an inductor coil mounted on the back surface of the circuit substrate.
[0004] A printed wiring substrate and a switching regulator are described in Patent Literature 2.
[0005] The printed wiring substrate has a sheet-shaped core substrate including a magnetic material, a coil provided inside the core substrate, and an external circuit layer provided outside at least one of a first surface and a second surface of the core substrate which are opposed to each other.
[0006] The core substrate is composed of a composite material of a metal magnetic filler and a resin.
[0007] Patent Literature 1: U.S. Patent Application Publication No. 2011 / 0050334 Specification
[0008] Patent Literature 2: Japanese Patent Application Laid-Open No. 2018-182222
[0009] In the technology described in Patent Literature 1, since the inductor and the capacitor are laid out on the same plane, sufficient inductance cannot be obtained due to the size constraint caused by the size shrinkage of the IC resulting from the miniaturization of the wiring processing technology of the IC.
[0010] In addition, in order to compensate for the deficiency of the inductance, a parasitic component generated by the via hole in the circuit substrate is effectively utilized, but since a magnetic material is not used as the material of the circuit substrate, there is a problem that a large inductance cannot be ensured.
[0011] In addition, when the coil (inductor) is provided inside the core substrate as described in Patent Literature 2, there is a problem that the radiation noise from the inductor causes a malfunction. Moreover, there is a case where an additional element is required in order to remove the noise. SUMMARY
[0012] Therefore, an object of the present application is to provide a packaging substrate capable of obtaining sufficient inductance and suppressing the radiation noise from the inductor.
[0013] The package substrate of the present application is characterized by having an inductor layer, the inductor layer having a first magnetic layer and a second magnetic layer, wherein the first magnetic layer contains first magnetic particles and a resin, the second magnetic layer is provided on at least one surface of the first magnetic layer and contains a resin and second magnetic particles having a larger average flatness than the first magnetic particles, the second magnetic particles are particles having a shape in which a dimension in a direction along a main surface of the second magnetic layer is longer than a dimension in a thickness direction of the second magnetic layer, and an inductor wiring functioning as an inductor is provided inside the first magnetic layer.
[0014] According to the present application, a package substrate capable of obtaining sufficient inductance and suppressing radiation noise from an inductor can be provided. BRIEF DESCRIPTION OF DRAWINGS
[0015] Figure 1 is a cross-sectional view schematically showing one example of a package substrate.
[0016] Figure 2 is a cross-sectional view schematically showing one example of a semiconductor composite device in which Figure 1 a voltage regulator and a load are mounted on the package substrate shown in FIG. 1.
[0017] Figure 3 is a block diagram showing one example of a circuit structure of a semiconductor composite device.
[0018] Figure 4 is a cross-sectional photograph showing one example of a layer structure of an inductor layer.
[0019] Figure 5 is a plan view schematically showing a pattern of an inductor wiring.
[0020] Figure 6 is an enlarged cross-sectional photograph showing one example of a second magnetic layer in an enlarged manner.
[0021] Figure 7 is a cross-sectional view schematically showing a flatness of a particle.
[0022] Figure 8 is a cross-sectional view schematically showing one example of a manner of mounting a semiconductor composite device to a mother substrate.
[0023] Figure 9 is a cross-sectional view schematically showing another example of a manner of mounting a semiconductor composite device to a mother substrate.
[0024] Figure 10 is a cross-sectional view schematically showing another example of a package substrate.
[0025] Figure 11is a cross-sectional view schematically showing another example of a package substrate.
[0026] Figure 12 is a cross-sectional view schematically showing another example of a package substrate.
[0027] Figure 13 is a graph showing the relationship between the size of the second magnetic particles and the inductance reduction value.
[0028] Figure 14 is a cross-sectional view schematically showing the size of the inductor layer used in the experiment.
[0029] Figure 15 is a graph showing the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and the inductance.
[0030] Figure 16 is a graph showing the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and the overlapping characteristic.
[0031] BRIEF DESCRIPTION OF DRAWINGS
[0032] 1, 1A, 1B... semiconductor composite device; 10... first magnetic layer; 11... first magnetic particle; 12... resin; 13... inductor wiring; 14a, 14b, 14c, 14d... straight line; 15a, 15b, 15c... connecting portion; 20... second magnetic layer; 20a... upper surface side second magnetic layer; 20b... lower surface side second magnetic layer; 21... second magnetic particle; 22... resin; 100... voltage regulator; 120... solder bump; 200, 200A, 200B, 200C, 200D, 200E... package substrate; 205... upper surface terminal layer; 210... capacitor layer; 225... insulating portion; 226, 227, 228... resin layer; 230... capacitor portion; 231... anode plate; 232... core portion; 234... porous portion; 236... cathode layer; 240... conductive portion; 242... conductive conductor; 250... inductor layer; 261, 262, 263, 266, 267... via conductor; 270... bottom surface terminal layer; 300... load; 380... solder bump; 350... other electronic device; 400... mother substrate; 410... terminal of the mother substrate; 420... heat sink; CP1... capacitor; L1... inductor. DETAILED DESCRIPTION
[0033] Hereinafter, the package substrate of the present application will be described.
[0034] However, the present application is not limited to the following structures, and can be appropriately changed and applied within the scope of the gist of the present application. Furthermore, a structure in which two or more of the preferred structures of each embodiment of the present application described below are combined is also the present application.
[0035] The package substrate of the present application has an inductor layer having a first magnetic layer and a second magnetic layer, wherein the first magnetic layer contains first magnetic particles and a resin, and the second magnetic layer is provided on at least one surface of the first magnetic layer and contains a resin and second magnetic particles having a larger average flatness than the first magnetic particles.
[0036] The second magnetic particles are particles having a shape in which a dimension in a direction along a main surface of the second magnetic layer is longer than a dimension in a thickness direction of the second magnetic layer.
[0037] An inductor wiring that functions as an inductor is provided inside the first magnetic layer.
[0038] The inductor wiring is formed inside the package substrate, so that the area of the inductor can be increased, and thus a sufficient inductance can be obtained. In addition, loss due to degradation of the Q value of the inductor can be reduced.
[0039] In addition, by forming the inductor wiring inside the package substrate, miniaturization of a composite component including the inductor can be achieved.
[0040] In addition, by providing the inductor wiring inside the first magnetic layer containing a magnetic material, the Q value of the inductor can be increased and loss can be reduced. Further, by providing the second magnetic layer containing second magnetic particles having a large flatness, radiation noise from the inductor can be suppressed.
[0041] [First Embodiment of Package Substrate]
[0042] The package substrate of the first embodiment has a capacitor layer in which a capacitor is formed inside, in addition to the inductor layer.
[0043] The second magnetic layer of the inductor layer is located between the first magnetic layer of the inductor layer and the capacitor layer.
[0044] In addition, a via conductor is provided, which penetrates the first magnetic layer, the second magnetic layer, and the capacitor layer of the inductor layer in the thickness direction.
[0045] Figure 1 is a cross-sectional view schematically showing one example of a package substrate.
[0046] Figure 2 is a cross-sectional view schematically showing one example of a semiconductor composite device in which Figure 1 is a cross-sectional view schematically showing one example of a semiconductor composite device in which
[0047] Figure 3 is a block diagram showing one example of a circuit structure of a semiconductor composite device.
[0048] As Figure 1As shown, the package substrate 200 includes a capacitor layer 210 in which a capacitor is formed, and an inductor layer 250 in which an inductor wiring is provided.
[0049] In the capacitor layer 210, a capacitor CP1 is present, and in the inductor layer 250, an inductor LI is present (the capacitor CP1, the inductor LI are described later with reference to Figure 3 ).
[0050] A resin layer 227 is provided between the capacitor layer 210 and the inductor layer 250.
[0051] The resin layer 226 is provided as an insulating layer for insulating the exposed surface of the capacitor layer 210.
[0052] The resin layer 228 is provided as an insulating layer for insulating the exposed surface of the inductor layer 250.
[0053] In Figure 2 In the semiconductor composite 1 shown, a voltage regulator (VR) 100 and a load 300 are mounted on the package substrate 200. The load 300 is, for example, a semiconductor integrated circuit (IC) such as a logic operation circuit or a memory circuit.
[0054] In addition, other electronic devices 350 other than the voltage regulator 100 and the load 300 can also be mounted on the mounting surface of the package substrate 200.
[0055] The voltage regulator 100 includes an active element (not shown) such as a semiconductor switching element, and adjusts a direct current voltage supplied from the outside to a voltage level suitable for the load 300 by controlling the duty ratio of the active element.
[0056] The package substrate 200 mounts the voltage regulator 100 and the load 300 on its surface, and configures the semiconductor composite 1 as one package component.
[0057] Chip components such as a capacitor for decoupling, a choke inductor, a diode element for surge protection, and a resistance element for voltage division can also be mounted on the package substrate 200 as a noise countermeasure. In the input from the output of the voltage regulator to the load, an inductor and a capacitor are arranged as a ripple filter to configure, for example, a chopper-type step-down switching regulator.
[0058] The package substrate 200 has a face on which the load 300 is mounted as an upper surface, and has pads for mounting electronic components such as the load 300 and the voltage regulator 100 on the upper surface, and an upper surface terminal layer 205 for electrically connecting the above-mentioned pads. The package substrate 200 has a bottom surface terminal layer 270 for mounting the semiconductor composite device 1 to a mother substrate on a face opposite to the upper surface of the package substrate 200, that is, the bottom surface. The bottom surface terminal layer 270 can also be provided with wiring for forming a circuit.
[0059] In Figure 2 the semiconductor composite device 1 shown in the drawing, the inductor LI is connected between the input terminal IN and the output terminal OUT of the package substrate 200. The inductor LI is connected to the voltage regulator 100 at the input terminal IN, and is connected to the load 300 at the output terminal OUT. The capacitor CPI is connected between the output terminal OUT and a ground terminal GND (not shown in the drawing). Figure 2
[0060] A chopper-type step-down switching regulator is formed by the voltage regulator 100, the inductor LI in the package substrate 200, and the capacitor CPI. The inductor LI and the capacitor CPI function as a ripple filter of the step-down switching regulator.
[0061] Through this switching regulator, for example, a direct current voltage of 5 V inputted from the outside is stepped down to 1 V, and is supplied to the load 300.
[0062] The package substrate 200 has through-hole conductors 261, 262 formed by metalizing through-holes that pass through the package substrate 200. The package substrate has the through-hole conductors, thereby electrically connecting the respective elements in the thickness direction of the package substrate 200. In this way, for the power supply wiring from the voltage regulator 100 to the load 300 via the ripple filter (the capacitor layer 210 and the inductor layer 250), the through-hole conductors that are circuited in the perpendicular direction with respect to the circuit surface are used, and the planar wiring that constitutes the upper surface terminal layer is not used, thereby being able to reduce the impedance of the wiring, and to minimize the layout of the circuit surface, and thus being able to reduce the size of the semiconductor composite device.
[0063] In order to understand the above-mentioned description, in Figure 3 the drawing, the relationship of the structure of the circuit from the voltage regulator to the load and the through-hole conductors is shown as an example of the chopper-type step-down switching regulator. As shown in the drawing, Figure 3 the power supply wiring from the output of the voltage regulator (VR) 100 to the input of the load (Load) 300 is connected via the inductor LI in the shortest and smallest area. Such a structure is particularly effective in a semiconductor composite device having a thin substrate structure like the package substrate.
[0064] Next, the detailed structure of the inductor layer that constitutes the package substrate will be described.
[0065] The inductor layer has a part of the substrate internal wiring, which is one of the components of the package substrate, have an inductive component.
[0066] The inductor layer has a first magnetic layer and a second magnetic layer, wherein the first magnetic layer contains first magnetic particles and a resin, and the second magnetic layer is provided on at least one surface of the first magnetic layer and contains a resin and second magnetic particles having an average flatness greater than the first magnetic particles.
[0067] The inductor wiring, which functions as an inductor, is provided inside the first magnetic layer.
[0068] In addition, an external circuit layer can be provided on the surface of the second magnetic layer.
[0069] Figure 4 is a cross-sectional photograph showing one example of the layer structure of the inductor layer.
[0070] Figure 4 The inductor layer 250 shown in the drawing has a first magnetic layer 10 and a second magnetic layer 20. The second magnetic layer 20 is provided on one surface and the other surface of the first magnetic layer 10. The second magnetic layer 20 provided on the upper surface of the first magnetic layer 10 is the upper surface side second magnetic layer 20a, and the second magnetic layer 20 provided on the lower surface of the first magnetic layer 10 is the lower surface side second magnetic layer 20b.
[0071] The first magnetic layer 10 contains first magnetic particles 11 and a resin 12. In addition, the inductor wiring 13 is provided inside the first magnetic layer 10.
[0072] As the material of the first magnetic particles 11, sendust (Fe-Si-Al) (μ = 5 or more and 40 or less: μ represents magnetic permeability), Fe-Si-B (μ = 5 or more and 40 or less), Fe-Si-Cr (μ = 5 or more and 35 or less), silicon steel (Fe-Si) (μ = 5 or more and 30 or less), iron (Fe) (μ = 5 or more and 25 or less), or the like can be used.
[0073] The magnetic permeability shown above is the magnetic permeability including the influence of the shape of the first magnetic particles.
[0074] The magnetic permeability of the material of the first magnetic particles can be, for example, sendust (μ = 4000 or more and 12000 or less), Fe-Si-B (μ = 500 or more and 4000 or less), Fe-Si-Cr (μ = 300 or more and 4000 or less), Fe (μ = 100 or more and 5000 or less).
[0075] It is preferable that the first magnetic particles be spherical particles. If the first magnetic particles are spherical, the filling property is excellent, and the proportion of the magnetic particles to be mixed can be increased.
[0076] As the spherical particles, particles having a flatness of 1 / 3 (≈0.33) or less, which is determined according to the definition of the flatness described later, can be used.
[0077] It is preferable that the filling rate of the first magnetic particles in the first magnetic layer be 50% or more. The filling rate can be calculated as the proportion of the area occupied by the first magnetic particles in the first magnetic layer in the cross-sectional photograph shown in FIG. 1. In this calculation, the area occupied by the inductor wiring 13 is excluded from the area of the first magnetic layer. Figure 4 Figure 4
[0078] As the resin 12 constituting the first magnetic layer 10, resins such as an epoxy resin, or a phenol resin, or a polyimide resin can be given.
[0079] As the inductor wiring 13, a metal wiring formed by patterning a copper core material (copper foil) formed to a thickness of about 100 μm by an electroforming method or a rolling method into a spiral shape using a photoresist or the like and then etching can be used.
[0080] The inductor wiring is a wiring that functions as an inductor.
[0081] When a plane along the main surface of the first magnetic layer is observed in plan view, it is preferable that the inductor wiring be one wiring that links a plurality of straight lines in which the direction of current flow is different and the shape of the linking portion that links the plurality of straight lines be a straight line or a curve, and the direction of current flow in one straight line and the direction of current flow in a straight line adjacent to the one straight line be different.
[0082] Figure 5 is a plan view that schematically represents the pattern of the inductor wiring.
[0083] Figure 5 The inductor wiring 13 shown in FIG. 1 is one wiring that links a plurality of straight lines, i.e., straight line 14a, straight line 14b, straight line 14c, and straight line 14d, in which the direction of current flow is different, using linking portion 15a, linking portion 15b, and linking portion 15c. Linking portion 15a, linking portion 15b, and linking portion 15c are all curves.
[0084] In straight line 14a and straight line 14b, straight line 14b and straight line 14c, and straight line 14c and straight line 14d, which are adjacent straight lines, the direction of current flow is different in each.
[0085] In addition, one end (IN) of the inductor wiring 13 is electrically connected to via conductor 261, and the other end (OUT) is electrically connected to via conductor 262.
[0086] InFigure 5 A via conductor 263 used as a ground line (GND) is also shown.
[0087] By making the inductor wiring in such a shape, an inductance that cannot be obtained in a straight line shape can be obtained with a higher area efficiency.
[0088] In order for the inductor wiring to function as an inductor, it is preferable that the inductor wiring not be a wiring pattern in which one end and the other end are connected by a straight line.
[0089] In the above example, the directions in which the currents flow between the adjacent straight lines are exactly opposite directions, but since the directions in which the currents flow can be different, it is not limited to the case in which the directions are opposite.
[0090] The directions in which the currents flow between the adjacent straight lines mean different wiring from wiring in which the wiring is wound in a shape such as a spiral shape, a solenoid shape, or a vortex shape.
[0091] The inductor wiring of the above example can also be said to be wiring in which the wiring is not wound in a shape. If the wiring is not wound in a shape, noise can be reduced.
[0092] The pattern of the inductor wiring can also be a so-called meandering shape. In addition, it can be wiring that is composed of a plurality of straight lines and connection portions and in which the number of connection portions is two or more. It is more preferable that the number of connection portions be three or more and be preferably ten or less.
[0093] In wiring such as a spiral shape or a solenoid shape, it is difficult to thicken the thickness of the wiring, but if the wiring is in a shape as in the above example, the thickness of the wiring can be thickened, so the wiring resistance can be reduced, and a large current can flow.
[0094] The inductor wiring of the above example is single-layer wiring. If the wiring is single-layer wiring, a via for connecting between layers in multi-layer wiring is not needed, so the wiring can be thickened, and the cross-sectional area of the wiring can be increased.
[0095] In addition, since the wiring is arranged without overlapping, the heating sites are not concentrated, the heat dissipation is improved, so from this viewpoint as well, a large current can flow.
[0096] In order to form wiring suitable for flowing a large current, the thickness of the inductor wiring is preferably 100 μm or more. In addition, from the viewpoint of thinning the package substrate, it is preferably 300 μm or less.
[0097] The width of the inductor wiring is preferably 50 μm or more. In addition, by increasing the width of the inductor wiring, the wiring resistance can be reduced. In addition, wiring suitable for flowing a large current can be formed. In addition, the width of the inductor wiring is preferably 1000 μm or less.
[0098] In addition, in a plan view (shown in FIG. 1) in which the first magnetic layer including the inductor wiring is viewed from above, the proportion of the area of the inductor wiring to the entire area of the first magnetic layer is preferably 20% or more, and more preferably 40% or more. Figure 5
[0099] If the proportion of the area of the inductor wiring is set to 20% or more, the wiring resistance can be suppressed and the inductance can be increased.
[0100] The aspect ratio represented by the thickness of the wiring / the width of the wiring of the inductor wiring is preferably 0.2 or more.
[0101] The aspect ratio is a value represented by "the length (the thickness of the wiring) represented by the bidirectional arrow t / the length (the width of the wiring) represented by the bidirectional arrow w". Figure 4
[0102] If the aspect ratio is 0.2 or more, the thickness of the wiring is thick, and thus a large current can flow.
[0103] In addition, the aspect ratio is preferably 4 or less.
[0104] The second magnetic layer is provided to at least one face of the first magnetic layer.
[0105] In the inductor layer 250 shown in FIG. 1, the second magnetic layer 20 is provided to one face and the other face of the first magnetic layer 10. Referring to FIG. 2, the second magnetic layer 20 is provided to one face and the other face of the first magnetic layer 10. Figure 4 The internal structure of such a second magnetic layer will be described. Figure 6
[0106] Figure 6 is an enlarged sectional photograph showing one example of the second magnetic layer.
[0107] The second magnetic layer 20 includes second magnetic particles 21 and a resin 22.
[0108] As the material of the second magnetic particles 21, aluminum-silicon-iron powder (Fe-Si-Al) (μ = 40 or more and 200 or less), Fe-Si-B (μ = 40 or more and 100 or less), Fe-Si-Cr (μ = 35 or more and 80 or less), silicon steel (Fe-Si) (μ = 35 or more and 60 or less), or the like can be used.
[0109] The magnetic permeability shown above is a magnetic permeability in which the influence of the shape of the second magnetic particles is also included.
[0110] The magnetic permeability of the material of the second magnetic particles is, for example, aluminum-silicon-iron powder (μ = 4000 or more and 12000 or less), Fe-Si-B (μ = 500 or more and 4000 or less), or Fe-Si-Cr (μ = 300 or more and 4000 or less).
[0111] The second magnetic particles are particles having a larger average flatness ratio than the first magnetic particles.
[0112] Figure 7 is a cross-sectional view schematically showing the flatness ratio of the particles.
[0113] In the cross-sectional shape of the particles, the direction in which the size of the particles is the smallest is set as the Z direction, and the direction in which the size of the particles is longer among the two directions orthogonal to the Z direction is set as the X direction. Also, when the size (diameter) in the X direction is set as the major axis a and the size (diameter) in the Z direction is set as the minor axis b, the flatness ratio f is represented by f = 1 - (b / a). If the shape of the particles is a spherical shape (cross section is a circle), the flatness ratio is 0, and if the shape of the particles is a completely flattened shape, the flatness ratio is 1.
[0114] Since the first magnetic particles are preferably spherical particles, the flatness ratio is close to 0. On the other hand, since the second magnetic particles are particles having a cross-sectional shape that is plate-like and a high flatness ratio, the flatness ratio is close to 1. Therefore, the flatness ratio of the second magnetic particles is higher than that of the first magnetic particles.
[0115] The flatness ratios of the first magnetic particles and the second magnetic particles can be determined by measuring the sizes of the respective particles in the cross-sectional photographs shown in Figure 4 , Figure 6 The flatness ratios of at least 10 particles included in the cross-sectional photographs can be measured, and the average value thereof can be determined.
[0116] In addition, the second magnetic particles are particles having a shape in which the size in the direction along the main surface of the second magnetic layer (the direction indicated by the bidirectional arrow L in Figure 6 is longer than the size in the thickness direction of the second magnetic layer (the direction indicated by the bidirectional arrow T in Figure 6 ). This means that the orientation direction of the second magnetic particles having a large flatness ratio is in the direction along the main surface of the second magnetic layer.
[0117] The size in the direction along the main surface of the second magnetic layer (corresponding to the major axis a in Figure 7 ) among the sizes of the second magnetic particles is preferably 50 μm or more and is preferably 1000 μm or less. In addition, the size in the thickness direction of the second magnetic layer (corresponding to the minor axis b in Figure 7 ) is preferably 0.5 μm or more and is preferably 50 μm or less.
[0118] Further, the aspect ratio of the second magnetic particles is preferably 0.9 or more. The aspect ratio of the second magnetic particles can be less than 1.
[0119] Further, the aspect ratio of the first magnetic particles is preferably 1 / 3 (≈0.33) or less. The aspect ratio of the first magnetic particles can be 0 or more.
[0120] As the resin 22 constituting the second magnetic layer 20, an epoxy resin, or a phenol resin, or a polyimide resin, or the like can be given. The kind of the resin 22 constituting the second magnetic layer 20 can be the same as the kind of the resin 12 constituting the first magnetic layer 10, or can be different from the kind of the resin 12 constituting the first magnetic layer 10.
[0121] The second magnetic particles are particles having a large aspect ratio, and the magnetic permeability has anisotropy. The second magnetic particles have a large dimension in the direction along the main surface of the second magnetic layer, and a small dimension in the thickness direction of the second magnetic layer, and thus the magnetic permeability in the direction along the main surface of the second magnetic layer is high.
[0122] If the second magnetic layer having such characteristics is provided to at least one surface of the first magnetic layer, leakage magnetic flux from the inductor provided inside the first magnetic layer can be prevented from leaking from the second magnetic layer. That is, the leakage magnetic flux from the inductor can be confined within the inductor layer.
[0123] Therefore, the influence (decrease in inductance) of elements other than the inductor (active elements, capacitors, bypass wiring, and the like) on the inductance can be reduced, and the radiation noise from the inductor can be suppressed.
[0124] The second magnetic layer preferably has a higher magnetic permeability in the direction along the main surface of the second magnetic layer than in the thickness direction of the second magnetic layer.
[0125] Further, the magnetic permeability in the direction along the main surface of the second magnetic layer is preferably 5 times or more the magnetic permeability in the thickness direction of the second magnetic layer.
[0126] If the magnetic permeability in the direction along the main surface of the second magnetic layer is higher than the magnetic permeability in the thickness direction of the second magnetic layer, the leakage magnetic flux from the inductor can be confined within the inductor layer. Further, if the magnetic permeability in the direction along the main surface of the second magnetic layer is 5 times or more the magnetic permeability in the thickness direction of the second magnetic layer, such an effect can be more effectively exerted.
[0127] The second magnetic layer preferably has a higher magnetic permeability in the direction along the main surface thereof than the first magnetic layer has in the direction along the main surface thereof.
[0128] Generally, a material with high magnetic permeability has poor filling properties, and it is difficult to fill a thick inductor wiring with a material with high magnetic permeability. Therefore, by providing a first magnetic layer filled with a material with high filling properties but low magnetic permeability, and laminating a second magnetic layer containing a material with high magnetic permeability and having high magnetic permeability in the direction along the direction of the main surface, both the filling properties and high inductance for thick inductor wiring can be taken into account, and the radiation noise from the inductor can be suppressed.
[0129] To more effectively exert such an effect, it is preferable that the magnetic permeability of the second magnetic layer in the direction along the direction of its main surface be 1.5 times or more the magnetic permeability of the first magnetic layer in the direction along the direction of its main surface.
[0130] For each of the second magnetic layer and the first magnetic layer, the magnetic permeability in the direction along the direction of its main surface and the magnetic permeability in the thickness direction thereof can be measured by a network analyzer or the like.
[0131] Next, the detailed structure of the capacitor layer constituting the package substrate will be described.
[0132] Figure 1 The capacitor layer 210 shown includes a capacitor portion 230, a conductive portion 240 electrically connected to a via conductor 262 of an output terminal OUT, a conductive portion electrically connected to a via conductor (not shown in Figure 1 FIG. 2) of a ground terminal GND, and an insulating portion 225 provided around them. Figure 5 The second magnetic layer 20 of the inductor layer 250 is located between the first magnetic layer 10 of the inductor layer 250 and the capacitor layer 210.
[0133] As described above, since the radiation noise from the inductor can be suppressed by the second magnetic layer, the surface wave noise propagation caused by the magnetic coupling generated between the inductor and the capacitor can be suppressed, and the quality of the package substrate can be improved.
[0134] In addition, the influence of the capacitor on the inductor (decrease in inductance) can be reduced.
[0135] In the present embodiment, the capacitor portion 230 includes an anode plate 231 composed of a metal. For example, the anode plate 231 has a core portion 232 composed of a valve action metal. The anode plate 231 preferably has a porous portion 234 provided to at least one main surface of the core portion 232. A dielectric layer (not shown) is provided to the surface of the porous portion 234, and a cathode layer 236 is provided to the surface of the dielectric layer. Thus, in the present embodiment, the capacitor portion 230 forms an electrolytic capacitor.
[0136]
[0137] When the capacitor portion 230 forms an electrolytic capacitor, the anode plate 231 is composed of a so-called valve-acting metal. As the valve-acting metal, for example, a metal single body such as aluminum, tantalum, niobium, titanium, zirconium, or the like, or an alloy containing at least one of the above metals, or the like can be given. Among these materials, aluminum or an aluminum alloy is preferable.
[0138] The shape of the anode plate 231 is preferably a flat plate, and more preferably a foil. The anode plate 231 can have a porous portion 234 on at least one main surface of the core portion 232, or can have a porous portion 234 on both main surfaces of the core portion 232. The porous portion 234 is preferably a porous layer formed on the surface of the core portion 232, and more preferably an etching layer.
[0139] The dielectric layer provided on the surface of the porous portion 234 becomes porous in accordance with the surface state of the porous portion 234, and has a surface shape with minute irregularities. The dielectric layer preferably contains an oxide film of the above-mentioned valve-acting metal. For example, when an aluminum foil is used as the anode plate 231, a dielectric layer containing an oxide film can be formed by subjecting the surface of the aluminum foil to an anodizing treatment (also referred to as a chemical conversion treatment) in an aqueous solution containing ammonium adipate or the like.
[0140] The cathode layer 236 provided on the surface of the dielectric layer includes, for example, a solid electrolyte layer provided on the surface of the dielectric layer. The cathode layer 236 also preferably includes a conductor layer provided on the surface of the solid electrolyte layer.
[0141] As a material constituting the solid electrolyte layer, for example, a conductive polymer such as a polypyrole-based material, a polythiophene-based material, a polyaniline-based material, or the like can be given. Among these materials, a polythiophene-based material is preferable, and a poly(3,4-ethylenedioxythiophene) referred to as PEDOT is particularly preferable. In addition, the above-mentioned conductive polymer can also include a dopant such as polystyrene sulfonic acid (PSS) or the like. Furthermore, the solid electrolyte layer preferably includes an inner layer that fills the pores (recesses) of the dielectric layer and an outer layer that covers the dielectric layer.
[0142] The conductor layer includes at least one of a conductive resin layer and a metal layer. The conductor layer can be only the conductive resin layer, or can be only the metal layer. The conductor layer preferably covers the entire surface of the solid electrolyte layer.
[0143] As the conductive resin layer, for example, a conductive adhesive layer including at least one conductive filler selected from the group consisting of a silver filler, a copper filler, a nickel filler, and a carbon filler, or the like can be given.
[0144] As the metal layer, for example, a metal plating film, a metal foil, or the like can be given. The metal layer is preferably composed of at least one metal selected from the group consisting of nickel, copper, silver, and an alloy having these metals as main components. Furthermore, the "main components" refer to the element components of which the weight ratio is the largest.
[0145] The conductive body layer includes, for example, a carbon layer provided on the surface of the solid electrolyte layer and a copper layer provided on the surface of the carbon layer.
[0146] The carbon layer is provided in order to electrically and mechanically connect the solid electrolyte layer and the copper layer. The carbon layer can be formed in a prescribed region by applying a carbon paste on the solid electrolyte layer using sponge transfer, screen printing, a dispenser, inkjet printing, or the like.
[0147] The copper layer can be formed by printing a copper paste on the carbon layer using sponge transfer, screen printing, spraying, a dispenser, inkjet printing, or the like.
[0148] The conductive portion 240 electrically connected to the through-hole conductor 262 of the output terminal OUT is composed mainly of a metal such as Ag, Au, or Cu having low electrical resistance. In order to improve the adhesion between layers, a conductive adhesive material in which the above-described conductive filler and a resin are mixed can be provided as the conductive portion.
[0149] In addition, the conductive portion electrically connected to the through-hole conductor of the ground terminal GND can have the same structure as that of the conductive portion 240.
[0150] The insulating portion 225 is composed of an insulating material such as an epoxy resin, or a phenol resin, or a polyimide resin, or a mixture of an epoxy resin, or a phenol resin, or a polyimide resin and an inorganic filler such as silicon oxide or aluminum oxide.
[0151] In addition, as shown in FIG. 2, the cathode of the capacitor portion 230, that is, the cathode layer 236 is electrically connected to the conductive portion 240 and the through-hole conductor 262 via a conductive conductor 242. Figure 1
[0152] In addition, as the capacitor portion 230, a ceramic capacitor using barium titanate, or a thin film capacitor using silicon nitride (SiN), silicon dioxide (SiO2), hydrogen fluoride (HF), or the like can be used. However, from the viewpoint of being able to form a capacitor portion 230 having a larger area and being thinner, and the mechanical characteristics such as the rigidity and flexibility of the package substrate 200, the capacitor portion 230 is preferably a capacitor using a metal such as aluminum as a base material, and more preferably an electrolytic capacitor using a metal such as aluminum as a base material.
[0153] The resin layers 226, 227, and 228 are used as a bonding material for bonding the layers to each other, and as an insulating layer for insulating the exposed surfaces of the capacitor layer 210 and the inductor layer 250. The capacitor layer 210 and the inductor layer 250 are bonded by the resin layer 227. The resin layer 226 is formed on the surface of the capacitor layer 210, and the resin layer 228 is formed on the bottom surface of the inductor layer 250. The resin layers 226, 227, and 228 are formed of an insulating material such as an epoxy resin, or a polyimide resin, or a phenol resin, or a mixture of an epoxy resin, or a polyimide resin, or a phenol resin, and an inorganic filler such as silicon oxide or aluminum oxide. In order to ensure adhesion to the via conductors, a material mainly composed of an epoxy resin is preferably used as the resin layer.
[0154] An upper surface terminal layer 205 including pads for mounting a device such as a voltage regulator 100 and wiring for connecting the pads is formed on the surface of the resin layer 226. The device mounted on the package substrate 200 is electrically connected to the pads or terminals of the upper surface terminal layer 205 via the solder bumps 120.
[0155] The upper surface terminal layer 205 is formed of a low-resistance metal material such as copper (Cu), gold (Au), or silver (Ag). In addition, the upper surface terminal layer 205 is not limited to being formed only on the surface of the resin layer 226, but can be formed throughout the layers inside the resin layer 226, for example. In addition, in order to facilitate mounting of the device, surface treatment such as nickel / gold (Ni / Au) plating, nickel / lead / gold (Ni / Pb / Au) plating, or pre-solder treatment is preferably performed on the surface of the pads or terminals formed on the mounting surface of the upper surface terminal layer 205. In addition, in order to prevent solder flow at the time of surface mounting of the device, a solder resist layer can be formed on the outermost layer of the upper surface terminal layer 205.
[0156] The package substrate 200 has a via conductor 261 and a via conductor 262 that pass through the first magnetic layer 10 and the second magnetic layer 20 (the upper surface side second magnetic layer 20a and the lower surface side second magnetic layer 20b) in the thickness direction. The via conductor 261 is connected to one end (IN) of the inductor wiring, and the via conductor 262 is connected to the other end (OUT) of the inductor wiring.
[0157] In addition, the package substrate 200 has a via conductor 263 (see FIG. 2) that passes through the first magnetic layer 10 and the second magnetic layer 20 (the upper surface side second magnetic layer 20a and the lower surface side second magnetic layer 20b) in the thickness direction and is used as a ground line (GND). Figure 5
[0158] By using the through-hole conductor, the impedance of the wiring can be reduced, and the layout of the circuit surface can be minimized, so the size of the semiconductor composite device can be reduced.
[0159] The thickness of the entire package substrate is preferably 2.0 mm or less, and more preferably 1.6 mm or less, in consideration of thinness of the system, heat dissipation of the logic operation circuit, and the like.
[0160] The thickness of the inductor layer is preferably 0.5 mm or less, and more preferably 0.3 mm or less, in consideration of thinness of the package substrate. When a plurality of inductor layers are provided, the thickness of the inductor layer is determined as the total of the thicknesses of the plurality of inductor layers.
[0161] In addition, the thickness of the capacitor layer is preferably 1.2 mm or less, and more preferably 0.8 mm or less, in consideration of thinness of the package substrate. When a plurality of capacitor layers are provided, the thickness of the capacitor layer is determined as the total of the thicknesses of the plurality of capacitor layers.
[0162] Further, in the package substrate 200 described above, one inductor layer 250 and one capacitor layer 210 are provided, and a plurality of inductor layers 250 and capacitor layers 210 can also be provided in order to obtain desired inductance values and capacitance values.
[0163] In addition, the stacking order of the inductor layer 250 and the capacitor layer 210 from the mounting surface can also be reversed. That is, the inductor layer 250 can also be located on the side on which the voltage regulator 100 and the load 300 are mounted.
[0164] Further, the package substrate can also be a multilayer structure of inductor layer 250 / capacitor layer 210 / inductor layer 250, or a multilayer structure of capacitor layer 210 / inductor layer 250 / capacitor layer 210, depending on the purpose.
[0165] In Figure 2 In the semiconductor composite device 1 shown in FIG. 1, the upper surface side second magnetic layer 20a of the second magnetic layer 20 is located between the inductor wiring 13 and the voltage regulator 100 and the load 300.
[0166] As described above, since the radiation noise from the inductor can be suppressed by the second magnetic layer, the surface wave noise propagation caused by the magnetic coupling generated between the inductor and the active elements constituting the voltage regulator and the elements such as ICs as the load can be suppressed, and the quality of the package substrate can be improved.
[0167] In addition, the influence (decrease in inductance) of the active elements constituting the voltage regulator and the elements such as ICs as the load on the inductance can be reduced.
[0168] [Method for manufacturing package substrate]
[0169] When manufacturing the package substrate 200 shown in FIG. 1, the capacitor layer 210 and the inductor layer 250 are separately and independently produced. Then, the capacitor layer 210 and the inductor layer 250 are joined and integrated using the resin layers 226, 227, and 228. Next, a via conductor is formed in the integrated capacitor layer 210 and inductor layer 250. Then, an electrode pattern and a wiring pattern that become the upper surface terminal layer 205 are formed on the mounting surface, thereby completing the package substrate 200. Figure 1 When manufacturing the package substrate 200 shown in FIG. 1, the capacitor layer 210 and the inductor layer 250 are separately and independently produced. Then, the capacitor layer 210 and the inductor layer 250 are joined and integrated using the resin layers 226, 227, and 228. Next, a via conductor is formed in the integrated capacitor layer 210 and inductor layer 250. Then, an electrode pattern and a wiring pattern that become the upper surface terminal layer 205 are formed on the mounting surface, thereby completing the package substrate 200.
[0170] Furthermore, as needed, an electrode pattern and a wiring pattern that become the bottom surface terminal layer 270 can also be formed on the surface opposite the mounting surface.
[0171] By mounting a device such as the voltage regulator 100 on the completed package substrate 200, a semiconductor composite device 1 can be formed.
[0172] The inductor layer that constitutes the package substrate can be produced by the following procedures.
[0173] First, an inductor wiring of a prescribed pattern is formed by performing patterning using a photoresist or the like on both surfaces of a Cu foil, and etching the photoresist opening portions.
[0174] Next, a magnetic sheet that is a composite material of a first magnetic particle and a resin is embedded between the patterns of the inductor wiring and formed on the inductor wiring by vacuum lamination, vacuum pressing. Also, planarization and heat curing treatment of the resin are performed by a hot press. Thus, a first magnetic layer including the inductor wiring is formed.
[0175] The magnetic sheet can also be formed on one surface with respect to the inductor wiring at one time.
[0176] Next, a magnetic sheet that is a composite material of a second magnetic particle and a resin is formed on the upper surface and the lower surface of the first magnetic layer by vacuum lamination, vacuum pressing. Thus, a second magnetic layer is formed.
[0177] Furthermore, the second magnetic layer can also be formed on only one surface of the first magnetic layer.
[0178] Next, a resin layer (for example, ABF (Ajinomoto Build-up Film) or the like) is formed on the surface of the second magnetic layer.
[0179] Then, as described above, the capacitor layer and the inductor layer are joined and integrated via the resin layer.
[0180] Next, a via is formed by drilling, laser, or the like in a portion corresponding to the extraction electrode of the inductor wiring.
[0181] Further, a conductor is formed by plating the through-hole, and is connected to the inductor wiring as a through-hole conductor. The conductor formed in the through-hole can be either conformal or filled, but when a large current flows, it is preferable to be filled.
[0182] Further, the electrode pattern and the wiring pattern are formed on the mounting surface, and the package substrate is completed.
[0183] [Other Embodiments of the Package Substrate and the Semiconductor Composite Device]
[0184] Hereinafter, several examples of other embodiments of the package substrate and the semiconductor composite device will be described. Hereinafter, matters different from the first embodiment of the package substrate and the semiconductor composite device described above and additional matters will be described.
[0185] Figure 8 is a cross-sectional view schematically showing one example of a manner in which the semiconductor composite device is mounted on a mother substrate.
[0186] In Figure 8 The package substrate 200A included in the semiconductor composite device 1A shown in FIG. 10 is provided with a through-hole conductor 266 that is connected to a terminal of a signal ground line of the load 300 when the load 300 is mounted on the package substrate 200A. The through-hole conductor 266 penetrates to the bottom surface terminal layer 270 in a state in which it is not electrically connected to the capacitor portion 230 included in the capacitor layer 210 and the inductor wiring 13 included in the inductor layer 250. Further, it is electrically connected to the terminal 410 of the ground line connected to the mother substrate 400 via the solder bump 380.
[0187] Further, in Figure 8 the through-hole conductor of the ground line of the load 300 is described, but the same structure can be applied to the ground line of another electronic device.
[0188] Figure 9 is a cross-sectional view schematically showing another example of a manner in which the semiconductor composite device is mounted on a mother substrate.
[0189] In Figure 9 The package substrate 200B included in the semiconductor composite device 1B shown in FIG. 12 is provided with a through-hole conductor 267 that is connected to the load 300 when the load 300 is mounted on the package substrate 200B.
[0190] The through-hole conductor 267 penetrates to the bottom surface terminal layer 270 in a state in which it is not electrically connected to the capacitor portion 230 included in the capacitor layer 210 and the inductor wiring 13 included in the inductor layer 250. Further, it is electrically connected to the terminal 410 of the heat sink 420 connected to the mother substrate 400 via the solder bump 380.
[0191] Heat sink 420 is a component with high thermal conductivity, such as a copper block. It allows heat generated by the load 300 to be transferred to heat sink 420 through through-hole conductor 267.
[0192] That is, the through-hole conductor 267 is used as a heat dissipation path, and by forming such a structure, the allowable power can be increased.
[0193] exist Figure 9 There are three through-hole conductors 267, but the number of them is not limited.
[0194] Figure 10 This is a cross-sectional view schematically representing another example of a packaging substrate.
[0195] exist Figure 10 In the packaging substrate 200C shown, the second magnetic layer 20 is disposed on only one side of the first magnetic layer 10. Specifically, the second magnetic layer 20a is disposed on the upper surface side above the first magnetic layer 10, and no second magnetic layer is disposed on the lower side of the first magnetic layer 10.
[0196] The accompanying drawings illustrate the upper and lower sides of the first magnetic layer, but the preferred position of the second magnetic layer when it is disposed on only one side of the first magnetic layer is determined based on its relationship with elements other than the inductor layer. When the second magnetic layer is disposed on only one side of the first magnetic layer, it is preferable to place the second magnetic layer between the first magnetic layer and the capacitor layer. Furthermore, it is preferable to place the second magnetic layer between the first magnetic layer and the mounting surface of the packaging substrate.
[0197] As mentioned above, the second magnetic layer can suppress radiated noise from the inductor because the effect of suppressing radiated noise is particularly effective when the second magnetic layer is present between the inductor and the capacitor layer or other components.
[0198] Figure 11 and Figure 12 This is a cross-sectional view schematically representing another example of a packaging substrate.
[0199] exist Figure 11 The package substrate 200D shown and Figure 12 The packaging substrate 200E shown does not have a capacitor layer.
[0200] Even if the packaging substrate does not have a capacitor layer, inductance can be obtained by having an inductor layer on the packaging substrate.
[0201] exist Figure 11 In the packaged substrate 200D shown, the second magnetic layer 20 is disposed on one side and the other side of the first magnetic layer 10.
[0202] existFigure 12 In the packaging substrate 200E shown, the second magnetic layer 20 is disposed on only one side of the first magnetic layer 10.
[0203] By adding a second magnetic layer, radiated noise from the inductor can be suppressed.
[0204] When like Figure 12 When the second magnetic layer is disposed on only one side of the first magnetic layer, as shown in the packaging substrate 200E, it is preferable to dispose of the second magnetic layer between the first magnetic layer and the mounting surface of the packaging substrate.
[0205] [Relationship between the specifications and characteristics of the packaging substrate]
[0206] The relationship between the specifications and characteristics of the inductor layer constituting the packaging substrate was confirmed.
[0207] Figure 13 This is a graph showing the relationship between the size of the second magnetic particle and the decrease in inductance.
[0208] exist Figure 13 The diagram shows the second magnetic particle, which will Figure 7 The diagram illustrates the relationship between the size ratio (a / b) when the X-direction dimension (diameter) is set as the major axis a and the Z-direction dimension (diameter) is set as the minor axis b, and the inductance reduction caused by the external meandering wiring of the inductor layer (the ratio [%) of the inductance value without meandering wiring). It can be said that the larger the size ratio, the higher the flatness of the particles.
[0209] If larger particles, i.e., particles with a higher flatness, are used, the permeability along the main surface of the second magnetic layer is higher, effectively confining the magnetic flux within the inductor layer. This also reduces the impact of circuitry within the inductor layer, resulting in a smaller reduction in inductance.
[0210] In addition, it can suppress radiated noise from inductors.
[0211] For inductors, the standard for inductance is mostly specified as ±20% of the standard value. Therefore, if it is desirable to reduce the inductance by 20% or less, it is preferable that the size ratio of the second magnetic particle is 10 or more. When the size ratio of the second magnetic particle is 10 or more, the flatness ratio of the second magnetic particle is 0.9 or more.
[0212] Next, the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and its properties will be explained.
[0213] Figure 14 It is a cross-sectional view schematically showing the dimensions of the inductor layer used in the test.
[0214] exist Figure 14The thickness of the inductor layer 250 is 500 μm, the thickness of the inductor wiring 13 is 100 μm, the thickness of the upper surface side second magnetic layer 20a and the lower surface side second magnetic layer 20b is H μm (indicated by the bidirectional arrow H), and the thickness between the inductor wiring 13 in the first magnetic layer 10 and the second magnetic layer 20 is K μm (indicated by the bidirectional arrow K).
[0215] The permeability of the second magnetic layer used in the experiment has anisotropy, and the permeability in the direction along the main surface of the second magnetic layer is greater than the permeability in the thickness direction of the second magnetic layer.
[0216] In addition, the second magnetic particles included in the second magnetic layer are particles having a shape in which the size in the direction along the main surface of the second magnetic layer (indicated by the bidirectional arrow L) is greater than the size in the thickness direction of the second magnetic layer (indicated by the bidirectional arrow T). Figure 6 When the size (diameter) in the X direction indicated by the bidirectional arrow X is set to the major axis a and the size (diameter) in the Z direction is set to the minor axis b, the particles are a:b = 50:1. The flatness is 0.98. Figure 6 Figure 7 The permeability in the direction along the main surface of the second magnetic layer: the permeability in the direction along the main surface of the first magnetic layer = 2:1.
[0217] The thickness ratio and the characteristics of the second magnetic layer to the first magnetic layer in the inductor layer 250 indicated by the bidirectional arrow X are shown in the graph of FIG. 6.
[0218] The thickness ratio and the characteristics of the second magnetic layer to the first magnetic layer in the inductor layer 250 indicated by the bidirectional arrow X are shown in the graph of FIG. 6. Figure 14 Figure 15 Figure 16 The graph indicates the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and the inductance.
[0219] Figure 15 The graph indicates the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and the inductance.
[0220] Figure 16 The graph indicates the relationship between the thickness ratio of the second magnetic layer to the first magnetic layer and the inductance.
[0221] In the horizontal axis of FIG. 6 and FIG. 7, the ratio of the sizes H and K of the inductor layer 250 indicated by the bidirectional arrow X is expressed as the thickness ratio of the following equation. Figure 15 Figure 16 Figure 14 The thickness ratio = [H / (H+K)] x 100 (%)
[0222] The thickness ratio = [H / (H+K)] x 100 (%)
[0223] Figure 15 The graph of FIG. 6 and FIG. 7 is made by fixing H+K = 200 μm and changing the ratio of H and K to calculate the thickness ratio. Figure 16
[0224] Figure 15 The vertical axis of the graph indicates the inductance value (L value [nH]). From Figure 15 It is known that, from the inductance value viewpoint, the thickness ratio is most preferably in the range of 40% or more and 50% or less.
[0225] Figure 16 The vertical axis of the graph indicates the DC superimposition rated current value (Isat [A]). From Figure 16 It is known that, from the superimposition characteristic viewpoint, the second magnetic layer is preferably thin. Therefore, in order to improve the superimposition characteristic, the second magnetic layer is preferably not thick.
[0226] In actual applications, in order to sufficiently exert the effect produced by providing the second magnetic layer, the thickness ratio is preferably 30% or more.
[0227] From such a viewpoint, the thickness ratio is preferably 30% or more and 50% or less.
Claims
1. A package substrate, characterized by, An inductor layer is provided, The inductor layer includes: a first magnetic layer including first magnetic particles and a resin; and a second magnetic layer provided on at least one surface of the first magnetic layer and including a resin and second magnetic particles having an average flatness greater than that of the first magnetic particles, The second magnetic particles have a shape in which a dimension in a direction along a main surface of the second magnetic layer is longer than a dimension in a thickness direction of the second magnetic layer, An inductor wiring that functions as an inductor is provided inside the first magnetic layer, A thickness ratio [H / (H+K)]x100% is 30% or more and 50% or less, where H is a thickness of the second magnetic layer and K is a thickness between the inductor wiring and the second magnetic layer in the first magnetic layer.
2. The package substrate according to claim 1, wherein when a planar view along a main surface of the first magnetic layer is observed, the inductor wiring is one wiring in which a shape of a connecting portion connecting a plurality of straight lines in which directions of current flow are different is a straight line or a curved line, a direction of current flow in one straight line is different from a direction of current flow in a straight line adjacent to the one straight line.
3. The package substrate according to claim 1 or 2, wherein an aspect ratio of the inductor wiring is 0.2 or more, where the aspect ratio is represented by a thickness of the wiring / widtn of the wiring.
4. The package substrate according to any one of claims 1 to 3, wherein a permeability in a direction along a main surface of the second magnetic layer is higher than a permeability in a direction along a main surface of the first magnetic layer.
5. The package substrate according to claim 4, wherein the permeability in the direction along the main surface of the second magnetic layer is 1.5 times or more the permeability in the direction along the main surface of the first magnetic layer.
6. The package substrate according to any one of claims 1 to 5, wherein a permeability in a direction along a main surface of the second magnetic layer is higher than a permeability in a thickness direction of the second magnetic layer.
7. The package substrate according to claim 6, wherein the permeability in the direction along the main surface of the second magnetic layer is 5 times or more the permeability in the thickness direction of the second magnetic layer.
8. The package substrate according to any one of claims 1 to 7, wherein a via conductor is provided, the via conductor penetrating the first magnetic layer and the second magnetic layer in a thickness direction.
9. The package substrate according to any one of claims 1 to 8, wherein a capacitor layer is further provided, the capacitor layer internally forming a capacitor, the second magnetic layer of the inductor layer is positioned between the first magnetic layer of the inductor layer and the capacitor layer.
Citation Information
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