Capacitive fingerprint identification system, electronic device and fingerprint identification method

Abstract

This invention discloses a capacitive fingerprint recognition system, electronic device, and fingerprint recognition method. The capacitive fingerprint recognition system includes: an integrating circuit comprising: an operational amplifier having a positive input terminal, a negative input terminal, a ground terminal, and an output terminal; a feedback branch connected between the negative input terminal and the output terminal; a fingerprint information acquisition circuit connected to the negative input terminal for inputting a reference voltage and a first voltage signal, and acquiring fingerprint information; and a floating ground signal generation circuit connected to the ground terminal for providing a floating ground signal adapted to the operating mode based on a second voltage signal and a third voltage signal, selecting the output floating ground signal as either a first ground voltage with constant amplitude or a second ground voltage with periodically changing amplitude. This invention, by providing a floating ground signal adapted to the operating mode to the ground terminal, allows the capacitive fingerprint recognition system to operate in different modes based on requirements.

Description

Technical Field

[0001] This invention relates to the field of fingerprint recognition technology, and more specifically, to a capacitive fingerprint recognition system, electronic device, and fingerprint recognition method. Background Technology

[0002] With the continuous development of science and technology, more and more electronic devices are being widely used in people's daily lives and work, bringing great convenience to people's daily lives and work, and becoming an indispensable tool for people today.

[0003] As electronic devices become increasingly sophisticated and store more and more information, it's essential to integrate identity verification systems to ensure user information security. Fingerprint recognition, due to its high security and ease of use, has become the mainstream identity verification system used in today's electronic devices. However, existing fingerprint recognition systems only support a single operating mode. Summary of the Invention

[0004] In view of this, this application provides a capacitive fingerprint recognition system, electronic device, and fingerprint recognition method, as follows:

[0005] A capacitive fingerprint recognition system includes:

[0006] An integrating circuit includes: an operational amplifier having a positive input terminal, a negative input terminal, a ground terminal, and an output terminal; a feedback branch connected between the negative input terminal and the output terminal; a reference voltage is input to the positive input terminal of the operational amplifier; and the output voltage of the integrating circuit is used for fingerprint recognition.

[0007] The fingerprint information acquisition circuit is connected to the negative phase input terminal, and inputs a reference voltage or a first voltage signal through a switching switch to acquire fingerprint information;

[0008] A floating ground signal generation circuit is connected to the ground terminal and is used to provide a floating ground signal VSS adapted to the working mode to the ground terminal based on a second voltage signal and a third voltage signal, and to select the output of the floating ground signal as a first ground voltage with constant amplitude or a second ground voltage with periodic amplitude variation.

[0009] The capacitive fingerprint recognition system has the following operating modes: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode.

[0010] If the passive fingerprint detection mode is in effect, the floating ground signal generation circuit is used to provide the first grounding voltage to the grounding terminal;

[0011] If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, the floating ground signal generation circuit is used to provide the second ground voltage to the grounding terminal.

[0012] Preferably, in the above-described capacitive fingerprint recognition system, the floating ground signal generation circuit includes:

[0013] The first capacitor has one plate connected to a first node, which is used to output the second voltage signal; the other plate is connected to a second node, which is used to output the floating ground signal.

[0014] The first switch connects the port where the third voltage signal is input to the first node;

[0015] The second switch is used to ground the first node;

[0016] The third switch is used to ground the second node.

[0017] Preferably, in the above-described capacitive fingerprint recognition system, the first switch is a first transistor, the second switch is a second transistor, and the third switch is a third transistor;

[0018] The gate of the first transistor is connected to the first switch control signal, the source is connected to the third voltage signal, and the drain is connected to the first node;

[0019] The gate of the second transistor is connected to the second switch control signal, the drain is connected to the first node, and the source is grounded;

[0020] The gate of the third transistor is connected to the third switch control signal, the source is connected to the second node, and the drain is grounded.

[0021] Preferably, in the above-described capacitive fingerprint recognition system, the first transistor is a PMOS, and the second and third transistors are both NMOS.

[0022] Preferably, the above-mentioned capacitive fingerprint recognition system further includes:

[0023] The power management unit has a first low-dropout regulator, which is connected to the fingerprint information acquisition circuit and the floating ground signal generation circuit respectively to provide the reference voltage and the first voltage signal.

[0024] Preferably, the above-described capacitive fingerprint recognition system further includes: an input / output port and a second low-dropout regulator that provides an operating voltage to the input / output port;

[0025] The second low-dropout regulator is used to provide operating voltage to the input / output ports based on the third voltage signal.

[0026] Preferably, in the above-mentioned capacitive fingerprint recognition system, the fingerprint information acquisition circuit includes:

[0027] The fourth switch connects the port where the reference voltage is input to the third node.

[0028] The fifth switch connects the port that receives the first voltage signal to the third node.

[0029] The sixth switch connects the third node and the negative phase input terminal.

[0030] A detection electrode, connected to the third node, is used to form a detection capacitance based on touch operation.

[0031] Preferably, in the above-described capacitive fingerprint recognition system, the fingerprint information acquisition circuit further includes:

[0032] The seventh switch connects the port that receives the first voltage signal and the fourth node.

[0033] The eighth switch connects the port where the reference voltage is input to the fourth node.

[0034] The ninth switch connects the port that receives the first voltage signal and the fifth node.

[0035] The tenth switch connects the port that inputs the floating ground signal to the fifth node.

[0036] The fourth node is connected to the third node via a second capacitor, and the fifth node is connected to the third node via a third capacitor.

[0037] Preferably, in the above-described capacitive fingerprint recognition system, the feedback branch includes:

[0038] A feedback capacitor connected between the negative phase input terminal and the output terminal;

[0039] A first reset switch is connected between the negative phase input terminal and the output terminal.

[0040] Preferably, in the above-described capacitive fingerprint recognition system, the feedback capacitor has a first plate and a second plate;

[0041] The first electrode plate is connected to the negative phase input terminal via a second reset switch, and is also connected to the port for inputting the fourth voltage signal via a third reset switch;

[0042] The second electrode plate is connected to the output terminal via a fourth reset switch, and is connected to the port that receives the first voltage signal via a fifth reset switch.

[0043] Preferably, in the above-mentioned capacitive fingerprint recognition system, the working modes of the capacitive fingerprint recognition system include: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode.

[0044] If the passive fingerprint detection mode is in effect, the floating ground signal generation circuit is used to provide the first grounding voltage to the grounding terminal;

[0045] If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, the floating ground signal generation circuit is used to provide the second ground voltage to the grounding terminal.

[0046] Preferably, in the above-described capacitive fingerprint recognition system, the first grounding voltage is 0 potential;

[0047] The second grounding voltage is a square wave signal that periodically changes between a zero potential and a preset negative potential.

[0048] The present invention also provides an electronic device, which is a capacitive fingerprint recognition system as described in any of the preceding claims.

[0049] The present invention also provides a fingerprint recognition method for a capacitive fingerprint recognition system, comprising:

[0050] Based on control commands, the operating mode of the capacitive fingerprint recognition system is selected; the operating modes of the capacitive fingerprint recognition system include: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode.

[0051] If in the passive fingerprint detection mode, a first ground voltage with a constant amplitude is provided;

[0052] If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, a second ground voltage with periodically varying amplitude is provided.

[0053] As described above, the capacitive fingerprint recognition system, electronic device, and fingerprint recognition method provided by the present invention include: an integrating circuit, which includes: an operational amplifier having a positive input terminal, a negative input terminal, a ground terminal, and an output terminal; a feedback branch connected between the negative input terminal and the output terminal; a fingerprint information acquisition circuit connected to the negative input terminal for inputting a reference voltage and a first voltage signal, and acquiring fingerprint information; and a floating ground signal generation circuit connected to the ground terminal for providing a floating ground signal adapted to the operating mode based on a second voltage signal and a third voltage signal, and selecting the output floating ground signal as a first ground voltage with constant amplitude or a second ground voltage with periodically changing amplitude. In the present invention, the floating ground signal generation circuit can provide a floating ground signal adapted to the operating mode for the ground terminal, and select the output floating ground signal as a first ground voltage with constant amplitude or a second ground voltage with periodically changing amplitude, allowing the capacitive fingerprint recognition system to operate in different modes based on requirements. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0055] The structures, proportions, sizes, etc., shown in the accompanying drawings of this specification are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and objectives that the present invention can produce, should still fall within the scope of the technical content disclosed in the present invention.

[0056] Figure 1 This is a two-chip floating ground signal generation circuit;

[0057] Figure 2 This is a schematic diagram of a single-chip floating ground signal generation circuit.

[0058] Figure 3 This is a circuit diagram of a negative pressure charge pump;

[0059] Figure 4 A circuit diagram of a capacitive fingerprint recognition system provided in an embodiment of the present invention;

[0060] Figure 5This is a schematic diagram of a floating ground signal generation circuit provided in an embodiment of the present invention;

[0061] Figure 6 This is a schematic diagram of another floating ground signal generation circuit provided in an embodiment of the present invention;

[0062] Figure 7 for Figure 6 The timing diagram of the switch control signals in the floating ground signal generation circuit is shown.

[0063] Figure 8 A circuit diagram of a power supply system provided in an embodiment of the present invention;

[0064] Figure 9 This is a schematic diagram of the metal layer layout of a fingerprint detection electrode provided in an embodiment of the present invention;

[0065] Figure 10 A circuit diagram of another capacitive fingerprint recognition system provided in an embodiment of the present invention;

[0066] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0067] The embodiments of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0068] Capacitive fingerprint recognition solutions determine fingerprint information by detecting the capacitance formed between the peaks and troughs of the fingerprint and the chip's sensing electrodes. Capacitive fingerprint recognition solutions mainly include: passive recognition solutions, active recognition solutions, and a combination of active and passive recognition solutions.

[0069] There are three types of fingerprint detection circuits: active detection circuits, passive detection circuits, and hybrid detection circuits. The hybrid detection circuit is composed of a combination of active and passive circuits.

[0070] The active detection circuit applies an external driving signal to the ground signal of the detection circuit, that is, it applies an additional driving signal to the finger. The troughs of the fingerprint collect different charges on the capacitor formed by the sensing electrodes inside the chip, integrate them to the output of the integrator, and determine the size of the capacitor by the voltage magnitude, thereby reproducing the peaks and troughs of the fingerprint.

[0071] The passive fingerprint reproducibility works differently. It uses the impact of the peaks and troughs of the fingerprint on the chip surface when a finger is pressed on the chip to reproduce the fingerprint, without the need for an additional driving source.

[0072] Current capacitive fingerprint detection circuits have the following drawbacks: When using a simple passive fingerprint detection circuit, it is easily affected by parasitic capacitance, resulting in large dispersion and data saturation; when using a complex active fingerprint detection circuit, the data consistency is good, but it is generally composed of two chips, which is costly; existing fingerprint detection circuits implemented with a single chip have many off-chip components, require certain process technology, and are still very expensive.

[0073] like Figure 1 As shown, Figure 1 Existing active capacitive fingerprint circuits use two chips, resulting in high cost. This new active capacitive fingerprint circuit includes a driver control chip 11 and a fingerprint sensing chip 12, implementing a floating ground design and active fingerprint acquisition. The driver control chip 11 provides the fingerprint sensing chip 12 with the VTX level and the required power supply VDD. The fingerprint sensing chip 12 provides the driver control chip with a TX signal and outputs a voltage signal VSS based on the input signal. The driver control chip 11 is connected to the master device 13 via SPI (Serial Peripheral Interface). The driver control chip 11 receives the voltage signal VDD_SUPPLY at its power supply terminal and grounds its ground terminal. The fingerprint sensing chip 12 outputs a square wave voltage signal VSS, with a high level representing VTX and a low level representing 0.

[0074] Although some circuit designs can achieve active identification schemes for a single chip, the circuit designs are relatively complex, require more off-chip components, have a large circuit area, and have high process requirements, so the improvement in cost is limited and the manufacturing cost is still high.

[0075] like Figure 2 As shown, Figure 2 This is a schematic diagram of a single-chip floating ground signal generation circuit in the prior art. The floating ground signal generation circuit includes switches K3, K4, and K5. One end of switch K3 receives the voltage signal VDD_SUPPLY, and the other end is connected to node Q1. One end of switch K4 is grounded (GND), and the other end is connected to node Q2. A capacitor C1 is connected between nodes Q1 and Q2. One end of switch K5 is connected to a negative voltage charge pump, and the other end is connected to node Q2. Node Q1 provides the voltage signal VDD, and node Q2 provides the voltage signal VSS. A fingerprint detection circuit module is connected to nodes Q1 and Q2 respectively.

[0076] exist Figure 2In the circuit shown, node Q1 is connected to the voltage signal VDD_SUPPLY via switch K3, and node Q2 is switched between 0 potential and the voltage signal -VTX output by the negative charge pump via switches K4 and K5. A square wave voltage signal VSS can be obtained, with a high level of 0 and a low level of -VTX.

[0077] When switches K3 and K4 are closed and switch K5 is open, node Q1 receives the voltage signal VDD_SUPPLY through switch K3. The fingerprint detection circuit module in the fingerprint detection chip is powered by the voltage signal VDD_SUPPLY. At the same time, the voltage signal VDD_SUPPLY powers capacitor C1 to charge.

[0078] When switches K3 and K4 are open and switch K5 is closed, node Q2 receives the voltage signal -VTX through switch K5. The current in the fingerprint detection circuit module of the fingerprint detection chip is supplied by capacitor C1. Therefore:

[0079] VSS = -VTX

[0080] By alternately opening and closing switches K3, K4, and K5, the voltage signal VSS is periodically varied between 0 and -VTX, achieving the floating ground function of the voltage signal VSS. However, a negative charge pump is still needed to provide the required voltage signal -VTX for the voltage signal VSS. The commonly used negative charge pump circuit structure in existing technology is as follows: Figure 3 As shown.

[0081] Figure 3 This is a circuit diagram of a negative pressure charge pump, which includes: switches K6, K7, K8, and K9, capacitor C2, and capacitor C3. One end of switch K6 is grounded (GND), and the other end is connected to node Q3; one end of switch K7 is connected to node Q3, and the other end is connected to the voltage signal VDD_SUPPLY; one end of switch K8 is connected to node Q4, and the other end is connected to node Q5; one end of switch K9 is connected to node Q4, and the other end is grounded (GND); one plate of capacitor C2 is connected to node Q3, and the other plate is connected to node Q4; one plate of capacitor C3 is connected to node Q5, and the other plate is grounded (GND). Node Q5 outputs the voltage signal -VTX.

[0082] visible, Figure 3 The negative charge pump shown requires four switches and two capacitors, necessitating a larger circuit area and higher load logic circuitry to control the current. Furthermore, since the negative charge pump needs to charge capacitors C2 and C3 during startup, the startup time is related to the sizes of capacitors C2 and C3 and the magnitude of the startup current, which affects the system's response speed.

[0083] To address the aforementioned problems, this invention provides a capacitive fingerprint recognition system that integrates passive, active, and combined active and passive recognition schemes onto a single chip. It offers three operating modes: passive fingerprint detection, active fingerprint detection, and a combination of both. This invention features a simple manufacturing process, fewer off-chip components, low cost, and flexible selection of operating modes based on requirements.

[0084] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0085] like Figure 4 As shown, Figure 4 A circuit diagram of a capacitive fingerprint recognition system provided in an embodiment of the present invention includes:

[0086] Integrating circuit 03, comprising: an operational amplifier OP having a positive input terminal, a negative input terminal, a ground terminal and an output terminal VOUT; and a feedback branch 031 connected between the negative input terminal and the output terminal;

[0087] The fingerprint information acquisition circuit 04 is connected to the negative input terminal and is used to input the reference voltage VREF and the first voltage signal VDDA, and to acquire fingerprint information; the positive input terminal is used to input the reference voltage VREF.

[0088] A floating ground signal generation circuit 05, connected to the grounding terminal, is used to provide a floating ground signal VSS adapted to the operating mode for the grounding terminal based on a second voltage signal VDD and a third voltage signal VDD_SUPPLY. The circuit selects whether the output floating ground signal VSS is a first ground voltage with a constant amplitude or a second ground voltage with a periodically changing amplitude. The first ground voltage can be a ground signal GND, which is a 0 potential with a fixed amplitude; the second ground voltage can be a square wave signal.

[0089] The capacitive fingerprint recognition system described in this embodiment of the invention features a floating ground signal generation circuit 05 that can select between a first ground voltage and a second ground voltage based on the operating mode. This allows the capacitive fingerprint recognition system to operate in passive fingerprint detection mode, active fingerprint detection mode, or a combination of active and passive fingerprint detection modes. The system architecture is simple, the fingerprint detection chip area is small, and there are few off-chip components. The three fingerprint detection modes can be flexibly selected based on requirements.

[0090] The capacitive fingerprint recognition system described in this embodiment of the invention can be implemented using a single chip. A floating ground signal VSS is provided to the ground terminal of the fingerprint detection chip via a floating ground signal generation circuit 05. Based on chip reliability and the load of the floating ground, when the floating ground signal is the second ground voltage, it can periodically change from the ground signal GND (0 potential) to a set negative potential -VTX. This allows -VTX = -VDD_SUPPLY.

[0091] like Figure 5 As shown, Figure 5 This is a schematic diagram of a floating ground signal generation circuit provided in an embodiment of the present invention. The floating ground signal generation circuit 05 includes:

[0092] The first capacitor C01 has one plate connected to the first node N1, which is used to output the second voltage signal VDD; the other plate is connected to the second node N2, which is used to output the floating ground signal VSS.

[0093] The first switch K01 is connected to the port that inputs the third voltage signal VDD_SUPPLY and the first node N1;

[0094] The second switch K02 connects the first node N1 to ground GND via the second switch K02.

[0095] The third switch K03 connects the second node N2 to ground GND.

[0096] The first node N1 and the second node N2 are connected to the fingerprint detection circuit module in the fingerprint detection chip. The fingerprint detection circuit module includes a power supply system, a signal processing circuit, the aforementioned integration circuit 03, and a fingerprint information acquisition circuit 04.

[0097] When the first switch K01 and the third switch K03 are closed, and the second switch K02 is open, the first node N1 is connected to the port that receives the third voltage signal VDD_SUPPLY, the second node N2 is grounded, and the floating ground signal VSS is equal to the ground signal GND. The third voltage signal VDD_SUPPLY provides current to the fingerprint detection circuit module through the first switch K01, and at the same time, the third voltage signal VDD_SUPPLY charges the first capacitor C01.

[0098] When the second switch K02 is closed and the first switch K01 and the third switch K03 are open, the first node N1 is grounded to GND through the second switch K02, and the second node N2 is disconnected from the grounding port. Based on the principle that the voltage across the first capacitor C01 cannot change abruptly, the following relationship exists:

[0099] V C=VDD_SUPPLY-0=0-VSS

[0100] VSS = -VDD_SUPPLY

[0101] As can be seen, the third voltage signal VDD_SUPPLY is the system power supply, and the floating ground signal VSS becomes the negative value of the third voltage signal VDD_SUPPLY, which is the negative voltage of the power supply.

[0102] The voltage change ΔV across the first capacitor C01 C for:

[0103]

[0104] Where I is the discharge current of the first capacitor C01, and t is the negative voltage operating time of VSS. Based on I, t, and the value of the first capacitor C01, the voltage change ΔV across the first capacitor C01 can be calculated. C .

[0105] By alternately opening and closing the first switch K01, the second switch K02, and the third switch K03, the periodic change of the floating ground signal VSS between 0 potential and -VDD_SUPPLY is achieved. By controlling the current and the periodic time, and selecting the set first capacitor C1, it can be ensured that the voltage reduction during the period when the current is provided by the first capacitor C01 does not affect the operation of the detection circuit module in the chip.

[0106] Figure 5 The floating ground signal generation circuit 05 shown uses three switches and one capacitor to select either a fixed-amplitude ground voltage (0 potential) or a periodically varying ground voltage between 0 and -VDD_SUPPLY. The circuit structure is simple. A single chip enables control schemes for three fingerprint recognition operating modes, allowing flexible selection of the floating ground signal VSS and operating mode according to requirements.

[0107] The active fingerprint recognition solution of this invention uses a single chip to generate a floating ground signal VSS within the chip. A second ground voltage is set to periodically vary between 0 and -VDD_SUPPLY to ensure reliability and reduce floating ground load. The floating ground signal generation circuit 05 has simple control logic and requires no additional circuitry or off-chip components.

[0108] The technical solution of this invention realizes the design of the floating ground signal generation circuit 05 through a single chip. The circuit control method is simple, the area is small, there are few external components, the cost is low, and the fingerprint signal acquisition performance is good, the signal volume is large, the consistency is good, and it can penetrate cover plates of different thicknesses. Moreover, through a simple process design, a level shifting circuit is used to perform the conversion between different voltage domains.

[0109] like Figure 6 As shown, Figure 6 This is a schematic diagram of another floating ground signal generation circuit provided in an embodiment of the present invention, based on Figure 5 As shown, the first switch K01 is the first transistor MP, the second switch K02 is the second transistor MN1, and the third switch K03 is the third transistor MN2. The gate of the first transistor MP is connected to the first switch control signal TX1_P, the source is connected to the third voltage signal VDD_SUPPLY, and the drain is connected to the first node N1. The gate of the second transistor MN1 is connected to the second switch control signal TX1_N, the drain is connected to the first node N1, and the source is grounded to GND. The gate of the third transistor MN2 is connected to the third switch control signal TX2, the source is connected to the second node N2, and the drain is grounded to GND.

[0110] The third voltage signal VDD_SUPPLY provides the external power supply for the fingerprint detection chip, while the second voltage signal VDD is the internal power supply for the fingerprint detection chip generated by the floating ground signal generation circuit 05 based on the third voltage signal VDD_SUPPLY. The second voltage signal VDD switches between VDD_SUPPLY and GND via the first transistor MP and the second transistor MN1. The second node N2 is connected to or disconnected from GND via the third transistor MN2. Based on the voltage range of the second voltage signal VDD and the floating ground signal VSS, the first transistor MP is selected as a PMOS, and the second transistor MN1 and the third transistor MN2 are both NMOS. The substrates of the PMOS and NMOS are connected to their respective source terminals. The floating ground signal generation circuit 05 can be implemented using the first capacitor C01 and three MOS transistors, resulting in a simple circuit structure.

[0111] It should be noted that, Figure 6 In the illustrated configuration, the three transistors are not limited to the first transistor MP being a PMOS, the second transistor MN1 and the third transistor MN2 being NMOS; they can be configured as PMOS or NMOS based on the switching control signal. The substrate potential of the transistors is not limited to zero at the PN junction.

[0112] like Figure 7 As shown, Figure 7 for Figure 6The timing diagram of the switch control signals in the floating ground signal generation circuit is shown. All three switch control signals are periodically changing square wave signals. Within the same cycle, after the third switch control signal TX2 switches from high to low, the first switch control signal TX1_P switches from low to high; after the first switch control signal TX1_P switches from low to high, the second switch control signal TX1_N switches from low to high; before the third switch control signal TX2 switches from low to high, the first switch control signal TX1_P switches from high to low; before the first switch control signal TX1_P switches from high to low, the second switch control signal TX1_N switches from high to low.

[0113] If the first switch control signal TX1_P is low, the third switch control signal TX2 is high, and the second switch control signal TX1_N is low, the output port of the second voltage signal VDD is connected to the port of the input third voltage signal VDD_SUPPLY through the first transistor MP, and the second node N2 of the output floating ground signal VSS is grounded to GND through the third transistor MN2.

[0114] When the first switch control signal TX1_P is high, the third switch control signal TX2 is low, and the second switch control signal TX1_N is high, the output port of the second voltage signal VDD is grounded to GND through the second transistor MN1, and the second node N2 of the output floating ground signal VSS is disconnected from the ground terminal. Since the capacitance across the first capacitor C01 cannot change abruptly, VSS = -VDD_SUPPLY = -VTX. The three switch control signals change periodically, achieving selective output of the floating ground signal VSS through simple circuitry and control logic. Compared to traditional circuit structures, this design is simpler, saves layout area, reduces power consumption, and shortens system response time. Furthermore, the circuit structure is extremely simple.

[0115] like Figure 8 As shown, Figure 8 The circuit diagram of a power supply system provided in this embodiment of the invention, based on the above embodiments, further includes a power management unit (PMU) for the capacitive fingerprint recognition system. The PMU has a first low-dropout regulator (LDO), which is connected to the fingerprint information acquisition circuit 04, the integrator circuit 03, and the floating ground signal generation circuit 05 to provide the reference voltage VREF and the first voltage signal VDDA. The port of the PMU that outputs the first voltage signal VDDA can be connected to a capacitor C3 and a second node N2.

[0116] The floating ground signal generation circuit 05 can output a second voltage signal VDD and a floating ground signal VSS based on the input third voltage signal VDD_SUPPLY. The port of the power management unit (PMU) that outputs the first voltage signal VDDA is also connected to an analog circuit. The analog circuit is powered by the first voltage signal VDDA generated by the first low-dropout regulator (LDO) in the power management unit, and powers the power management unit via the second voltage signal VDD. The first node N1 is also connected to a digital circuit. The digital circuit is directly powered via the second voltage signal VDD.

[0117] In other embodiments, the capacitive fingerprint recognition system further includes: an input / output port IO and a second low-dropout regulator LDO_VDDIO that provides an operating voltage to the input / output port IO; wherein the second low-dropout regulator LDO_VDDIO is used to provide an operating voltage VDDIO to the input / output port IO based on the third voltage signal VDD_SUPPLY. The output voltage VDDIO of the second low-dropout regulator LDO_VDDIO can be grounded to GND through a capacitor C4. The second low-dropout regulator LDO_VDDIO is powered by the third voltage signal VDD_SUPPLY provided by an external power supply. By using a separately configured second low-dropout regulator LDO_VDDIO to power the input / output port IO, the power supply to the input / output port IO is prevented from adversely affecting the fingerprint recognition result.

[0118] like Figure 4 As shown, the fingerprint information acquisition circuit 04 includes: a fourth switch K04, the port for inputting the reference voltage VREF and the third node N3 are connected to K04 through the fourth switch; a fifth switch K05, the port for inputting the first voltage signal VDDA and the third node N3 are connected to the third node N3 through the fifth switch; a sixth switch K06, the third node N3 and the negative phase input terminal are connected to K06 through the sixth switch; and a detection electrode 01, the detection electrode 01 is connected to the third node N3, and is used to form a detection capacitance Cf based on touch operation.

[0119] The technical solution of this invention has a fingerprint detection mode, an active fingerprint detection mode, and an active-passive fingerprint detection mode, supporting passive fingerprint detection, active fingerprint detection, and active-passive fingerprint detection.

[0120] Select the fourth switch K04 to be off, and switch the fifth switch K05 and the sixth switch K06 alternately on and off, with VSS=GND=0, which is the passive fingerprint detection mode.

[0121] Selecting the fifth switch K05 to be off, the fourth switch K04 and the sixth switch K06 to be on and off alternately, VSS toggles periodically between GND and -VDD_SUPPLY, which is the active fingerprint detection mode.

[0122] Selecting the fourth switch K04 to be off, and the fifth switch K05 and the sixth switch K06 to be on and off alternately, VSS cycles between GND and -VDD_SUPPLY, which is an active and passive fingerprint detection mode.

[0123] The technical solution of this invention can support three fingerprint detection modes, which can be flexibly selected according to needs.

[0124] like Figure 4 As shown, the feedback branch 03 includes: a feedback capacitor CFB connected between the negative phase input terminal and the output terminal; and a first reset switch RST1 connected between the negative phase input terminal and the output terminal.

[0125] like Figure 9 As shown, Figure 9 This is a schematic diagram of the metal layer layout of a fingerprint detection electrode according to an embodiment of the present invention. The capacitive fingerprint recognition system of the present invention includes a first metal layer AA and a second metal layer. The second metal layer includes a first portion BB and a second portion CC. The first metal layer AA is closer to the touch surface of the device relative to the second metal layer. A fingerprint detection switch circuit is provided on the side of the second metal layer away from the first metal layer AA. The fingerprint detection switch circuit includes all the switches in the capacitive fingerprint recognition system of the present invention. The second metal layer shields the fingerprint detection switch circuit from crosstalk to the first metal layer AA to ensure the accuracy of fingerprint recognition.

[0126] Specifically, the detection electrode 01 of the fingerprint detection sensing unit is located on the patterned first metal layer AA. During finger touch recognition, the first metal layer AA and the finger form a detection capacitor Cf. Below the first metal layer AA is a patterned second metal layer. The first metal layer AA and the first part BB have a second capacitor C02. Below the first part BB is a fingerprint detection control switch circuit to prevent the fingerprint detection switch circuit from interfering with the detection capacitor Cf and affecting the fingerprint recognition result. The second part CC and the first metal layer AA have a third capacitor C03. The first part BB is connected to the first voltage signal VDDA and the reference voltage VREF through two parallel switches; the first metal layer AA is connected to the first voltage signal VDDA and the reference voltage VREF through two parallel switches; the second part CC is connected to the first voltage signal VDDA and the floating ground signal VSS through two parallel switches. The second capacitor C02 and the third capacitor C03, interconnected with the detection capacitor Cf, are configured with corresponding switch inputs. Figure 9The voltage signal shown can increase the accuracy and sensitivity of fingerprint recognition.

[0127] like Figure 10 As shown, Figure 10 The circuit diagram of another capacitive fingerprint recognition system provided in this embodiment of the invention, based on the above embodiments, further includes: a seventh switch K07, through which the port for inputting the first voltage signal VDDA and the fourth node N4 are connected; an eighth switch K08, through which the port for inputting the reference voltage VREF and the fourth node N4 are connected; a ninth switch K09, through which the port for inputting the first voltage signal VDDA and the fifth node N5 are connected; and a tenth switch K10, through which the port for inputting the floating ground signal VSS and the fifth node N5 are connected.

[0128] In this circuit, the fourth node N4 is connected to the third node N3 via the second capacitor C02, and the fifth node N5 is connected to the third node N3 via the third capacitor C03. The metal layer layout of the fingerprint information acquisition circuit 04 can be referenced. Figure 9 As shown, it will not be elaborated further here.

[0129] based on Figure 4 Way, Figure 10 In the illustrated configuration, the feedback capacitor CFB has a first plate and a second plate; the first plate is connected to the non-inverting input terminal via a second reset switch RST2, and is connected to the port for inputting the fourth voltage signal VDC_OS via a third reset switch RST3; the second plate is connected to the output terminal via a fourth reset switch RST4, and is connected to the port for inputting the first voltage signal VDDA via a fifth reset switch RST5.

[0130] In this embodiment of the invention, the reference voltage VREF, the first voltage signal VDDA, and the fourth voltage signal VDC_OS can be any stable voltage value that meets the system requirements.

[0131] In the capacitive fingerprint recognition system described in this embodiment of the invention, the first grounding voltage is 0 potential; the second grounding voltage is a square wave signal that periodically varies between 0 potential and a preset negative potential. The second grounding voltage is a square wave signal, with a high level of 0 and a low level of the preset negative potential -VTX. To maximize signal sensitivity, the preset negative potential -VTX is set to -VDD_SUPPLY.

[0132] As described above, the operating modes of the capacitive fingerprint recognition system include: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode; if in the passive fingerprint detection mode, the floating ground signal generating circuit 05 is used to provide the first ground voltage to the ground terminal; if in the active fingerprint detection mode or the active combined with passive fingerprint detection mode, the floating ground signal generating circuit 05 is used to provide the second ground voltage to the ground terminal.

[0133] The following is combined Figure 9 and Figure 10 The switching control method further explains the three working modes of the capacitive fingerprint recognition system described in the embodiments of the present invention.

[0134] During reset, the feedback capacitor CFB provides a fixed bias voltage VDS_OS-VDDA to adjust the level of the output signal VOUT based on the fingerprint information.

[0135] Passive fingerprint detection mode includes the following three steps:

[0136] Step S11: The first reset switch RST1 is closed, the second reset switch RST2 and the fourth reset switch RST4 are open, the third reset switch RST3 and the fifth reset switch RST5 are closed, the sixth switch K06 is open, and the charge Q across the feedback capacitor CFB is... RST for:

[0137] Q RST = (VDC_OS - VDDA) * CFB

[0138] The output voltage signal VOUT of the integrator circuit 03 is:

[0139] VOUT = VREF

[0140] Step S12: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are open; the second reset switch RST2 and the fourth reset switch are closed; the fourth switch K04 is open; the fifth switch K05 is closed; the seventh switch K07 is closed; the eighth switch K08 is open; the ninth switch K09 is closed; the tenth switch K10 is open; the sixth switch K06 is open. At this time, the detection capacitor Cf is charged through the fifth switch K05, and the charging amount Q1 is:

[0141] Q1=VDDA*Cf+(VDDA-VDDA)*C02+(VDDA-VDDA)*C03

[0142] Step 3 S13: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are open; the second reset switch RST2 and the fourth reset switch RST4 are closed; the fifth switch K05 is open; the fourth switch K04 is open; the seventh switch K07 is open; the eighth switch K08 is closed; the ninth switch K09 is open; the tenth switch K10 is closed; and the sixth switch K06 is closed. At this time, the charge of the detection capacitor Cf is transferred to the output terminal of the operational amplifier OP, and the amount of charge transferred Q2 is:

[0143] Q2=VREF*Cf+(VREF-VREF)*C02+VREF*C03+(VREF-VOUT)*CFB

[0144] According to the principle of charge conservation, we have:

[0145] Q1+Q RST =Q2

[0146]

[0147] Different detection capacitors Cf will produce different output voltage signals VOUT, thus identifying the differences in detection capacitor Cf. The second capacitor C02 and the third capacitor C03 are used to compensate for the charge of the equivalent parasitic capacitance CP at the common node N3 of the fourth switch K04 and the fifth switch K05. Considering the influence of the parasitic capacitance CP from node N3 to VSS, the corrected output voltage signal VOUT is as follows:

[0148]

[0149] Because the sensing capacitor Cf is small, to increase the output voltage signal VOUT, steps S12 and S13 are repeated. Steps S12 and S13 are repeated N times, where N is a positive integer representing the number of integration iterations. After N repetitions, the output voltage signal VOUT is:

[0150]

[0151] After N integrations, not only can the output voltage signal VOUT representing the fingerprint information be increased, but high-frequency noise can also be removed, improving the signal-to-noise ratio.

[0152] Active fingerprint detection involves the following three steps:

[0153] Step S21: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are closed; the second reset switch RST2 and the fourth reset switch RST4 are open; the sixth switch K06 is open; and the charge Q across the feedback capacitor CFB is... RST for:

[0154] Q RST = (VDC_OS - VDDA) * CFB

[0155] The output voltage signal VOUT of the integrator circuit 03 is:

[0156] VOUT = VREF

[0157] Step S22: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are open; the second reset switch RST2 and the fourth reset switch RST4 are closed; the fifth switch K05 is open, and the fourth switch K04 is closed; the seventh switch K07 is open, and the eighth switch K08 is closed; the ninth switch K09 is open, and the tenth switch K10 is closed; the sixth switch K06 is open, VSS = GND = 0. At this time, the detection capacitor Cf is charged through the fifth switch K05, and the charging amount Q1 is:

[0158] Q1=VREF*Cf+(VREF-VREF)*C02+VREF*C03

[0159] Step 3 S23: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are open; the second reset switch RST2 and the fourth reset switch RST4 are closed; the fourth switch K04 is open; the fifth switch K05 is open; the seventh switch K07 is open; the eighth switch K08 is closed; the ninth switch K09 is open; the tenth switch K10 is closed; the sixth switch K06 is closed, VSS = -VTX, and the charge of the detection capacitor Cf is transferred to the output terminal of the operational amplifier OP. The amount of charge transferred, Q2, is:

[0160] Q2=(VREF-VTX)*Cf+(VREF-VREF)*C02+VREF*C03+(VREF-VOUT)*CFB

[0161] According to the principle of charge conservation, we have:

[0162] Q1+Q RST =Q2

[0163]

[0164] Similarly, different detection capacitors Cf can produce different output voltage signals VOUT, and different fingerprint information can be obtained by detecting different detection capacitors Cf.

[0165] The equivalent parasitic capacitance of the common node N3 of the fourth switch K04 and the fifth switch K05 has no charge transfer in the active fingerprint detection mode, so the parasitic capacitance has little impact on the output at this time.

[0166] After repeating steps S22 and S23 N times, the output voltage signal VOUT is:

[0167]

[0168] The active-passive fingerprint detection mode includes the following three steps:

[0169] Step S31: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are closed; the second reset switch RST2 and the fourth reset switch RST4 are open; the sixth switch K06 is open; and the charge Q across the feedback capacitor CFB is... RST for:

[0170] Q RST = (VDC_OS - VDDA) * CFB

[0171] The output voltage signal VOUT of the integrator circuit 03 is:

[0172] VOUT = VREF

[0173] Step 2 S32: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST5 are open; the second reset switch RST2 and the fourth reset switch RST4 are closed; the fourth switch K04 is open; the fifth switch K05 is closed; the seventh switch K07 is closed; the eighth switch K08 is open; the ninth switch K09 is closed; the tenth switch K10 is open; the sixth switch K06 is open; VSS = GND = 0. At this time, the detection capacitor is charged through the fifth switch K05, and the charging amount Q1 is:

[0174] Q1=VDDA*Cf+(VDDA-VDDA)*C02+(VDDA-VDDA)*C03

[0175] Step 3 S33: The first reset switch RST1, the third reset switch RST3, and the fifth reset switch RST are open; the fifth switch K05 is open; the fourth switch K04 is open; the seventh switch K07 is open; the eighth switch K08 is closed; the ninth switch K09 is open; the tenth switch K10 is closed; the sixth switch K06 is closed; VSS = -VTX. At this time, the charge of the detection capacitor Cf is transferred to the output terminal of the operational amplifier OP. The amount of charge transferred, Q2, is:

[0176] Q2=(VREF-VTX)*Cf+(VREF-VREF)*C02+VREF*C03+(VREF-VOUT)*CFB

[0177] According to the principle of charge conservation, we have:

[0178] Q1+Q RST=Q2

[0179]

[0180] Similarly, different detection capacitors Cf will produce different output voltage signals VOUT, and different fingerprint information can be obtained by detecting different detection capacitors Cf. The second capacitor C02 and the third capacitor C03 are used to compensate for the charge of the equivalent parasitic capacitance CP at the common node N3 of the fourth switch K04 and the fifth switch K05. Considering the influence of the parasitic capacitance CP, the corrected output voltage signal VOUT is as follows:

[0181]

[0182] Repeat steps S12 and S13 N times. The output voltage signal VOUT is:

[0183]

[0184] pass Figure 10 The capacitive fingerprint recognition system shown implements three fingerprint detection modes in the fingerprint detection circuit of the same fingerprint detection chip, allowing users to flexibly select the desired fingerprint detection mode based on their needs.

[0185] Based on the above embodiments, another embodiment of the present invention also provides an electronic device, such as... Figure 11 As shown, Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. The electronic device 100 shown includes the capacitive fingerprint recognition system described in the above embodiment.

[0186] The electronic device 100 can be a mobile phone, tablet computer, or smart wearable device, or other electronic device with fingerprint recognition function. The electronic device 100 employs the capacitive fingerprint recognition system described in the above embodiments, which can flexibly select three fingerprint recognition modes using a single chip, has a simple circuit structure, and low manufacturing cost.

[0187] Based on the above embodiments, another embodiment of the present invention provides a fingerprint recognition method for a capacitive fingerprint recognition system, the method comprising:

[0188] Based on control commands, the operating mode of the capacitive fingerprint recognition system is selected; the operating modes of the capacitive fingerprint recognition system include: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode.

[0189] If in the passive fingerprint detection mode, a first ground voltage with a constant amplitude is provided;

[0190] If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, a second ground voltage with periodically varying amplitude is provided.

[0191] The operating mode can be selected by controlling the switch state in the capacitive fingerprint recognition system described in the above embodiments. A floating ground signal adapted to the current operating mode is provided by the floating ground signal generation circuit. The control logic is simple and the circuit structure is simple.

[0192] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on its differences from other embodiments, and similar or identical parts between embodiments can be referred to interchangeably. For the electronic devices and fingerprint recognition methods disclosed in the embodiments, since they correspond to the capacitive fingerprint recognition system disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the corresponding sections of the capacitive fingerprint recognition system description.

[0193] It should be noted that, in the description of this invention, the terms "upper," "lower," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. When a component is considered to be "connected" to another component, it can be directly connected to the other component or may have a component centrally located simultaneously.

[0194] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0195] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A capacitive fingerprint identification system, characterized by include: An integrating circuit includes: an operational amplifier having a positive input terminal, a negative input terminal, a ground terminal, and an output terminal; a feedback branch connected between the negative input terminal and the output terminal; a reference voltage is input to the positive input terminal of the operational amplifier; and the output voltage of the integrating circuit is used for fingerprint recognition. The fingerprint information acquisition circuit is connected to the negative phase input terminal, and inputs a reference voltage or a first voltage signal through a switching switch to acquire fingerprint information; A floating ground signal generation circuit is connected to the ground terminal and is used to provide a floating ground signal VSS adapted to the working mode to the ground terminal based on a second voltage signal and a third voltage signal, and to select the output of the floating ground signal as a first ground voltage with constant amplitude or a second ground voltage with periodic amplitude variation. The capacitive fingerprint recognition system has the following operating modes: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode. If the passive fingerprint detection mode is in effect, the floating ground signal generation circuit is used to provide the first grounding voltage to the grounding terminal; If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, the floating ground signal generation circuit is used to provide the second grounding voltage to the grounding terminal; The floating ground signal generation circuit includes: The first capacitor has one plate connected to a first node, which is used to output the second voltage signal; the other plate is connected to a second node, which is used to output the floating ground signal. The first switch connects the port where the third voltage signal is input to the first node; The second switch is used to ground the first node; The third switch is used to ground the second node.

2. The capacitive fingerprint identification system according to claim 1, characterized in that, The first switch is a first transistor, the second switch is a second transistor, and the third switch is a third transistor; The gate of the first transistor is connected to the first switch control signal, the source is connected to the third voltage signal, and the drain is connected to the first node; The gate of the second transistor is connected to the second switch control signal, the drain is connected to the first node, and the source is grounded; The gate of the third transistor is connected to the third switch control signal, the source is connected to the second node, and the drain is grounded.

3. The capacitive fingerprint identification system according to claim 2, characterized in that, The first transistor is a PMOS, and the second and third transistors are both NMOS.

4. The capacitive fingerprint recognition system according to claim 1, characterized in that, Also includes: The power management unit has a first low-dropout regulator, which is connected to the fingerprint information acquisition circuit and the floating ground signal generation circuit respectively to provide the reference voltage and the first voltage signal.

5. The capacitive fingerprint recognition system according to claim 1, characterized in that, Also includes: Input / output ports and a second low-dropout regulator that provides operating voltage to the input / output ports; The second low-dropout regulator is used to provide operating voltage to the input / output ports based on the third voltage signal.

6. The capacitive fingerprint identification system according to claim 1, characterized in that, The fingerprint information acquisition circuit includes: The fourth switch connects the port where the reference voltage is input to the third node. The fifth switch connects the port that receives the first voltage signal to the third node. The sixth switch connects the third node and the negative phase input terminal. A detection electrode, connected to the third node, is used to form a detection capacitance based on touch operation.

7. The capacitive fingerprint identification system according to claim 6, characterized in that, The fingerprint information acquisition circuit also includes: The seventh switch connects the port that receives the first voltage signal and the fourth node. The eighth switch connects the port where the reference voltage is input to the fourth node. The ninth switch connects the port that receives the first voltage signal and the fifth node. The tenth switch connects the port that inputs the floating ground signal to the fifth node. The fourth node is connected to the third node via a second capacitor, and the fifth node is connected to the third node via a third capacitor.

8. The capacitive fingerprint identification system according to claim 1 or 7, characterized in that, The feedback branch includes: A feedback capacitor connected between the negative phase input terminal and the output terminal; A first reset switch connected between the negative phase input terminal and the output terminal; The feedback capacitor has a first plate and a second plate. The first electrode plate is connected to the negative phase input terminal via a second reset switch, and is also connected to the port for inputting the fourth voltage signal via a third reset switch; The second electrode plate is connected to the output terminal via a fourth reset switch, and is connected to the port that receives the first voltage signal via a fifth reset switch.

9. The capacitive fingerprint identification system according to claim 1, characterized in that, The first grounding voltage is 0 potential; The second grounding voltage is a square wave signal that periodically changes between a zero potential and a preset negative potential.

10. The capacitive fingerprint identification system according to claim 1, characterized in that, The capacitive fingerprint recognition system is integrated into a single chip.

11. An electronic device, characterized in that, include: The capacitive fingerprint recognition system as described in any one of claims 1-10.

12. A method of fingerprint recognition of a capacitive fingerprint recognition system according to any one of claims 1-10, characterized in that, include: Select the operating mode of the capacitive fingerprint recognition system based on control commands; The capacitive fingerprint recognition system has the following operating modes: passive fingerprint detection mode, active fingerprint detection mode, and active combined with passive fingerprint detection mode. If in the passive fingerprint detection mode, a first ground voltage with a constant amplitude is provided; If the fingerprint detection mode is active or a combination of active and passive fingerprint detection modes, a second ground voltage with periodically varying amplitude is provided.

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