A method for replacing original exception module with self-compiled timer module using ST language of CodeSys
By designing a self-developed timer module TOND to replace the exception timer TON in CodeSys' ST language, the problem of unreliable triggering of timers in PLC programming was solved, and the reliability of the delay function was realized, while simplifying program modification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CNGC INST NO 206 OF CHINA ARMS IND GRP
- Filing Date
- 2022-10-17
- Publication Date
- 2026-06-19
AI Technical Summary
The Timer TON provided by CodeSys' ST language in PLC programming is unreliable when triggering delays, often failing to meet the conditions, which leads users to need to perform exception programming to achieve triggering.
Design a custom timer module TOND. By simulating the original TON interface, the new timer module TOND replaces the original exception module to achieve reliable triggering of the delay time. It includes input interfaces 'enable' and 'delay time count', output interface 'delay time reached', and performs timing processing through specific steps.
It achieves reliable timer triggering, simplifies program modification, only requires replacing the self-written timer module and its calling program, without changing other programs, and has a high cost-performance ratio.
Smart Images

Figure CN115794100B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of control using the ST language of CodeSys, and is applicable to vehicle leveling, servo control and other similar control applications. Background Technology
[0002] CodeSys is a popular PLC development environment in Europe. Its widely used ST (Structured Text) programming language ensures the reliability of control due to its ease of use and rigorous structure. It is very similar to the Pascal language in form, and the two languages are comparable in terms of rigor.
[0003] However, this development environment has a drawback in calling timers. As we all know, timers are widely used in PLC programming, but the timer TON provided by this platform version 2.1 cannot work reliably. It often fails to trigger the delay when the conditions are met. The author had to program it to trigger the exception dozens of times before it would work, which caused serious inconvenience to the user. No clues were found in the relevant patents and literature. Summary of the Invention
[0004] Technical problems to be solved
[0005] To address the issue that the original TON cannot reliably trigger delays, this invention provides a method for replacing the original exception module with a custom timer module written in CodeSys' ST language.
[0006] Technical solution
[0007] A method for replacing the original exception module using a custom timer module written in the ST language of CodeSys involves designing a new TON based on the original TON interface and then calling it. The designed TON is renamed TOND. Like the original TON, it has two input interfaces: "Enable" and "Delay Time Count," and one output interface: "Delay Time Expired." The delay time is calculated as a number of milliseconds multiplied by the delay time count, where the delay time count is the loop cycle of the routine containing TOND, and is in milliseconds. The method is characterized by the following steps:
[0008] Step 1: If not enabled, clear the timer's delay time, load the delay time count into the internal timer variable, and proceed to Step 3;
[0009] Step 2: If the internal timing variable is not loaded with the delay time, load it only once and start timing. If the delay time has not elapsed, clear the delay time; otherwise, set the delay time to elapsed.
[0010] Step 3: Return and proceed to the next iteration of the loop.
[0011] A computer system is characterized by comprising: one or more processors, and a computer-readable storage medium for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors cause the one or more processors to implement the method described above.
[0012] A computer-readable storage medium is characterized by storing computer-executable instructions, which, when executed, are used to implement the above-described method.
[0013] Beneficial effects
[0014] This invention provides a method for replacing the original exception module with a custom-written timer module in CodeSys' ST language. Compared with existing technologies, this method has the following advantages:
[0015] 1. Simple and easy to implement;
[0016] 2. Only add the custom timer module and its calling program; no other programs need to be modified.
[0017] 3. The original problem is solved, achieving a high cost-performance ratio at a low cost. Attached Figure Description
[0018] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.
[0019] Figure 1 Application diagram of this invention;
[0020] Figure 2 A specific example of replacing the original exception module with a custom timer module written in CodeSys' ST language is shown in the figure. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0022] Users cannot modify the CodeSys environment itself, and analyzing the delay program itself is not very difficult. Therefore, users can solve this problem by designing their own TON based on the original TON interface and then calling it.
[0023] To distinguish it from the original TON, the user-designed TON was renamed TOND. Like the original TON, it has two input interfaces (variables, the word "variable" is omitted below) "Enable" and "Delay time" (the unit is the loop cycle of the routine in which TOND is located, which is several ms), and one output interface "Delay time reached". The delay time for the call is several ms × delay time.
[0024] The specific method is characterized by:
[0025] (1) If not enabled, clear the timer's delay time, load the delay time count into the internal timer variable, and go to (3);
[0026] (2) If the internal timing variable is not loaded with the delay time, it will be loaded only once and the timing will be started. If the delay time has not been reached, the delay time will be cleared; otherwise, the delay time will be set.
[0027] (3) Return (enter the next loop).
[0028] To enable those skilled in the art to better understand the present invention, the present invention will be described in detail below with reference to specific embodiments.
[0029] Schematic diagram of the embodiment of the present invention is shown below. Figure 2 .
[0030] The PLC control program for a hydraulic leveling subsystem was written using ST language in the CodeSys environment. During use, it was found that the timer TON module included in the environment could not be triggered normally. In the past, dozens of trigger instructions had to be written in the program before it could operate. However, this was not a long-term solution. Therefore, the author set out to solve the problem.
[0031] It is unlikely that the error can be directly modified within the CodeSys environment. Furthermore, the analysis of TON reveals that it is merely a simple delay program. Therefore, the author can completely imitate the original module interface and write a timer module to solve this problem.
[0032] To avoid name conflicts, the new timer is named TOND. Its input interfaces are: an enable (IND) boolean variable and a delay time (PTD) double-word variable. Its output interface is a delay time (Q) boolean variable. Internally, it contains an initial load time (FstAssign) boolean variable and a timing (DelayCounts) double-word variable.
[0033] The specific steps are as follows:
[0034] (1) If IND is false, the timer's Q is false, FstAssign is false, DelayCounts loads PTD, and goes to (3);
[0035] (2) If FstAssign is false, DelayCounts loads PTD only once and sets FstAssign to true. DelayCounts is decremented by one when it is greater than or equal to 1. If DelayCounts is not equal to 0, Q is cleared; otherwise, Q is set.
[0036] (3) Return (enter the next loop).
[0037] The original program called a custom timer module, replacing the original dozens of abnormal triggers with a single normal trigger, while keeping the rest of the program unchanged. The delay function ran normally, and the problem of the original timer not triggering properly was solved.
[0038] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the scope of the technology disclosed in the present invention, and such modifications or substitutions should all be covered within the scope of protection of the present invention.
Claims
1. A method for replacing the original exception module with a custom-written timer module in CodeSys' ST language, wherein a new TON is designed based on the original TON interface and then called, and the designed TON is renamed TOND; like the original TON, it has two input interfaces, "Enable" and "Delay Time", and one output interface, "Delay Time Expired", and the delay time for the call is equal to several ms × the delay time, where the delay time is in the loop period of the routine containing TOND, which is several ms; characterized in that... The steps are as follows: Step 1: If not enabled, clear the timer's delay time, load the delay time count into the internal timer variable, and proceed to Step 3; Step 2: If the internal timing variable is not loaded with the delay time, load it only once and start timing. If the delay time has not elapsed, clear the delay time; otherwise, set the delay time to elapsed. Step 3: Return and proceed to the next iteration of the loop.
2. A computer system, characterized by include: One or more processors, a computer-readable storage medium for storing one or more programs, wherein, when the one or more programs are executed by the one or more processors, the one or more processors cause the one or more processors to implement the method of claim 1.
3. A computer-readable storage medium, characterized in that... The device stores computer-executable instructions, which, when executed, are used to implement the method of claim 1.