A method for fabricating an indium selenide memristor based on an In / Au electrode

Abstract

This invention discloses a method for fabricating an indium selenide (InSe) memristor based on In / Au electrodes, belonging to the field of semiconductor devices. The method for fabricating an InSe memristor with Indium gold electrodes according to this invention includes the following steps: first, using mechanical lift-off technology to obtain few-layer InSe and h-BN thin films respectively; then, using dry transfer technology to transfer the h-BN thin film to a clean substrate surface; next, using a transfer platform to transfer the few-layer InSe directly above the h-BN; finally, evaporating the electrode to obtain the InSe memristor. The fabrication method of this invention is simple, and the fabricated photodetector has advantages such as a large storage window, good stability, and long durability.

Description

Technical Field

[0001] This invention relates to a method for fabricating an indium selenide memristor based on an In / Au electrode, belonging to the field of semiconductor devices. Background Technology

[0002] With the advent of the big data era and the explosive growth of information, people's demands for computer information processing speed and storage unit performance are increasing day by day. Over the past decade, researchers have been committed to miniaturizing transistor size and improving integration. However, in the post-Moore's Law era, the reduction in chip size and the increase in integration have been accompanied by a series of serious problems: on the one hand, the continuous increase in integration is often accompanied by problems such as increased power consumption, short-channel effect, and hot carrier effect; on the other hand, the device size has reached the nanometer level, and further reduction will consume a lot of process costs, which is not conducive to the sustainable development of the semiconductor industry. Therefore, it is becoming increasingly difficult to improve the performance of the von Neumann architecture by improving the process. In addition, the huge amount of data makes the "von Neumann bottleneck" and "memory wall" problems in the traditional von Neumann architecture increasingly prominent. In contrast, the human brain processes information in parallel with low power consumption and has signal processing, memory, and learning functions. Inspired by the brain's powerful multi-task computing capabilities, the research on brain-like structures that can perform huge parallel and energy-efficient computing—artificial neural networks (ANNs)—has aroused widespread interest in the scientific community. Therefore, memristors, which are storage resistors usually made of two metal electrodes and a resistive switch (RS) dielectric, have become a hot research topic as a basic component of neuromorphic computers.

[0003] For a long time, it has been believed that leakage current in the atomically thin insulating RS layer may lead to performance degradation of memristors and make it impossible to control filament formation and switching voltage. Therefore, memristors require new materials, structures, and mechanisms to improve their development. In 2015, Ren Tianling's research group at Tsinghua University used corner-rotated bilayer graphene combined with alumina as an ion transport layer to achieve the first plastic modulation of two-dimensional synaptic-like devices; in 2015, Mark C. Hersam et al. reported the behavior of monolayer MoS2 memristors based on grain boundaries (GBs); in 2016, Xia Fengnian's research group utilized BP's 2nm PO XCharge transfer between the BP channel and the synaptic behavior is achieved. In 2017, Wan Qing's research group at Nanjing University first proposed a multi-port neuromorphic transistor using polyvinyl alcohol protons as a transport layer to mechanically peel off MoS2. In 2020, He Jun et al. constructed a dual-gate 2D ferroelectric van der Waals heterojunction using MoS2, hexagonal boron nitride (h-BN), and CuInP2S6 (CIPS), which exhibited record-breaking high performance. This series of studies demonstrates the important role of two-dimensional materials in non-volatile memories. Indium selenide (InSe), as a member of the two-dimensional materials, is increasingly being used in optoelectronic devices due to its ultra-high intrinsic mobility and moderate electronic band gap. However, to date, there are very few reports on the non-volatile resistive switching behavior of two-dimensional layered InSe materials. In 2021, Jie Wenjing's research group achieved non-volatile bipolar resistive switching behavior and a high on / off ratio of InSe nanosheets through air annealing, but this method has poor persistence and is relatively complex, greatly limiting the application of memristors. Summary of the Invention

[0004] [Technical Issues]

[0005] To date, there are very few reports on the non-volatile resistive switching behavior of two-dimensional layered InSe materials, and the methods are relatively complex and have poor controllability.

[0006] [Technical Solution]

[0007] To address the aforementioned issues, this invention employs a dry transfer technique to transfer a few-layer InSe sample onto a silicon substrate with a boron nitride (h-BN) dielectric layer. The InSe sample is a thin layer of 18 nm, and the h-BN layer is approximately 15 nm thick. A key feature of this method is the use of In / Au (10 nm / 40 nm) electrodes instead of the traditional Ni / Au electrodes. Devices with In / Au electrodes exhibit non-volatile resistive switching behavior. This method is simple, durable, and offers significant performance advantages. During electron beam indium plating, a defect layer is formed on the InSe surface. This defect layer acts as an electron transport layer, enabling charge transfer between the InSe channel and the memristor behavior. The fabrication method is simple, the memristor device has a large storage window, and is less prone to loss.

[0008] The first objective of this invention is to provide a method for fabricating an InSe memristor. The method involves first transferring mechanically stripped h-BN onto a silicon substrate, then using a transfer platform to transfer the stripped InSe directly above the h-BN; next, transferring a copper mesh mask over the InSe, depositing 10 nm of In using an electron beam evaporation system, and finally depositing 40 nm of Au using a metal thermal evaporation system to obtain the InSe memristor.

[0009] In one embodiment of the present invention, the method for preparing an InSe memristor includes the following steps:

[0010] (1) Substrate cleaning: The silicon substrate was ultrasonically cleaned in acetone, ethanol and deionized water in sequence, and then dried to obtain the cleaned silicon substrate.

[0011] (2) Using mechanical exfoliation technology, h-BN and InSe with thicknesses of 8-25 nm were obtained respectively;

[0012] (3) Sample transfer: The few-layer h-BN in step (2) is transferred to the clean silicon substrate surface in step (1) using PDMS dry transfer technology, and then InSe is transferred directly above h-BN using a transfer platform.

[0013] (4) Transfer the copper mesh: Under a light microscope, carefully transfer the copper mesh to the top of the target sample with tweezers, and then fix it with silver paste;

[0014] (5) Electrode preparation: Place the sample from (4) into a vapor deposition machine to vapor deposit the electrode;

[0015] (6) Device fabrication: The device from (5) is bonded to obtain the device.

[0016] In one embodiment of the present invention, the silicon substrate needs to be cleaned before the transfer in step (1), and the specific cleaning steps include:

[0017] The silicon substrate was ultrasonically cleaned in acetone, ethanol and deionized water in sequence, dried after cleaning, and finally baked on a heating platform to remove residues such as acetone and ethanol.

[0018] In one embodiment of the present invention, the silicon substrate needs to be cleaned before the transfer in step (1). Specifically, the silicon substrate is first placed in an acetone solution and ultrasonically cleaned (frequency 20-25KHZ) for 5-10 minutes; then the silicon substrate is placed in an ethanol solution and ultrasonically cleaned for 5-10 minutes at the same frequency; then ultrasonically cleaned in water at the same frequency for 5-10 minutes, then dried with a nitrogen gun, and finally baked on a heating platform at 300°C for 10-15 minutes.

[0019] In one embodiment of the present invention, the copper mesh size in step (4) is 300 mesh.

[0020] In one embodiment of the present invention, the indium in step (5) is 10 nm.

[0021] In one embodiment of the present invention, the vacuum degree of electron beam evaporation in step (5) is less than 10-3 Pa, the evaporation rate is 0.20-0.25 A / s, the time is 7.5 minutes, and the thickness of the obtained electrode material is 10 nm.

[0022] In one embodiment of the present invention, the vacuum degree of the metal thermal evaporation in step (5) is less than 1×10-4 Pa, the plating rate is 0.25~0.30A / s, the time is 30 minutes, and the thickness of the obtained Au electrode material is 40nm.

[0023] In one embodiment of the present invention, the bonding described in step (6) is to bond the device after the electrode is deposited onto the device base to make a memristor device, namely the Inse memristor described in the present invention.

[0024] The second objective of this invention is to prepare an InSe device with In / Au electrodes using the method described herein.

[0025] In one embodiment of the present invention, the InSe device with In / Au as electrodes is selected from P-type silicon and N-type few-layer InSe.

[0026] The third objective of this invention is to prepare an InSe memristor using the method described herein.

[0027] In one embodiment of the present invention, the InSe memristor has the advantages of simple manufacturing method, large storage window of memristor device, strong durability and not easy to lose.

[0028] [Beneficial Effects]

[0029] (1) This invention is based on the N-type two-dimensional material InSe. By constructing an InSe device with In / Au as electrodes, the memristor characteristics of silicon-based InSe are realized. Compared with the traditional metal / insulator / metal structure and the method of constructing two-dimensional materials and their corresponding oxides through oxidation conditions such as annealing and oxygen plasma treatment to realize synaptic behavior, the preparation process of this invention is simple to operate, and the memristor prepared by this method has a large storage window and good stability.

[0030] (2) The present invention utilizes electron beam doping of indium to form a defect layer on the surface of InSe. This defect layer serves as a charge transport layer, enabling InSe to have non-volatile resistive switching characteristics.

[0031] (3) In this invention, a defect layer is utilized when a back gate voltage V is applied. GS(Pulse) = -35V (+60V), t = 2s, inducing an electric field in the opposite direction on the top electrode. Therefore, after removing the gate pulse, two stable polarization states (polarization upward and polarization downward) can be obtained in the defect layer. When the defect layer is polarized downward, electrons accumulate in the InSe channel. Simultaneously, the InSe band bends sharply downward, allowing electrons to be easily injected into the InSe channel via field emission and barrier thermionic emission. Therefore, the device is in the on-state, with a channel current as high as 10... -6 A (corresponding to state E). Conversely, when the defect layer is upwardly polarized, electrons in the InSe channel are depleted and the InSe bands bend only slightly, hindering electron tunneling from the electrode into the channel. Therefore, electrons can only be injected into the InSe channel via thermionic emission, resulting in a shut-off state and a low-current state of 10. -10 A (corresponding to the P state). These two stable states can be used as "1" and "0" in logic circuits.

[0032] (6) In this invention, the InSe sample is obtained by dry transfer technology, and the electrode is obtained by vapor deposition using a transfer copper mesh as a mask. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the process for preparing the InSe memristor in Example 1; wherein, (a) a silicon substrate on which InSe and h-BN have been transferred, (b) a copper mesh is transferred over InSe, (c) the copper mesh is fixed with silver paste, (d) the transferred sample is placed in a vapor deposition machine for vapor deposition, and (e) an optical microscope image of the InSe device after the metal electrodes have been deposited.

[0034] Figure 2 A schematic diagram of a memristor structure using InSe as the channel material.

[0035] Figure 3 The left and right sides show the corresponding energy band diagrams of defect layer polarization in the rising and falling states, respectively, where the black circles represent electrons.

[0036] Figure 4 Typical transfer characteristic curves of InSe devices (I ds –V gs The inserted black arrow indicates the hysteresis direction of the manufactured device.

[0037] Figure 5 The transfer characteristic curves of InSe devices are shown for different back-gate voltage ranges, ±10 to ±60V, with a step of 10V. ds =4V.

[0038] Figure 6 From Figure 4 Extract memory windows under different maximum gate pressures.

[0039] Figure 7 A hold test was conducted by setting the switching voltage pulse (Vgs = -35V, +60V, t = 2s) to the pole in the InSe polarization direction. After 1000 seconds, the on / off current remained stable, and the on / off ratio reached 10. 4 Set V gs =0V, V ds =4V to read the current.

[0040] Figure 8 Cyclic durability testing for programming and erasure state changes.

[0041] Figure 9 The left side shows the transfer hysteresis of InSe devices based on In / Au electrodes at different gate voltages (±10 to ±60V, step: 10V; V). ds =4V), the right side is the memory window.

[0042] Figure 10 The left image shows the transfer hysteresis (±10 to ±60V, step: 10V; V) of an InSe device based on photolithographic In / Au electrodes. ds =4V), the right side is the memory window.

[0043] Figure 11 This is a hysteresis phenomenon in Au electrodes. Detailed Implementation

[0044] The preferred embodiments of the present invention are described below. It should be understood that the embodiments are for better explanation of the present invention and are not intended to limit the present invention.

[0045] Test method:

[0046] Memristor performance characterization: Current testing was performed using a Keithley 2634 test source and Ke2600S Measurement Software. The specific testing method is as follows: The bonded device was inserted into the electrical box, and a fixed V was applied to the device. ds (4V), the gate voltage is set to scan back and forth: -X→X→-X (X is 10V, 20V, 30V, 40V, 50V, 60V), the transfer curve is obtained, and then a pulse voltage is applied to the device to test the device's durability and stability.

[0047] Raw materials used in the examples:

[0048] InSe thin films were prepared by mechanical exfoliation. The specific steps were as follows: first, a portion of the sample was attached to the crystal surface with 3M tape, and then the tapes were peeled off one by one. This process was repeated about five times to obtain the InSe thin film.

[0049] PDMS dry transfer technique: Apply InSe-containing tape to the PDMS surface, let it stand for 1-2 hours, then peel off the tape, leaving the InSe sample on the polydimethylsiloxane (PDMS) surface; then use a self-built transfer platform to transfer the PDMS with the sample to a silicon substrate with h-BN, where the InSe is directly above the h-BN.

[0050] The PDMS substrate used was prepared by ourselves. During preparation, Dow Corning SYLGARD 184 silicone rubber and curing agent were mixed at a weight ratio of 10:1 and stirred evenly. After all the bubbles disappeared, the mixture was left to stand in a refrigerator at 4°C for 48 hours to solidify into a transparent film.

[0051] The electrodes are prepared by evaporation, specifically including electron beam evaporation of nickel metal and thermal evaporation of gold metal; wherein, when preparing nickel metal by electron beam evaporation, the vacuum conditions of the evaporation machine must meet 1×10⁻⁶. -3 For electrode materials with a thickness of 10 nm, the plating rate used is 0.20–0.25 A / s, the time is approximately 7.5 minutes, and the resulting electrode material thickness is 10 nm. When preparing gold metal by thermal evaporation, the vacuum conditions of the evaporation machine must meet 1 × 10⁻⁶. -4 For a Pa value below 0.25–0.30 A / s, the plating rate was 0.25–0.30 A / s, the time was approximately 30 minutes, and the resulting electrode material thickness was 40 nm.

[0052] Example 1

[0053] based on Figure 1-8 A method for fabricating an InSe / h-BN memristor with In / Au electrodes, the process is as follows:

[0054] (1) Substrate cleaning: A silicon wafer coated with a 300nm silicon dioxide layer was used as the substrate. The substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning for 5 minutes each to remove surface organic matter. The ultrasonic frequency was 25KHz. After that, it was dried with a nitrogen gun. Finally, it was baked at 300℃ for 10 minutes on a heating platform to remove acetone, ethanol and other residues, and the cleaned silicon substrate was obtained.

[0055] (2) Few-layered h-BN and InSe were obtained by mechanical exfoliation technique;

[0056] (3) Sample transfer: The few-layer h-BN in step (2) is transferred to the surface of the cleaned silicon substrate in step (1) using PDMS dry transfer technology. Then, InSe is transferred directly above the few-layer h-BN under an optical microscope using a self-made transfer platform.

[0057] (4) Transfer the copper mesh: Place the silicon-based InSe-h-BN from step (3) under an optical microscope, and transfer the copper mesh under a 10X lens to the top of the sample with tweezers and fix it with silver paste.

[0058] (5) Electrode preparation: Place the sample with the copper mesh transferred in step (4) into the vapor deposition chamber to prepare the electrode material;

[0059] (6) Bond the device from step (5) onto the device base to facilitate electrical measurements.

[0060] Example 2

[0061] Figure 9 The process for removing the boron nitride layer from an InSe memristor based on an In / Au electrode includes the following steps:

[0062] (1) Substrate cleaning: A silicon wafer coated with a 300nm silicon dioxide layer was used as the substrate. The substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning for 5 minutes each to remove surface organic matter. The ultrasonic frequency was 25KHz. After that, it was dried with a nitrogen gun. Finally, it was baked at 300℃ for 10 minutes on a heating platform to remove acetone, ethanol and other residues, and the cleaned silicon substrate was obtained.

[0063] (2) Few layers of InSe were obtained using mechanical stripping technology;

[0064] (3) Sample transfer: The InSe from step (2) was transferred to the surface of the silicon substrate cleaned in step (1) using PDMS dry transfer technology;

[0065] (4) Transfer the copper mesh: Place the silicon-based InSe from step (3) under an optical microscope, and transfer the copper mesh under a 10X lens to the top of the sample with tweezers and fix it with silver paste.

[0066] (5) Electrode preparation: Place the sample with the copper mesh transferred in step (4) into the vapor deposition chamber to prepare the electrode material;

[0067] (6) Bond the device from step (5) onto the device base to facilitate electrical measurements.

[0068] Therefore, the memory behavior of this memristor is mainly related to the electrodes.

[0069] Example 3

[0070] Figure 10 This describes a method for fabricating InS / h-BN memristors based on In / Au electrodes using photolithography.

[0071] (1) Substrate cleaning: A silicon wafer coated with a 300nm silicon dioxide layer was used as the substrate. The substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning for 5 minutes each to remove surface organic matter. The ultrasonic frequency was 25KHz. After that, it was dried with a nitrogen gun. Finally, it was baked at 300℃ for 10 minutes on a heating platform to remove acetone, ethanol and other residues, and the cleaned silicon substrate was obtained.

[0072] (2) Few-layered h-BN and InSe were obtained by mechanical exfoliation technique;

[0073] (3) Sample transfer: The few-layer h-BN in step (2) is transferred to the surface of the cleaned silicon substrate in step (1) using PDMS dry transfer technology. Then, InSe is transferred directly above the few-layer h-BN under an optical microscope using a self-made transfer platform.

[0074] (4) Photolithography: The silicon-based InSe-h-BN from step (3) is photolithographically etched.

[0075] (5) Electrode preparation: Place the photolithographically etched sample from step (4) into the evaporation chamber to prepare the electrode material;

[0076] (6) Bond the device from step (5) onto the device base to facilitate electrical measurements.

[0077] Example 4

[0078] Figure 11 A method for fabricating an InS / h-BN memristor based on an Au electrode by modifying the electrode material.

[0079] (1) Substrate cleaning: A silicon wafer coated with a 300nm silicon dioxide layer was used as the substrate. The substrate was placed in acetone, anhydrous ethanol and deionized water for ultrasonic cleaning for 5 minutes each to remove surface organic matter. The ultrasonic frequency was 25KHz. After that, it was dried with a nitrogen gun. Finally, it was baked at 300℃ for 10 minutes on a heating platform to remove acetone, ethanol and other residues, and the cleaned silicon substrate was obtained.

[0080] (2) Few-layered h-BN and InSe were obtained by mechanical exfoliation technique;

[0081] (3) Sample transfer: The few-layer h-BN in step (2) is transferred to the surface of the cleaned silicon substrate in step (1) using PDMS dry transfer technology. Then, InSe is transferred directly above the few-layer h-BN under an optical microscope using a self-made transfer platform.

[0082] (4) Electrode fabrication: The electrode is transferred onto silicon-based InSe-h-BN.

[0083] (6) Bond the device from step (5) onto the device base to facilitate electrical measurements.

[0084] In summary, the Au electrode exhibits a small hysteresis phenomenon. Figure 11 However, it is not suitable for memory applications because the hysteresis does not cover the gate free point, meaning that bistable states do not exist when the gate voltage is equal to 0V. This demonstrates the potential of indium selenide based on In / Au electrodes in memristor applications.

Claims

1. A method for fabricating and applying an indium selenide memristor based on an indium gold electrode, characterized in that, The method involves first obtaining a few layers of h-BN and InSe using mechanical exfoliation; then transferring the h-BN film onto a clean silicon wafer using dry transfer technology, and finally transferring InSe directly above the h-BN to obtain an InSe / hBN structure. The method for preparing the InSe / hBN structure includes the following steps: (1) The silicon substrate was ultrasonically cleaned in acetone, ethanol and deionized water in sequence, and then dried to obtain a clean silicon wafer. (2) Using mechanical exfoliation technology, h-BN and InSe with thicknesses of 8-25 nm were obtained respectively; (3) Use PDMS dry transfer technology to transfer the 8-25nm thick h-BN in step (2) to the clean silicon substrate surface in step (1), and then use the transfer platform to transfer InSe directly above the h-BN. (4) Carefully transfer the copper mesh to the top of the target sample under a light microscope using tweezers, and then fix it with silver paste; (5) Place the sample from (4) into the vapor deposition machine to deposit electrodes; the vapor deposition electrodes include indium metal prepared by electron beam vapor deposition and gold metal prepared by thermal vapor deposition; wherein, when indium metal is prepared by electron beam vapor deposition, the vacuum conditions of the vapor deposition machine must meet 10 -3 For electrode materials with a thickness of 10 nm, the plating rate used is 0.20~0.25 A / s, the time is 7.5 minutes, and the resulting electrode material thickness is 10 nm. When preparing gold metal by thermal evaporation, the vacuum conditions of the evaporation machine must meet 1×10⁻⁶. -4 For Pa below 0.25, the plating rate used is 0.25~0.30 A / s, the time is about 30 minutes, and the thickness of the obtained electrode material is 40 nm. (6) Bond the device from (5) to obtain the device.

2. The method according to claim 1, characterized in that, The thicknesses of the few-layer h-BN and InSe in step (2) are 15 nm and 18 nm, respectively; the thickness of the SiO2 layer in step (1) is 300 nm.

3. The method according to claim 1, characterized in that, The copper mesh in step (4) is 300 mesh with a channel width of 35µm. During the transfer process, the copper mesh is first placed on the silicon wafer, and then the copper mesh is slowly moved with tweezers until it is observed under a 10x microscope that the copper mesh is directly above the target material.

4. The method according to claim 1, characterized in that, The indium mentioned in step (5) is 10 nm.

5. The method according to claim 1, characterized in that, In step (5), the vacuum degree of electron beam evaporation is less than 10-3 Pa, the evaporation rate is 0.20~0.25 A / s, the time is 7.5 minutes, and the thickness of the obtained electrode material is 10 nm.

6. The method according to claim 1, characterized in that, The vacuum degree of the metal thermal evaporation in step (5) is less than 1×10-4 Pa, the plating rate is 0.25~0.30 A / s, the time is 30 minutes, and the thickness of the Au electrode material obtained is 40 nm.

7. An InSe memristor with In / Au electrodes prepared by the method according to any one of claims 1 to 6.

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