Active element substrate

By designing a dual-gate structure in a thin-film transistor, increasing the semiconductor structure thickness of the first active element and reducing the thickness of the second active element, the reliability and current deficiency problems of thin-film transistors during long-term operation are solved, and the reliability and current are improved.

CN116072683BActive Publication Date: 2026-07-24AU OPTRONICS CORP
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Patent Information

Application Number
CN202211602600.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2022-07-27
Filing Date
2022-12-13
Publication Date
2026-07-24
Estimated Expiration
2042-12-13

AI Technical Summary

Technical Problem

Existing thin-film transistors (TFTs) suffer from reliability issues and insufficient turn-on current when on for extended periods. In particular, switching TFTs are prone to reliability problems during brief on-time operation, while the turn-on current of driving TFTs is insufficient.

Method used

By designing a dual-gate structure in a thin-film transistor, the semiconductor structure thickness of the first active element is increased to improve the turn-on current, while the semiconductor structure thickness of the second active element is reduced to improve leakage current. Different connection methods are used to improve reliability.

Benefits of technology

This improves the long-term turn-on reliability of thin-film transistors (TFTs) while increasing the turn-on current, thus addressing the short-term reliability issues of switching TFTs and the insufficient current for driving TFTs.

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Abstract

An active element substrate includes a substrate, a first active element, and a second active element electrically connected to the first active element. The first active element includes a first bottom gate, a first semiconductor structure, a first top gate, a first source, and a first drain. The first source is electrically connected to the first bottom gate. The second active element includes a second bottom gate, a second semiconductor structure, a second top gate, a second source, and a second drain. The second semiconductor structure has a thickness less than a thickness of the first semiconductor structure. The second bottom gate is electrically connected to the second top gate.
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