BUCK converter, motherboard and computing device

Abstract

Embodiments of the present application provide a BUCK converter, a mainboard and a computing device, and relate to the technical field of BUCK converters. The BUCK converter comprises a BUCK conversion circuit, a sampling circuit, a control signal generation circuit and a sampling adjustment circuit. The sampling adjustment circuit comprises a first sampling adjustment circuit and / or a second sampling adjustment circuit. When the sampling adjustment circuit comprises the first sampling adjustment circuit, the first sampling adjustment circuit is connected in parallel with a first voltage division branch, and is configured to increase an output voltage of the sampling adjustment circuit. When the sampling adjustment circuit comprises the second sampling adjustment circuit, the second sampling adjustment circuit is connected in parallel with a second voltage division branch, and is configured to decrease the output voltage of the sampling adjustment circuit. In the embodiments of the present application, the sampling adjustment circuit can increase and / or decrease the output voltage of the sampling circuit, so as to change a duty cycle of a first control signal generated by the control signal generation circuit, and improve the dynamic response capability of the BUCK converter.

Description

Technical Field

[0001] This application relates to the field of BUCK converter technology, and more particularly to a BUCK converter, motherboard, and computing device. Background Technology

[0002] In related technologies, computing devices include a motherboard and a load. The motherboard includes a BUCK converter, the output of which is electrically connected to the load. The BUCK converter is used to implement DC-DC (Direct Current) step-down conversion to meet the power supply requirements of the load. However, the dynamic response capability of BUCK converters is generally poor. Summary of the Invention

[0003] Embodiments of this application provide a BUCK converter, motherboard, and computing device for improving the dynamic response capability of the BUCK converter.

[0004] To achieve the above objectives, the following technical solution is provided:

[0005] On one hand, embodiments of this application provide a BUCK converter. The BUCK converter includes a BUCK conversion circuit, a sampling circuit, a control signal generation circuit, and a sampling adjustment circuit. The BUCK conversion circuit includes an inductor and a first switching transistor. The first terminal of the first switching transistor is electrically connected to a DC power supply, and the second terminal of the first switching transistor is electrically connected to the first terminal of the inductor. The first switching transistor is used to control the charging or discharging of the inductor. The sampling circuit includes a first voltage divider branch and a second voltage divider branch. The first terminal of the first voltage divider branch is electrically connected to the second terminal of the inductor, and the second terminal of the first voltage divider branch, the first terminal of the second voltage divider branch, and the first input terminal of the control signal generation circuit are electrically connected. The second terminal of the second voltage divider branch is electrically connected to ground. The output terminal of the control signal generation circuit is electrically connected to the third terminal of the first switching transistor. The control signal generation circuit is used to generate a first control signal based on the output voltage of the sampling circuit, and the first control signal is used to control the first switching transistor to turn on or off. The sampling adjustment circuit includes a first sampling adjustment circuit and / or a second sampling adjustment circuit. Wherein, when the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit is connected in parallel with the first voltage divider branch to increase the output voltage of the sampling circuit. When the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit is connected in parallel with the second voltage divider branch to reduce the output voltage of the sampling circuit.

[0006] In the embodiments of this application, the first input terminal of the control signal generation circuit is electrically connected to the second terminal of the first voltage divider branch and the first terminal of the second voltage divider branch (that is, the output terminal of the sampling circuit), so that the control signal generation circuit can obtain the output voltage of the sampling circuit and generate a first control signal based on the output voltage of the sampling circuit to control the conduction or disconnection of the first switching transistor, thereby realizing negative feedback control of the BUCK conversion circuit.

[0007] Furthermore, the sampling adjustment circuit includes a first sampling adjustment circuit and / or a second sampling adjustment circuit. The first sampling adjustment circuit is connected in parallel with the first voltage divider branch to increase the output voltage of the sampling circuit; the second sampling adjustment circuit is connected in parallel with the second voltage divider branch to decrease the output voltage of the sampling circuit. This allows the sampling adjustment circuit to increase and / or decrease the output voltage of the sampling circuit, thereby changing the duty cycle of the first control signal generated by the control signal generation circuit. This enables the output voltage of the BUCK converter to change rapidly, improving the dynamic response capability of the BUCK converter and enabling the BUCK converter to provide a stable DC voltage to the load.

[0008] By setting up a sampling adjustment circuit to improve the dynamic response capability of the BUCK converter, there is no need to set up a large number of ceramic capacitors, nor is there a need to set up multiphase controllers or DRMOS, etc. The structure is simple, the cost of the BUCK converter is reduced, and it is conducive to the miniaturization of the BUCK converter.

[0009] In some possible implementations, the first voltage divider branch includes a first resistor. The second voltage divider branch includes a second resistor. The first terminal of the first resistor is electrically connected to the second terminal of the inductor, the second terminal of the first resistor is electrically connected to the first terminal of the second resistor, and the second terminal of the second resistor is electrically connected to ground. When the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit is connected in parallel with the first resistor. When the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit is connected in parallel with the second resistor. This configuration allows the sampling circuit to acquire the output voltage of the BUCK converter circuit through resistor voltage division. This sampling circuit does not require a complex circuit structure, has a simple structure, and saves on the cost of the BUCK converter. Furthermore, by setting the first sampling adjustment circuit to be connected in parallel with the first resistor and the second sampling adjustment circuit to be connected in parallel with the second resistor, the sampling adjustment circuit can increase and / or decrease the output voltage of the sampling circuit, thereby changing the duty cycle of the first control signal generated by the control signal generation circuit and improving the dynamic response capability of the BUCK converter.

[0010] In some possible implementations, when the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit includes a first comparison unit, a first switching unit, and a first adjustment unit. The first input terminal of the first comparison unit is electrically connected to the second terminal of the first voltage divider branch. The second input terminal of the first comparison unit is electrically connected to the second reference voltage source. The output terminal of the first comparison unit is electrically connected to the third terminal of the first switching unit. The first terminal of the first switching unit is electrically connected to the first terminal of the first adjustment unit. The second terminal of the first switching unit is electrically connected to the second terminal of the first voltage divider branch. The second terminal of the first adjustment unit is electrically connected to the first terminal of the first voltage divider branch. With this configuration, when the load is dynamic and the output voltage of the sampling circuit is greater than the second reference voltage (the maximum value in the set voltage range), the first comparison unit can output a first comparison result, and the first switching unit can be turned on based on the first comparison result. This allows the first adjustment unit to be connected in parallel with the first voltage divider branch (the first resistor) to increase the output voltage of the sampling circuit, increase the voltage value of the second calculation result output by the differential compensation unit, and decrease the duty cycle of the first control signal generated by the pulse modulation unit. This allows the output voltage of the BUCK converter circuit to decrease rapidly, improving the dynamic response capability of the BUCK converter. When the load is in a steady state, the first switching unit can be disconnected, which disconnects the first regulating unit from the first voltage divider branch (first resistor). This avoids the first regulating unit affecting the output voltage of the BUCK converter circuit when the load is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter when the load is in a steady state, and improves the stability of the output voltage of the BUCK converter.

[0011] In some possible implementations, when the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit includes a second comparison unit, a second switching unit, and a second adjustment unit. The first input terminal of the second comparison unit is electrically connected to a third reference voltage source. The second input terminal of the second comparison unit is electrically connected to the first terminal of the second voltage divider branch. The output terminal of the second comparison unit is electrically connected to the third terminal of the second switching unit. The first terminal of the second switching unit is electrically connected to the first terminal of the second adjustment unit, and the second terminal of the second switching unit is electrically connected to ground. The second terminal of the second adjustment unit is electrically connected to the first terminal of the second voltage divider branch. With this configuration, when the load is dynamic and the output voltage of the sampling circuit is less than the third reference voltage (the minimum value in the set voltage range), the second comparison unit can output a second comparison result, and the second switching unit can be turned on based on the second comparison result. This allows the second adjustment unit to be connected in parallel with the second voltage divider branch (the second resistor) to reduce the output voltage of the sampling circuit, decrease the voltage value of the first calculation result output by the differential compensation unit, increase the duty cycle of the first control signal generated by the pulse modulation unit, and enable the output voltage of the BUCK converter circuit to increase rapidly, thereby improving the dynamic response capability of the BUCK converter. When the load is in a steady state, the second switching unit can be disconnected, which allows the second regulating unit to be disconnected from the second voltage divider branch (second resistor). This avoids the second regulating unit affecting the output voltage of the BUCK converter circuit when the load is in a steady state, reduces the fluctuation of the BUCK converter's output voltage when the load is in a steady state, and improves the stability of the BUCK converter's output voltage.

[0012] In some possible implementations, the first comparison unit includes a first comparator. The first switching unit includes a second switching transistor. The first adjustment unit includes a third resistor. The first input terminal of the first comparator is electrically connected to the second terminal of the first resistor. The second input terminal of the first comparator is electrically connected to the output terminal of the second reference voltage source. The output terminal of the first comparator is electrically connected to the third terminal of the second switching transistor. The first terminal of the second switching transistor is electrically connected to the first terminal of the third resistor. The second terminal of the second switching transistor is electrically connected to the second terminal of the first resistor. The second terminal of the third resistor is electrically connected to the first terminal of the first resistor. With this configuration, when the BUCK converter circuit experiences overshoot, the first comparator can output a first comparison result, the second switching transistor is turned on, and the third resistor can be connected in parallel with the first resistor. This allows the output voltage of the sampling circuit to increase, increasing the voltage value of the second calculated result output by the differential compensation unit, decreasing the duty cycle of the first control signal generated by the pulse modulation unit, and enabling the output voltage of the BUCK converter circuit to decrease rapidly, thereby improving the dynamic response capability of the BUCK converter. When the load is in a steady state, the second switch can be turned off, which disconnects the third resistor from the first resistor. This prevents the third resistor from affecting the output voltage of the sampling circuit when the load is in a steady state, reduces the fluctuation of the BUCK converter's output voltage when the load is in a steady state, and improves the stability of the BUCK converter's output voltage.

[0013] In some possible implementations, the first regulating unit further includes a first capacitor and a second capacitor. The second terminal of the third resistor is electrically connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is electrically connected to the first terminal of the first resistor. The first terminal of the second capacitor is electrically connected to the first terminal of the third resistor, and the second terminal of the second capacitor is electrically connected to the second terminal of the first capacitor. This configuration allows the first regulating unit to form a Type II compensation network, thereby increasing the loop gain of the feedback loop composed of the BUCK converter circuit, the sampling circuit, and the control signal generation circuit, and improving the dynamic response capability of the BUCK converter. Furthermore, when the load is dynamic and the BUCK converter circuit is overshooting, the loop gain of the feedback loop composed of the BUCK converter circuit, the sampling circuit, and the control signal generation circuit is greater than the loop gain of the feedback loop composed of the BUCK converter circuit, the sampling circuit, and the control signal generation circuit when the load is in a steady state. This allows the feedback loop composed of the BUCK converter circuit, the sampling circuit, and the control signal generation circuit to achieve a stepped gain, meeting the power supply requirements of the load under different states (dynamic and steady state).

[0014] In some possible implementations, the second comparison unit includes a second comparator. The second switching unit includes a third switching transistor. The second adjustment unit includes a fourth resistor. The first input terminal of the second comparator is electrically connected to the output terminal of the third reference voltage source. The second input terminal of the second comparator is electrically connected to the first terminal of the second resistor. The output terminal of the second comparator is electrically connected to the third terminal of the third switching transistor. The first terminal of the third switching transistor is electrically connected to the first terminal of the fourth resistor. The second terminal of the third switching transistor is electrically connected to ground. The second terminal of the fourth resistor is electrically connected to the first terminal of the second resistor. With this configuration, when the BUCK converter circuit is undershooting, the second comparator can output a second comparison result, the third switching transistor is turned on, and the fourth resistor can be connected in parallel with the second resistor, so that the output voltage of the sampling circuit can be reduced, the voltage value of the first calculation result output by the differential compensation unit is reduced, the duty cycle of the first control signal generated by the pulse modulation unit is increased, and the output voltage of the BUCK converter circuit can be rapidly increased, thereby improving the dynamic response capability of the BUCK converter. When the load is in a steady state, the third switch can be turned off, which disconnects the fourth resistor from the second resistor. This prevents the fourth resistor from affecting the output voltage of the sampling circuit when the load is in a steady state, reduces the fluctuation of the BUCK converter's output voltage when the load is in a steady state, and improves the stability of the BUCK converter's output voltage.

[0015] In some possible implementations, the control signal generation circuit includes a differential compensation unit and a pulse modulation unit. The differential compensation unit includes a first operational amplifier. The pulse modulation unit includes a second operational amplifier. The first input terminal of the first operational amplifier is electrically connected to the first terminal of the second voltage divider branch. The second input terminal of the first operational amplifier is electrically connected to the output terminal of the first reference voltage source. The output terminal of the first operational amplifier is electrically connected to the first input terminal of the second operational amplifier. The second input terminal of the second operational amplifier is electrically connected to the output terminal of the ramp signal generation circuit. The output terminal of the second operational amplifier is electrically connected to the third terminal of the first switching transistor. This configuration enables the first operational amplifier to calculate the difference between the first reference voltage and the output voltage of the sampling circuit, and to compensate and amplify the difference to obtain a first calculation result; the second operational amplifier can ramp modulate the first calculation result to generate a first control signal, thereby controlling the on or off state of the first switching transistor, realizing negative feedback control of the BUCK converter circuit.

[0016] On the other hand, embodiments of this application provide a motherboard. The motherboard includes the BUCK converter as described above.

[0017] The motherboard provided in the embodiments of this application includes the BUCK converter as described above, and therefore has all the above-described beneficial effects, which will not be repeated here.

[0018] In another aspect, embodiments of this application provide a computing device. The computing device includes a motherboard as described above.

[0019] The computing device provided in the embodiments of this application includes the motherboard as described above, and therefore has all the above-described beneficial effects, which will not be repeated here. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the structure of a computing device provided in an embodiment of this application;

[0021] Figure 2 A schematic diagram of the circuit topology of a BUCK converter circuit provided in an embodiment of this application;

[0022] Figure 3 A schematic diagram of the circuit topology of another BUCK converter circuit provided in an embodiment of this application;

[0023] Figure 4 This is a schematic diagram of the structure of a BUCK converter provided in an embodiment of this application;

[0024] Figure 5 This is a schematic diagram of another BUCK converter provided in an embodiment of this application;

[0025] Figure 6 A schematic diagram illustrating the voltage relationship between a ramp signal and a calculation result, provided as an embodiment of this application;

[0026] Figure 7 A circuit topology diagram of a BUCK converter provided in an embodiment of this application;

[0027] Figure 8 A schematic diagram of another BUCK converter provided in the embodiments of this application;

[0028] Figure 9 A schematic diagram of another BUCK converter provided in the embodiments of this application;

[0029] Figure 10 A schematic diagram of a sampling circuit and a sampling adjustment circuit provided in an embodiment of this application;

[0030] Figure 11 A schematic diagram of another BUCK converter provided in an embodiment of this application. Detailed Implementation

[0031] The technical solutions in some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application are within the scope of protection of this application.

[0032] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this application. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned are included in any suitable manner in any one or more embodiments or examples.

[0033] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined as "first" or "second" explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, "a plurality of" means two or more.

[0034] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0035] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0036] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable deviation range, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where the acceptable deviation range for approximate parallelism is, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where the acceptable deviation range for approximate perpendicularity is also, for example, within 5°. “equal” includes absolute equality and approximate equality, where the acceptable deviation range for approximate equality is, for example, that the difference between the two equals is less than or equal to 5% of either one.

[0037] Figure 1 This is a schematic diagram of the structure of a computing device provided in an embodiment of this application.

[0038] like Figure 1 As shown, embodiments of this application provide a computing device 200, which may have processing, computing, and communication functions. For example, the computing device 200 may be a server, switch, or computer. Embodiments of this application do not further limit the type of computing device 200.

[0039] The computing device 200 includes a switching power supply 210 and a load 220. The input terminal 210a of the switching power supply 210 is electrically connected to an external AC power supply 300, and the output terminal 210b of the switching power supply 210 is connected to the load 220, enabling the switching power supply 210 to supply power to the load 220. For example, the AC power supply 300 can be AC ​​mains power, such as 220V or 380V AC mains power.

[0040] In the embodiments of this application, the “electrical connection” between one device and another device can be a direct electrical connection between the two devices, or an electrical connection between the two devices can be achieved through a third device.

[0041] For example, the load 220 may include a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), a southbridge chip, a PCIe Switch IC (Peripheral Component Interconnect Express Switch Integrated Circuit), and a Retimer IC, etc.

[0042] The computing device 200 also includes a motherboard ( Figure 1 (Not shown in the image), the motherboard includes a BUCK converter 100. For example... Figure 1 As shown, the input terminal 100a of the BUCK converter 100 is electrically connected to the output terminal 210b of the switching power supply 210, and the output terminal 100b of the BUCK converter 100 is electrically connected to the load 220, so that the switching power supply 210 can be electrically connected to the load 220 through the BUCK converter 100.

[0043] The switching power supply 210 can perform AC (Alternating Current) to DC (Direct Current) conversion, converting the AC voltage output from the AC power supply 300 into a DC voltage and supplying it to the BUCK converter 100. The BUCK converter 100 can perform DC-DC step-down conversion, reducing the received DC voltage value and providing the stepped-down DC voltage to the load 220 to meet the power supply requirements of the load 220.

[0044] For example, the switching power supply 210 can convert the received AC voltage into a DC voltage of approximately 12V (unit: volts) and supply it to the BUCK converter 100. The BUCK converter 100 can convert the approximately 12V DC voltage into a DC voltage of approximately 3V and supply it to the load 220.

[0045] For example, when computing device 200 includes multiple loads 220, multiple loads 220 with the same rated voltage can be electrically connected to the output terminal 100b of the same BUCK converter 100, so that one BUCK converter 100 can provide operating voltage for multiple loads 220 with the same rated voltage, reducing the number of BUCK converters 100 and reducing the cost of computing device 200.

[0046] Figure 2This is a schematic diagram of the circuit topology of a BUCK converter circuit provided in an embodiment of this application. For example, the BUCK converter includes a BUCK converter circuit 110. Referring below... Figure 2 An example of the BUCK converter circuit 110 will be provided.

[0047] like Figure 2 As shown, the BUCK converter circuit 110 includes an inductor L, a first switching transistor Q1, a first diode D1, and a third capacitor C3. The first terminal Q11 of the first switching transistor Q1 is electrically connected to the DC power supply 230, and the second terminal Q12 of the first switching transistor Q1 is electrically connected to the first terminal of the inductor L.

[0048] The second terminal Q12 of the first switching transistor Q1 is also electrically connected to the cathode of the first diode D1. The second terminal of the inductor L is electrically connected to the first terminal of the third capacitor C3, and the second terminal of the third capacitor C3 is electrically connected to the anode of the first diode D1 and the DC power supply 230.

[0049] The anode of the first diode D1 is connected to ground. The first switching transistor Q1 is used to control the charging or discharging of the inductor L.

[0050] Figure 2 The DC power supply 230 shown can be the equivalent DC output of the switching power supply 210. That is, the first terminal Q11 of the first switching transistor Q1 is electrically connected to the output terminal 210a of the switching power supply 210, and the second terminal of the third capacitor C3 is electrically connected to the output terminal 210a of the switching power supply 210.

[0051] Understandably, when the first switch Q1 is turned on, the current can flow sequentially along the DC power supply 230, the first switch Q1, the inductor L, the third capacitor C3 back to the DC power supply 230, allowing the DC power supply 230 to charge the inductor L via the first switch Q1. When the first switch Q1 is turned off, since the current flowing through the inductor L cannot change abruptly, the current can flow sequentially along the cathode of the first diode D1, the inductor L, the third capacitor C3 back to the anode of the first diode D1, causing the inductor L to discharge.

[0052] Figure 3 A schematic diagram of the circuit topology of another BUCK converter circuit provided in an embodiment of this application.

[0053] like Figure 3 As shown, in Figure 2 In the BUCK converter circuit 110 shown, the first diode D1 is replaced with the fourth switch Q4. The second terminal Q12 of the first switch Q1 is electrically connected to the first terminal of the inductor L and the first terminal Q41 of the fourth switch Q4. The second terminal of the third capacitor C3 is electrically connected to the second terminal Q42 of the fourth switch Q4 and the DC power supply 230. The second terminal Q42 of the fourth switch Q4 is electrically connected to ground.

[0054] Understandably, when the first switch Q1 is turned on, the fourth switch Q4 is turned off, allowing current to flow sequentially through the DC power supply 230, the first switch Q1, the inductor L, the third capacitor C3, and back to the DC power supply 230, enabling the DC power supply 230 to charge the inductor L via the first switch Q1. When the first switch Q1 is turned off, the fourth switch Q4 is turned on. Since the current flowing through the inductor L cannot change abruptly, the current can flow sequentially through the first terminal Q41 of the fourth switch Q4, the inductor L, the third capacitor C3, and back to the second terminal Q42 of the fourth switch Q4, causing the inductor L to discharge.

[0055] Understandably, the loss of the fourth switch Q4 is less than that of the first diode D1. Therefore, replacing the first diode D1 with the fourth switch Q4 can reduce the loss of the BUCK converter circuit 110 and improve the power efficiency of the BUCK converter circuit 110.

[0056] In the embodiments of this application, taking the first switch Q1 as an example, when the first switch Q1 is turned on, the first end Q11 of the first switch Q1 is connected to the second end Q12 of the first switch Q1; when the first switch Q1 is turned off, the first end Q11 of the first switch Q1 is disconnected from the second end Q12 of the first switch Q1.

[0057] Understandably, the third capacitor C3 serves as a filter and energy storage unit. When the first switch Q1 is turned on, the DC power supply 230 can charge the inductor L and the third capacitor C3; when the first switch Q1 is turned off, the inductor L can charge the third capacitor C3, so that the voltage across the third capacitor C3 can remain stable or nearly stable.

[0058] The voltage across the third capacitor C3 is lower than the output voltage of the DC power supply 230, enabling the BUCK converter circuit 110 to perform DC-DC step-down conversion. In some examples, the load 220 is electrically connected to the third capacitor C3, allowing the BUCK converter circuit 110 to provide a stable DC voltage to the load 220. In some examples, the third capacitor C3 can be a ceramic capacitor (Multi-layer Ceramic Capacitor, abbreviated as MLCC).

[0059] The first switching transistor Q1 includes, but is not limited to, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The first switching transistor Q1 can be an N-channel MOSFET or a P-channel MOSFET. For example, the first switching transistor Q1 can also be a gallium nitride transistor or a transistor of carbide. When the first switching transistor Q1 is a MOSFET, its first terminal Q11 can be the source of the MOSFET, and its second terminal Q12 can be the drain of the MOSFET; alternatively, its first terminal Q11 can be the drain of the MOSFET, and its second terminal Q12 can be the source of the MOSFET.

[0060] The fourth switch Q4 includes, but is not limited to, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The fourth switch Q4 can be an N-channel MOSFET or a P-channel MOSFET. For example, the fourth switch Q4 can also be a gallium nitride transistor or a transistor of carbide. When the fourth switch Q4 is a MOSFET, its first terminal Q41 can be the source of the MOSFET, and its second terminal Q42 can be the drain of the MOSFET; alternatively, its first terminal Q41 can be the drain of the MOSFET, and its second terminal Q42 can be the source of the MOSFET. The type of the first switch Q1 can be the same as or different from the type of the fourth switch Q4.

[0061] Understandably, by controlling the on-time of the first switch Q1, the output voltage of the BUCK converter circuit 110 can be controlled. The longer the on-time of the first switch Q1, the longer the DC power supply 230 charges the inductor L and the third capacitor C3, and the higher the voltage across the third capacitor C3 (the output voltage of the BUCK converter circuit 110); the shorter the on-time of the first switch Q1, the shorter the charging time of the DC power supply 230 for the inductor L and the third capacitor C3, and the lower the voltage across the third capacitor C3 (the output voltage of the BUCK converter circuit 110).

[0062] In some examples, a first control signal (e.g., a PWM signal, short for Pulse Width Modulation) can be sent to the third terminal Q13 of the first switch Q1 to control the turn-on or turn-off of the first switch Q1. For example, the first switch Q1 can be turned on when a high-level signal is received at its third terminal Q13, and turned off when a low-level signal is received at its third terminal Q13.

[0063] When the BUCK converter circuit 110 includes a fourth switch Q4, a second control signal can also be sent to the third terminal Q43 of the fourth switch Q4 to control the conduction or de-conduction of the fourth switch Q4. For example, the fourth switch Q4 can be turned on when a high-level signal is received at the third terminal Q43 of the fourth switch Q4, and turned off when a low-level signal is received at the third terminal Q43 of the fourth switch Q4.

[0064] For example, when the first switch Q1 is a MOSFET, its third terminal Q13 can be the gate of the MOSFET. When the fourth switch Q4 is a MOSFET, its third terminal Q43 can be the gate of the MOSFET.

[0065] Figure 4 This is a schematic diagram of a BUCK converter provided in an embodiment of this application. Figure 5 A schematic diagram of another BUCK converter provided in an embodiment of this application is shown below. Figure 4 and Figure 5 An example is given to illustrate the method for generating the first control signal.

[0066] like Figure 4 As shown, in Figure 2 Based on the BUCK converter shown, the BUCK converter 100 also includes a sampling circuit 120 and a control signal generation circuit 130.

[0067] For example, such as Figure 4 As shown, the sampling circuit 120 includes a first voltage divider branch 121 and a second voltage divider branch 122. The first end of the first voltage divider branch 121 is electrically connected to the second end of the inductor L. The second end of the first voltage divider branch 121, the first end of the second voltage divider branch 122, and the first input terminal 130a1 of the control signal generation circuit 130 are electrically connected. The second end of the second voltage divider branch 122 is electrically connected to ground.

[0068] The output terminal 130b of the control signal generation circuit 130 is electrically connected to the third terminal Q13 of the first switching transistor Q1. The control signal generation circuit 130 is used to generate a first control signal based on the output voltage of the sampling circuit 120. The first control signal is used to control the first switching transistor Q1 to turn on or off.

[0069] Understandably, sampling circuit 120 can acquire the output voltage (voltage across the third capacitor C3) of BUCK converter circuit 110 through voltage division. In some examples, such as Figure 4 As shown, the first end of the first voltage divider branch 121 is the input terminal 120a of the sampling circuit 120, and the second end of the first voltage divider branch 121 and the first end of the second voltage divider branch 122 are the output terminals 120b of the sampling circuit 120.

[0070] The output voltage of sampling circuit 120 is proportional to the output voltage of BUCK converter circuit 110. The larger the output voltage of BUCK converter circuit 110, the larger the output voltage of sampling circuit 120; the smaller the output voltage of BUCK converter circuit 110, the smaller the output voltage of sampling circuit 120.

[0071] When the output voltage of the BUCK converter circuit 110 remains constant, the greater the voltage across the first voltage divider branch 121, the smaller the output voltage of the sampling circuit 120; conversely, the smaller the voltage across the first voltage divider branch 121, the greater the output voltage of the sampling circuit 120. Similarly, the greater the voltage across the second voltage divider branch 122, the greater the output voltage of the sampling circuit 120; and the smaller the voltage across the second voltage divider branch 122, the smaller the output voltage of the sampling circuit 120.

[0072] Understandably, the voltage across the first voltage divider branch 121 and the voltage across the second voltage divider branch 122 can be equal or unequal.

[0073] In some examples, such as Figure 5 As shown, the first voltage divider branch 121 includes a first resistor R1, and the second voltage divider branch includes a second resistor R2. The first end of the first resistor R1 is electrically connected to the second end of the inductor L, the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2, and the second end of the second resistor R2 is electrically connected to ground.

[0074] In some examples, the first resistor R1 can be a fixed resistor or a variable resistor; the second resistor R2 can also be a fixed resistor or a variable resistor. The resistance values ​​of the first resistor R1 and the second resistor R2 can be the same or different.

[0075] In this embodiment, the sampling circuit 120 can acquire the output voltage of the BUCK converter circuit 110 by means of resistor voltage division. The sampling circuit 120 does not require a complex circuit structure, has a simple structure, and saves the cost of the BUCK converter 100.

[0076] In other examples, the first voltage divider branch 121 may include multiple resistors connected in series, and the second voltage divider branch 122 may also include multiple resistors connected in series.

[0077] like Figure 4 As shown, the first input terminal 130a1 of the control signal generation circuit 130 is electrically connected to the second terminal of the first voltage divider branch 121 and the first terminal of the second voltage divider branch 122 (that is, the output terminal 120b of the sampling circuit 120), enabling the control signal generation circuit 130 to acquire the output voltage of the sampling circuit 120 and generate a first control signal based on the output voltage of the sampling circuit 120. The output terminal 130b of the control signal generation circuit 130 is electrically connected to the third terminal Q13 of the first switching transistor Q1, enabling the first control signal to control the first switching transistor Q1 to turn on or off.

[0078] Understandably, since the output voltage of the sampling circuit 120 is positively correlated with the output voltage of the BUCK converter circuit 110, the control signal generation circuit 130 generates a first control signal based on the output voltage of the sampling circuit 120. That is, the control signal generation circuit 130 can generate a first control signal based on the output voltage of the BUCK converter circuit 110. The first control signal controls the on / off state of the first switch Q1; that is, the first switch Q1 can be turned on / off based on the output voltage of the BUCK converter circuit 110, enabling the sampling circuit 120 and the control signal generation circuit 130 to achieve negative feedback control of the BUCK converter circuit 110.

[0079] In some examples, the duty cycle of the first control signal generated by the control signal generation circuit 130 is different when the output voltage of the sampling circuit 120 is different.

[0080] In some examples, the motherboard also includes a first reference voltage source 240 and a ramp signal generation circuit 250. For example... Figure 5 As shown, the control signal generation circuit 130 includes a differential compensation unit 131 and a pulse modulation unit 132.

[0081] The differential compensation unit 131 has its first input terminal 131a1 electrically connected to the first terminal of the second voltage divider branch 122 (i.e., the output terminal 120b of the sampling circuit 120), and its second input terminal 131a2 electrically connected to the output terminal of the first reference voltage source 240. The first reference voltage source 240 outputs a first reference voltage. The differential compensation unit 131 is used to calculate the difference between the output voltage of the first reference voltage source 240 and the output voltage of the sampling circuit 120, and to amplify and compensate for this difference to obtain the calculation result. For example, the calculation result is a voltage signal.

[0082] In some examples, the DC voltage required to supply power to a load of 220V can be referred to as the "target voltage". The first reference voltage is the voltage division of the target voltage by the second resistor R2. The value of the first reference voltage will vary depending on the resistance of the second resistor R2.

[0083] For example, when the resistance of the second resistor R2 is small, the value of the first reference voltage is small. When the resistance of the second resistor R2 is large, the value of the first reference voltage is large. It is understood that the embodiments of this application do not further limit the value of the first reference voltage.

[0084] The first input terminal 131a1 of the differential compensation unit 131 is the first input terminal 130a1 of the control signal generation circuit 130. The first input terminal 131a1 of the differential compensation unit 131 is electrically connected to the output terminal 120b of the sampling circuit 120, and the second input terminal 131a2 of the differential compensation unit 131 is connected to the output terminal of the first reference voltage source 240, so that the differential compensation unit 131 can calculate the difference between the first reference voltage and the output voltage of the sampling circuit 120.

[0085] Understandably, based on the relationship between the first reference voltage and the output voltage of the sampling circuit 120, the relationship between the output voltage of the BUCK converter circuit 110 and the target voltage can be obtained.

[0086] When the output voltage of the sampling circuit 120 is greater than the first reference voltage, the output voltage of the BUCK converter circuit 110 is greater than the target voltage; when the output voltage of the sampling circuit 120 is less than the first reference voltage, the output voltage of the BUCK converter circuit 110 is less than the target voltage; when the output voltage of the sampling circuit 120 is equal to the first reference voltage, the output voltage of the BUCK converter circuit 110 is equal to the target voltage.

[0087] In some examples, the state in which the output voltage of the BUCK converter circuit 110 is greater than the target voltage can be called "overshoot", and the state in which the output voltage of the BUCK converter circuit 110 is less than the target voltage can be called "undershoot".

[0088] When the first reference voltage is greater than the output voltage of the sampling circuit 120, the output voltage of the sampling circuit 120 is less than the first reference voltage. In this case, the BUCK converter circuit 110 is under-charged, and the differential compensation unit 131 outputs the first calculation result (first voltage signal). When the first reference voltage is less than the output voltage of the sampling circuit 120, the output voltage of the sampling circuit 120 is greater than the first reference voltage. In this case, the BUCK converter circuit 110 is over-charged, and the differential compensation unit 131 outputs the second calculation result (second voltage signal). Both the voltage values ​​of the first and second calculation results are positive, and the voltage value of the first calculation result is less than the voltage value of the second calculation result.

[0089] When the BUCK converter circuit 110 is undershooting, the smaller the output voltage of the sampling circuit 120, the smaller the voltage value of the first calculation result output by the differential compensation unit 131. When the BUCK converter circuit 110 is overshooting, the larger the output voltage of the sampling circuit 120, the larger the voltage value of the second calculation result output by the differential compensation unit 131.

[0090] Understandably, when the first reference voltage is equal to the output voltage of the sampling circuit 120, the voltage value of the calculated result output by the differential compensation unit 131 is zero.

[0091] like Figure 5 As shown, the first input terminal 132a1 of the pulse modulation unit 132 is electrically connected to the output terminal 131b of the differential compensation unit 131, and the second input terminal 132a2 of the pulse modulation unit 132 is electrically connected to the output terminal of the ramp signal generation circuit 250. The output terminal 132b of the pulse modulation unit 132 is electrically connected to the third terminal Q13 of the first switching transistor Q1.

[0092] The ramp signal generation circuit 250 is used to generate and output a ramp signal. The pulse modulation unit 132 is used to generate a first control signal based on the calculation result and the ramp signal. The difference between the peak voltage of the ramp signal and the voltage of the calculation result output by the differential compensation unit 131 is positively correlated with the duty cycle of the first control signal. The first switch Q1 is turned on or off based on the control of the first control signal.

[0093] Understandably, the pulse modulation unit 132 can acquire the calculation results (including the first calculation result and the second calculation result) output by the differential compensation unit 131, and perform ramp modulation on the calculation results to generate the first control signal.

[0094] The peak voltage of the ramp signal is greater than the voltage of the calculated result (including the first calculation result and the second calculation result) output by the differential compensation unit 131. The greater the difference between the peak voltage of the ramp signal and the voltage of the calculated result output by the differential compensation unit 131, the larger the duty cycle of the first control signal. The smaller the difference between the peak voltage of the ramp signal and the voltage of the calculated result output by the differential compensation unit 131, the smaller the duty cycle of the first control signal.

[0095] The larger the duty cycle of the first control signal, the longer the charging time of the DC power supply 230 to the inductor L and the third capacitor C3, and the larger the DC voltage output by the BUCK converter circuit 110; conversely, the smaller the duty cycle of the first control signal, the shorter the charging time of the DC power supply 230 to the inductor L and the third capacitor C3, and the smaller the DC voltage output by the BUCK converter circuit 110.

[0096] Figure 6This is a schematic diagram illustrating the voltage relationship between a ramp signal and a calculation result, provided as an embodiment of this application.

[0097] Example, Figure 6 The curve RAMP shows a schematic diagram of the ramp signal. The straight line VC1 shows the voltage value of the first calculated result output by the differential compensation unit 131 when the BUCK converter circuit 110 is undershooting; the straight line VC2 shows the voltage value of the second calculated result output by the differential compensation unit 131 when the BUCK converter circuit 110 is overshooting.

[0098] Understandably, when the voltage across the third capacitor C3 changes, the output voltage of the sampling circuit 120 will change, causing the voltage values ​​of the calculation results (including the first and second calculation results) to also change. Figure 6 The following example illustrates this point: the voltage values ​​from the first and second calculations stabilize at two specific voltage values.

[0099] When the BUCK converter circuit 110 is undershooting, the voltage across the third capacitor C3 is less than the target voltage, and the output voltage of the sampling circuit 120 is less than the first reference voltage. At this time, the voltage value VC1 of the first calculation result output by the differential compensation unit 131 is the calculation result (first calculation result) obtained after amplifying and compensating the difference between the first reference voltage and the output voltage of the sampling circuit 120.

[0100] The difference between the peak voltage of the ramp signal RAMP and the voltage of the calculated result (first calculation result) output by the differential compensation unit 131 is large, the duty cycle of the first control signal generated by the pulse modulation unit 132 is large, and the charging time of the DC power supply 230 for the inductor L and the third capacitor C3 is long.

[0101] When the BUCK converter circuit 110 overshoots, the voltage across the third capacitor C3 is greater than the target voltage, and the output voltage of the sampling circuit 120 is greater than the first reference voltage. At this time, the voltage value VC2 of the second calculation result output by the differential compensation unit 131 is the calculation result (second calculation result) obtained after amplifying and compensating the difference between the first reference voltage and the output voltage of the sampling circuit 120.

[0102] The difference between the peak voltage of the ramp signal RAMP and the voltage of the calculated result (second calculation result) output by the differential compensation unit 131 is small, the duty cycle of the first control signal generated by the pulse modulation unit 132 is small, and the charging time of the DC power supply 230 for the inductor L and the third capacitor C3 is short.

[0103] That is, the duty cycle of the first control signal can change with the voltage value of the calculation result (including the first calculation result and the second calculation result) output by the differential compensation unit 131, so that the duty cycle of the first control signal can change with the output voltage of the BUCK conversion circuit 110, thereby enabling the sampling circuit 120 and the control signal generation circuit 130 to achieve negative feedback control of the BUCK conversion circuit 110.

[0104] Figure 7 A schematic diagram of the circuit topology of a BUCK converter provided in an embodiment of this application is shown below. Figure 7 The topology of the control signal generation circuit 130 and the differential compensation unit 131 will be described.

[0105] like Figure 7 As shown, the differential compensation unit 131 includes a first operational amplifier OP1. The pulse modulation unit 132 includes a second operational amplifier OP2.

[0106] The first input terminal of the first operational amplifier OP1 is electrically connected to the first terminal of the second voltage divider branch 122, and the second input terminal of the first operational amplifier OP1 is electrically connected to the output terminal of the first reference voltage source 240. The output terminal of the first operational amplifier OP1 is electrically connected to the first input terminal of the second operational amplifier OP2, and the second input terminal of the second operational amplifier OP2 is electrically connected to the output terminal of the ramp signal generation circuit 250. The output terminal of the second operational amplifier OP2 is electrically connected to the third terminal Q13 (gate) of the first switching transistor Q1.

[0107] For example, such as Figure 7 As shown, the first input terminal of the first operational amplifier OP1 is the inverting input terminal of the first operational amplifier OP1, and the second input terminal of the first operational amplifier OP1 is the non-inverting input terminal of the first operational amplifier OP1. The first input terminal of the second operational amplifier OP2 is the inverting input terminal of the second operational amplifier OP2, and the second input terminal of the second operational amplifier OP2 is the non-inverting input terminal of the second operational amplifier OP2.

[0108] As a differential operational amplifier, the first operational amplifier OP1 can calculate the difference between the voltage value at the non-inverting input terminal (second input terminal) and the voltage value at the inverting input terminal (first input terminal) of the first operational amplifier OP1, and amplify and compensate the obtained difference to obtain the calculation result.

[0109] In some examples, the first operational amplifier OP1 can be a single-supply operational amplifier, with one power supply terminal of the first operational amplifier OP1 electrically connected to the operating power supply (not shown in the figure), and the other power supply terminal of the first operational amplifier OP1 grounded. For example, the operating power supply is capable of providing a 12V operating voltage to the first operational amplifier OP1.

[0110] like Figure 7 As shown, the differential compensation unit 131 also includes a fifth resistor R5 and a fourth capacitor C4. The first terminal of the fourth capacitor C4 is electrically connected to the first input terminal (inverting input terminal) of the first operational amplifier OP1, the second terminal of the fourth capacitor C4 is electrically connected to the first terminal of the fifth resistor R5, and the second terminal of the fifth resistor R5 is electrically connected to the output terminal of the first operational amplifier OP1.

[0111] By setting a fifth resistor R5 and a fourth capacitor C4 in series, two things can be achieved: firstly, it can act as a filter, reducing the noise in the calculation results obtained by the first operational amplifier OP1; secondly, it can compensate for the calculation results obtained by the first operational amplifier OP1, reducing the error in the calculation results and improving the accuracy of the calculation results.

[0112] For example, the fifth resistor R5 can be a fixed resistor or a variable resistor.

[0113] like Figure 7 As shown, the first input terminal of the second operational amplifier OP2 is electrically connected to the output terminal of the first operational amplifier OP1, and the second input terminal of the second operational amplifier OP2 is electrically connected to the output terminal of the ramp signal generation circuit 250. This allows the second operational amplifier OP2 to receive the calculation result output by the first operational amplifier OP1 and the ramp signal generated by the ramp signal generation circuit 250. The second operational amplifier OP2 can calculate the difference between the peak voltage of the ramp signal and the voltage value of the calculation result output by the first operational amplifier OP1 (including the first calculation result and the second calculation result), and determine the duty cycle of the first control signal based on the difference between the peak voltage of the ramp signal and the voltage value of the calculation result output by the first operational amplifier OP1, thereby controlling the on or off state of the first switching transistor Q1.

[0114] In some examples, the second operational amplifier OP2 can be a single-supply operational amplifier, with one power supply terminal electrically connected to the operating power supply (not shown in the figure) and the other power supply terminal grounded. For example, the operating power supply can provide a 12V operating voltage to the second operational amplifier OP2.

[0115] The differential compensation unit 131 includes a first operational amplifier OP1, and the pulse modulation unit 132 includes a second operational amplifier OP2. The first operational amplifier OP1 can calculate the difference between the first reference voltage and the output voltage of the sampling circuit 120, and compensate and amplify the difference between the first reference voltage and the output voltage of the sampling circuit 120 to obtain a first calculation result. The second operational amplifier OP2 can perform ramp modulation on the first calculation result to generate a first control signal, thereby controlling the conduction or disconnection of the first switching transistor Q1 to realize negative feedback control of the BUCK converter circuit 110.

[0116] In servers, an increasing number of loads (220) require low voltage, low current, and high dynamic range power supply. For example, the voltage requirement of a load (220) is approximately 1V, the current requirement ranges from 10A to 20A, and the current slope flowing through the load (220) can reach over 50A / μs (amperes per microsecond). Taking a southbridge chip as an example, the maximum step size of the current change (the maximum change in current flowing through the southbridge chip in each change) can reach 12A, and the current slope flowing through the southbridge chip can reach 74A / μs.

[0117] Understandably, when the current flowing through load 220 increases rapidly, the energy demand of load 220 increases rapidly; conversely, when the current flowing through load 220 decreases rapidly, the energy demand of load 220 decreases rapidly. Since the BUCK converter circuit 110 is electrically connected to load 220, rapid changes in the energy demand of load 220 (e.g., rapid increase or rapid decrease) will cause fluctuations in the output voltage of the BUCK converter circuit 110.

[0118] For example, when the third capacitor C3 discharges to the load 220 and the current flowing through the load 220 increases rapidly, the amount of discharge from the third capacitor C3 to the load 220 will increase, causing the voltage across the third capacitor C3 to decrease; when the third capacitor C3 discharges to the load 220 and the current flowing through the load 220 decreases rapidly, the amount of discharge from the third capacitor C3 to the load 220 will decrease, causing the voltage across the third capacitor C3 to increase.

[0119] However, the BUCK converter has poor dynamic response capability due to the output sampling feedback control scheme. It cannot meet the power supply requirements of the load under dynamic conditions, which causes the output voltage of the third capacitor to fluctuate. As a result, the BUCK converter circuit cannot provide a stable DC voltage to the load.

[0120] In some examples, the dynamic response capability of the BUCK converter is required so that the BUCK converter circuit can still provide a stable or near-stable DC voltage to the load when the load is dynamic (i.e., when the current flowing through the load changes rapidly).

[0121] In related technologies, one approach is to use multiple ceramic capacitors connected in parallel to form an energy storage capacitor (third capacitor), thereby increasing the capacitance of the energy storage capacitor, reducing the impact of changes in the current flowing through the load on the voltage across the energy storage capacitor, improving the dynamic response capability of the BUCK converter circuit, and thus improving the dynamic response capability of the BUCK converter 100.

[0122] However, because the load demands high dynamic response from the BUCK converter circuit, and ceramic capacitors typically exhibit capacitance decay, a large number of ceramic capacitors need to be connected in parallel to meet the load's dynamic response requirements. Connecting a large number of ceramic capacitors in parallel not only increases the cost of the BUCK converter circuit, thus increasing the overall cost of the BUCK converter, but also increases the layout area of ​​the BUCK converter circuit, which is detrimental to the miniaturization of the BUCK converter.

[0123] On the other hand, a combination of a digital multi-phase controller (DMC) and a driver-MOSFET (DMOS) can be used to improve the dynamic response of the BUCK converter.

[0124] For example, a BUCK converter may include multiple BUCK converter circuits connected in parallel. The input of a DRMOS is electrically connected to a DC power supply, and the multiple outputs of the DRMOS are respectively electrically connected to the multiple parallel BUCK converter circuits. A multiphase controller sends control signals to the DRMOS to control its on / off state, thereby enabling individual control of the on / off state between the multiple parallel BUCK converter circuits and the DC power supply. This allows for control of the BUCK converter's output voltage, improving its dynamic response capability.

[0125] In the above implementation, although it is not necessary to set up a large number of ceramic capacitors in parallel, setting up multi-phase controllers and DRMOS will still increase the cost of the BUCK converter; and it will also increase the size of the BUCK converter, which is not conducive to the miniaturization of the BUCK converter.

[0126] To address the aforementioned issues, this application provides a BUCK converter. Figure 8 This is a schematic diagram of another BUCK converter provided in an embodiment of this application. Figure 9This is a schematic diagram of another BUCK converter provided in an embodiment of this application. Figure 10 This is a schematic diagram of a sampling circuit and a sampling adjustment circuit provided in an embodiment of this application. Figure 11 A schematic diagram of another BUCK converter provided in an embodiment of this application.

[0127] like Figure 8 As shown, the BUCK converter 100 also includes a sampling adjustment circuit 140. See below for reference. Figures 8-11 The sampling adjustment circuit 140 will be illustrated with an example.

[0128] like Figure 8 As shown, the sampling adjustment circuit 140 includes a first sampling adjustment circuit 141 and / or a second sampling adjustment circuit 142. When the sampling adjustment circuit 140 includes the first sampling adjustment circuit 141, the first sampling adjustment circuit 141 is connected in parallel with the first voltage divider branch 121 to increase the output voltage of the sampling circuit 120. When the sampling adjustment circuit 140 includes the second sampling adjustment circuit 142, the second sampling adjustment circuit 142 is connected in parallel with the second voltage divider branch 122 to decrease the output voltage of the sampling circuit 120.

[0129] When the sampling adjustment circuit 140 includes a first sampling adjustment circuit 141, the first terminal of the first sampling adjustment circuit 141 is electrically connected to the first terminal of the first voltage divider branch 121, and the second terminal of the first sampling adjustment circuit 141 is electrically connected to the second terminal of the first voltage divider branch 121, so that the first sampling adjustment circuit 141 can be connected in parallel with the first voltage divider branch 121. Understandably, the resistance value of the first sampling adjustment circuit 141 after being connected in parallel with the first voltage divider branch 121 is less than the resistance value of the first voltage divider branch 121, thus increasing the output voltage of the sampling circuit 120.

[0130] When the sampling adjustment circuit 140 includes a second sampling adjustment circuit 142, the first terminal of the second sampling adjustment circuit 142 is electrically connected to the first terminal of the second voltage divider branch 122, and the second terminal of the second sampling adjustment circuit 142 is electrically connected to the second terminal of the second voltage divider branch 122, so that the second sampling adjustment circuit 142 can be connected in parallel with the second voltage divider branch 122. Understandably, the resistance value of the second sampling adjustment circuit 142 after being connected in parallel with the second voltage divider branch 122 is less than the resistance value of the second voltage divider branch 122, thus reducing the output voltage of the sampling circuit 120.

[0131] When the BUCK converter circuit 110 overshoots, the differential compensation unit 131 outputs the second calculation result. Furthermore, the larger the output voltage of the sampling circuit 120, the larger the voltage value of the second calculation result, and the smaller the duty cycle of the first control signal generated by the pulse modulation unit 132.

[0132] Therefore, when the BUCK converter circuit 110 overshoots, the first sampling adjustment circuit 141 can be connected in parallel with the first voltage divider branch 121, so that the output voltage of the sampling circuit 120 can be increased, further increasing the voltage value of the second calculation result, reducing the duty cycle of the first control signal generated by the pulse modulation unit 132, so that the output voltage of the BUCK converter circuit 110 can be reduced rapidly, thereby improving the dynamic response capability of the BUCK converter 100.

[0133] Similarly, when the BUCK converter circuit 110 is undershooting, the differential compensation unit 131 outputs the first calculation result. Furthermore, the smaller the output voltage of the sampling circuit 120, the smaller the voltage value of the first calculation result, and the larger the duty cycle of the first control signal generated by the pulse modulation unit 132.

[0134] Therefore, when the BUCK converter circuit 110 is undershooting, the second sampling adjustment circuit 142 can be connected in parallel with the second voltage divider branch 122, so that the output voltage of the sampling circuit 120 can be reduced, further reducing the voltage value of the first calculation result, increasing the duty cycle of the first control signal generated by the pulse modulation unit 132, so that the output voltage of the BUCK converter circuit 110 can be rapidly increased, thereby improving the dynamic response capability of the BUCK converter 100.

[0135] That is, the sampling adjustment circuit 140 can increase and / or decrease the output voltage of the sampling circuit 120, thereby changing the duty cycle of the first control signal generated by the pulse modulation unit 132 of the control signal generation circuit 130, so that the output voltage of the BUCK converter circuit 110 can change rapidly, improving the dynamic response capability of the BUCK converter 100.

[0136] For example, such as Figure 9 As shown, the sampling circuit 120 includes a first resistor R1 and a second resistor R2. When the sampling adjustment circuit 140 includes a first sampling adjustment circuit 141, the first sampling adjustment circuit 141 is connected in parallel with the first resistor R1; when the sampling adjustment circuit 140 includes a second sampling adjustment circuit 142, the second sampling adjustment circuit 142 is connected in parallel with the second resistor R2.

[0137] This configuration allows the sampling adjustment circuit 140 to increase and / or decrease the output voltage of the sampling circuit 120, thereby changing the duty cycle of the first control signal generated by the pulse modulation unit 132 of the control signal generation circuit 130 and improving the dynamic response capability of the BUCK converter 100.

[0138] In the embodiments of this application, the first input terminal 130a1 of the control signal generation circuit 130 is electrically connected to the second terminal of the first voltage divider branch 121 and the first terminal of the second voltage divider branch 122 (that is, the output terminal 120b of the sampling circuit 120), so that the control signal generation circuit 130 can obtain the output voltage of the sampling circuit 120 and generate a first control signal based on the output voltage of the sampling circuit 120 to control the first switching transistor Q1 to turn on or off, thereby realizing negative feedback control of the BUCK converter circuit 110.

[0139] Furthermore, the sampling adjustment circuit 140 includes a first sampling adjustment circuit 141 and / or a second sampling adjustment circuit 142. The first sampling adjustment circuit 141 is connected in parallel with the first voltage divider branch 121 to increase the output voltage of the sampling circuit 120; the second sampling adjustment circuit 142 is connected in parallel with the second voltage divider branch 122 to decrease the output voltage of the sampling circuit 120. This allows the sampling adjustment circuit 140 to increase and / or decrease the output voltage of the sampling circuit 120, thereby changing the duty cycle of the first control signal generated by the control signal generation circuit 130. This enables the output voltage of the BUCK converter circuit 110 to change rapidly, improving the dynamic response capability of the BUCK converter 100 and enabling the BUCK converter 100 to provide a stable DC voltage to the load 220.

[0140] By setting up a sampling adjustment circuit 140, the dynamic response capability of the BUCK converter can be improved. On the one hand, there is no need to set up a large number of ceramic capacitors, and on the other hand, there is no need to set up a multi-phase controller or DRMOS, etc. The structure is simple, the cost of the BUCK converter is reduced, and it is conducive to the miniaturization of the BUCK converter.

[0141] For example, when the load 220 is in a dynamic state, the output voltage of the BUCK converter circuit 110 changes significantly, resulting in a significant change in the output voltage of the sampling circuit 120. When the load 220 is in a steady state, the output voltage of the BUCK converter circuit 110 changes less significantly, resulting in a less significant change in the output voltage of the sampling circuit 120.

[0142] In some examples, when load 220 is in a dynamic state, the output voltage of sampling circuit 120 is outside the set voltage range. When load 220 is in a steady state, the output voltage of sampling circuit 120 is within the set voltage range. For example, when load 220 is in a dynamic state, the output voltage of sampling circuit 120 can be the maximum value in the set voltage range (BUCK converter 110 overshoot) or less than the minimum value in the set voltage range (BUCK converter 110 undershoot).

[0143] For example, the motherboard includes a second reference voltage source 260. (As shown) Figure 10As shown, when the sampling adjustment circuit 140 includes a first sampling adjustment circuit 141, the first sampling adjustment circuit 141 includes a first comparison unit 1411, a first switching unit 1412, and a first adjustment unit 1413. The first input terminal 1411a1 of the first comparison unit 1411 is electrically connected to the second terminal of the first voltage divider branch 121. The second input terminal 1411a2 of the first comparison unit 1411 is electrically connected to the second reference voltage source 260. The output terminal 1411b of the first comparison unit 1411 is electrically connected to the third terminal of the first switching unit 1412. The first terminal of the first switching unit 1412 is electrically connected to the first terminal of the first adjustment unit 1413. The second terminal of the first switching unit 1412 is electrically connected to the second terminal of the first voltage divider branch 121. The second terminal of the first adjustment unit 1413 is electrically connected to the first terminal of the first voltage divider branch 121.

[0144] like Figure 10 As shown, the first adjustment unit 1413 and the first switch unit 1412 can be connected in series, and when the first switch unit 1412 is turned on, the first adjustment unit 1413 can be connected in parallel with the first voltage divider branch 121 (first resistor R1) to increase the output voltage of the sampling circuit 120.

[0145] The first comparison unit 1411 can compare the voltage value at the second end of the first voltage divider branch 121 (the first resistor R1) (that is, the output voltage of the sampling circuit 120) with the second reference voltage output by the second reference voltage source 260. For example, the second reference voltage is the maximum value in the set voltage range, so that the first comparison unit 1411 can compare the output voltage of the sampling circuit 120 with the maximum value in the set voltage range.

[0146] When the load 220 is in a dynamic state and the output voltage of the sampling circuit 120 is greater than the second reference voltage (i.e., the maximum value in the set voltage range), the first comparison unit 1411 can output a first comparison result. For example, the first comparison result can be a level signal, such as a high-level signal or a low-level signal.

[0147] The third terminal of the first switching unit 1412 can be the control terminal of the first switching unit 1412. The first switching unit 1412 can receive the first comparison result output by the first comparison unit 1411 and conduct based on the first comparison result, so that the first adjustment unit 1413 can be connected in parallel with the first voltage divider branch 121 (first resistor R1) to increase the output voltage of the sampling circuit 120, increase the voltage value of the second calculation result output by the differential compensation unit 131, and decrease the duty cycle of the first control signal generated by the pulse modulation unit 132, so that the output voltage of the BUCK converter circuit 110 can be reduced rapidly, thereby improving the dynamic response capability of the BUCK converter 100.

[0148] When the load 220 is in a steady state (when the BUCK converter circuit 110 has no undershoot or overshoot), the output voltage of the sampling circuit 120 is less than the second reference voltage (that is, the maximum value in the set voltage range). The first switching unit 1412 can be disconnected, so that the first adjustment unit 1413 can be disconnected from the first voltage divider branch 121 (first resistor R1). This avoids the first adjustment unit 1413 affecting the output voltage of the BUCK converter circuit 110 when the load 220 is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter 100 when the load 220 is in a steady state, and improves the stability of the output voltage of the BUCK converter 100.

[0149] In some examples, such as Figure 11 As shown, the first comparison unit 1411 includes a first comparator OP3. The first switching unit 1412 includes a second switching transistor Q2. The first adjustment unit 1413 includes a third resistor R3. The first input terminal of the first comparator OP3 is electrically connected to the second terminal of the first resistor R1. Figure 11 (Not shown in the diagram). The second input terminal of the first comparator OP3 is electrically connected to the output terminal of the second reference voltage source 260. The output terminal of the first comparator OP3 is electrically connected to the third terminal Q23 (gate) of the second switch Q2. The first terminal Q21 of the second switch Q2 is electrically connected to the first terminal of the third resistor R3. The second terminal Q22 of the second switch Q2 is electrically connected to the second terminal of the first resistor R1. The second terminal of the third resistor R3 is electrically connected to the first terminal of the first resistor R1.

[0150] For example, such as Figure 11 As shown, the first comparator OP3 can be the third operational amplifier. The first input terminal of the first comparator OP3 is the non-inverting input terminal of the third operational amplifier, and the second input terminal of the first comparator OP3 can be the inverting input terminal of the operational amplifier.

[0151] For example, the first comparator OP3 can be a single-supply operational amplifier, that is, one power supply terminal of the third operational amplifier is electrically connected to the operating power supply (not shown in the figure), and the other power supply terminal is grounded.

[0152] It should be noted that, in order to simplify the accompanying drawings, Figure 11 The electrical connection between the first input terminal of the first comparator OP3 and the second terminal of the first resistor R1 is not shown.

[0153] The first input terminal of the first comparator OP3 is electrically connected to the second terminal of the first resistor R1 (i.e., the output terminal of the sampling circuit 120), and the second input terminal of the first comparator OP3 is electrically connected to the output terminal of the second reference voltage source 260. This allows the first comparator OP3 to compare the output voltage of the sampling circuit 120 with the second reference voltage, and generate and output a first comparison result when the output voltage of the sampling circuit 120 is greater than the second reference voltage (the maximum value in the set voltage range). For example, the first comparison result is a high-level signal.

[0154] The output of the first comparator OP3 is electrically connected to the third terminal Q23 (gate) of the second switch Q2, so that the comparison result output by the first comparator OP3 can control the conduction or de-conduction of the second switch Q2. Understandably, when the output voltage of the sampling circuit 120 is greater than the second reference voltage, the BUCK converter 110 overshoots, the first comparator OP3 outputs the first comparison result, and the second switch Q2 can conduct, allowing the third resistor R3 to be connected in parallel with the first resistor R1. This increases the output voltage of the sampling circuit 120, increases the voltage value of the second calculation result output by the differential compensation unit 131, decreases the duty cycle of the first control signal generated by the pulse modulation unit 132, and allows the output voltage of the BUCK converter 110 to decrease rapidly, improving the dynamic response capability of the BUCK converter 100.

[0155] When the load 220 is in a steady state, the second switch Q2 can be turned off, which allows the third resistor R3 to be disconnected from the first resistor R1. This avoids the third resistor R3 affecting the output voltage of the sampling circuit 120 when the load 220 is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter 100 when the load 220 is in a steady state, and improves the stability of the output voltage of the BUCK converter 100.

[0156] The second switch Q2 includes, but is not limited to, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The second switch Q2 can be an N-channel MOSFET or a P-channel MOSFET. For example, the second switch Q2 can also be a gallium nitride transistor or a transistor of carbide. When the second switch Q2 is a MOSFET, its first terminal Q21 can be the source of the MOSFET, and its second terminal Q22 can be the drain of the MOSFET; alternatively, its first terminal Q21 can be the drain of the MOSFET, and its second terminal Q22 can be the source of the MOSFET. The third terminal Q23 of the second switch Q2 is the gate of the MOSFET.

[0157] In some examples, the second switch Q2 can be a signal-level MOSFET, that is, the second switch Q2 has a faster response speed, which improves the dynamic response capability of the BUCK converter 100.

[0158] In some examples, such as Figure 11 As shown, the first adjustment unit 1413 also includes a first capacitor C1 and a second capacitor C2. The second terminal of the third resistor R3 is electrically connected to the first terminal of the first capacitor C1, and the second terminal of the first capacitor C1 is electrically connected to the first terminal of the first resistor R1. The first terminal of the second capacitor C2 is electrically connected to the first terminal of the third resistor R3, and the second terminal of the second capacitor C2 is electrically connected to the second terminal of the first capacitor C1.

[0159] This configuration allows the third resistor R3, the first capacitor C1, and the second capacitor C2 to form a Type II compensation network, thereby increasing the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120, and the control signal generation circuit 130. Understandably, the greater the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120, and the control signal generation circuit 130, the stronger the dynamic response capability of the BUCK converter 100.

[0160] In this way, when the load 220 is in a dynamic state and the output voltage of the sampling circuit 120 is greater than the maximum value in the set voltage range (the second reference voltage), the second switch Q2 is turned on, and the first adjustment unit 1413 can be connected in parallel with the sampling circuit 120, so that the first adjustment unit 1413 can increase the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120 and the control signal generation circuit 130, thereby improving the dynamic response capability of the BUCK converter 100.

[0161] That is, when the output voltage of the sampling circuit 120 is greater than the maximum value in the set voltage range, the first adjustment unit 1413 is connected in parallel with the sampling circuit 120. On the one hand, the first adjustment unit 1413 can increase the output voltage of the sampling circuit 120, thereby reducing the duty cycle of the first control signal and improving the dynamic response capability of the BUCK converter 100. On the other hand, the first adjustment unit 1413 can increase the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120 and the control signal generation circuit 130, further improving the dynamic response capability of the BUCK converter 100, so that the BUCK converter 100 can meet the power supply requirements of the load 220 under dynamic conditions.

[0162] Understandably, when the load 220 is in a steady state, the second switch Q2 is turned off, which allows the first regulation unit 1413 to be disconnected from the sampling circuit 120, thus avoiding the influence of the first regulation unit 1413 on the loop gain of the BUCK converter circuit 110, thereby reducing the fluctuation of the output voltage of the BUCK converter 100 when the load 220 is in a steady state.

[0163] Understandably, by setting the first adjustment unit 1413, a type II compensation network can be formed. When the load 220 is in a dynamic state and the BUCK converter circuit 110 is overcharged, the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120, and the control signal generation circuit 130 can be greater than the loop gain of the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120, and the control signal generation circuit 130 when the load 220 is in a steady state. This allows the feedback loop composed of the BUCK converter circuit 110, the sampling circuit 120, and the control signal generation circuit 130 to achieve a stepped gain, thus meeting the power supply requirements of the load 220 under different states (dynamic and steady state).

[0164] Understandably, the capacitance value of the first capacitor C1 can be the same as or different from the capacitance value of the second capacitor C2. The third resistor R3 can be a fixed resistor or a variable resistor.

[0165] For example, the motherboard includes a third reference voltage source 270. In some examples, such as... Figure 10 As shown, when the sampling adjustment circuit 140 includes a second sampling adjustment circuit 142, the second sampling adjustment circuit 142 includes a second comparison unit 1421, a second switching unit 1422, and a second adjustment unit 1423. The first input terminal 1421a1 of the second comparison unit 1421 is electrically connected to the third reference voltage source 270. The second input terminal 1421a2 of the second comparison unit 1421 is electrically connected to the first terminal of the second voltage divider branch 122. The output terminal 1421b of the second comparison unit 1421 is electrically connected to the third terminal of the second switching unit 1422. The first terminal of the second switching unit 1422 is electrically connected to the first terminal of the second adjustment unit 1423, and the second terminal of the second switching unit 1422 is electrically connected to ground. The second terminal of the second adjustment unit 1423 is electrically connected to the first terminal of the second voltage divider branch 122.

[0166] like Figure 10 As shown, the second adjustment unit 1423 can be connected in series with the second switch unit 1422, and when the second switch unit 1422 is turned on, the second adjustment unit 1423 can be connected in parallel with the second voltage divider branch 122 (second resistor R2) to reduce the output voltage of the sampling circuit 120.

[0167] For example, the second terminal of the second switching unit 1422 can be electrically connected to the second terminal of the second voltage divider branch 122. Since the second terminal of the second voltage divider branch 122 is electrically connected to ground, the second terminal of the second switching unit 1422 can be electrically connected to ground.

[0168] The second comparison unit 1421 can compare the voltage value at the first end of the second voltage divider branch 122 (the second resistor R2) (that is, the output voltage of the sampling circuit 120) with the third reference voltage output by the third reference voltage source 270. For example, the third reference voltage can be the minimum value in the set voltage range. That is, the second comparison unit 1421 can compare the output voltage of the sampling circuit 120 with the minimum value in the set voltage range.

[0169] When the load 220 is in a dynamic state and the output voltage of the sampling circuit 120 is less than the third reference voltage (i.e., the minimum value in the set voltage range), the second comparison unit 1421 can output a second comparison result. For example, the second comparison result can be a level signal, such as a high-level signal or a low-level signal.

[0170] The third terminal of the second switching unit 1422 can be the control terminal of the second switching unit 1422. The second switching unit 1422 can receive the second comparison result output by the second comparison unit 1421 and conduct based on the second comparison result, so that the second adjustment unit 1423 can be connected in parallel with the second voltage divider branch 122 (second resistor R2) to reduce the output voltage of the sampling circuit 120, reduce the voltage value of the first calculation result output by the differential compensation unit 131, increase the duty cycle of the first control signal generated by the pulse modulation unit 132, so that the output voltage of the BUCK converter circuit 110 can increase rapidly and improve the dynamic response capability of the BUCK converter 100.

[0171] When the load 220 is in a steady state (when the BUCK converter circuit 110 has no undershoot or overshoot), the output voltage of the sampling circuit 120 is greater than the third reference voltage (that is, the minimum value in the set voltage range). The second switching unit 1422 can be disconnected, so that the second adjustment unit 1423 can be disconnected from the second voltage divider branch 122 (the second resistor R2). This avoids the second adjustment unit 1423 affecting the output voltage of the BUCK converter circuit 110 when the load 220 is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter 100 when the load 220 is in a steady state, and improves the stability of the output voltage of the BUCK converter 100.

[0172] The first comparison unit 1411 and the second comparison unit 1421 are configured so that the sampling adjustment circuit 140 can compare the output voltage of the sampling circuit 120 with the maximum value (second reference voltage) and the minimum value (third reference voltage) in the set voltage range, respectively. When the output voltage of the sampling circuit 120 is greater than the maximum value in the set voltage range, the first adjustment unit 1413 is connected in parallel with the first resistor R1. When the output voltage of the sampling circuit 120 is less than the minimum value in the set voltage range, the second adjustment unit 1423 is connected in parallel with the second resistor R2. This controls the duty cycle of the first control signal and improves the dynamic response capability of the BUCK converter 100.

[0173] In the embodiments of this application, when the load 220 is in a dynamic state, if the BUCK converter circuit 110 overshoots, the first switching unit 1412 can be turned on, so that the first adjustment unit 1413 can be connected in parallel with the first voltage divider branch 121 to increase the output voltage of the sampling circuit 120; if the BUCK converter circuit 110 undershoots, the second switching unit 1422 can be turned on, so that the second adjustment unit 1423 can be connected in parallel with the second voltage divider branch 122 to reduce the output voltage of the sampling circuit 120, so that the output voltage of the BUCK converter circuit 110 can change rapidly, thereby improving the dynamic response capability of the BUCK converter 100.

[0174] When the load 220 is in a steady state, the switching unit (including the first switching unit 1412 and the second switching unit 1422) can be disconnected, so that the regulating unit (including the first regulating unit 1413 and the second regulating unit 1423) can be disconnected from the sampling circuit 120. This avoids the regulating unit affecting the output voltage of the BUCK converter circuit 110 when the load 220 is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter 100 when the load 220 is in a steady state, and improves the stability of the output voltage of the BUCK converter 100.

[0175] Understandably, when the regulating unit (including the first regulating unit 1413 and the second regulating unit 1423) is connected in parallel with the voltage divider branch (including the first voltage divider branch 121 and the second voltage divider branch 122), the dynamic response capability of the BUCK converter 100 is greater than that when the regulating unit (including the first regulating unit 1413 and the second regulating unit 1423) is disconnected from the voltage divider branch (including the first voltage divider branch 121 and the second voltage divider branch 122), thus meeting the needs of the load 220 under different conditions.

[0176] In some examples, such as Figure 11As shown, the second comparison unit 1421 includes a second comparator OP4. The second switching unit 1422 includes a third switching transistor Q3. The second adjustment unit 1423 includes a fourth resistor R4. The first input terminal of the second comparator OP4 is electrically connected to the output terminal of the third reference voltage source 270, the second input terminal of the second comparator OP4 is electrically connected to the first terminal of the second resistor R2, and the output terminal of the second comparator OP4 is electrically connected to the third terminal Q33 of the third switching transistor Q3. The first terminal Q31 of the third switching transistor Q3 is electrically connected to the first terminal of the fourth resistor R4, the second terminal Q32 of the third switching transistor Q3 is electrically connected to ground, and the second terminal of the fourth resistor R4 is electrically connected to the first terminal of the second resistor R2.

[0177] For example, such as Figure 11 As shown, the second comparator OP4 can be the fourth operational amplifier. The first input terminal of the second comparator OP4 is the non-inverting input terminal of the fourth operational amplifier, and the second input terminal of the second comparator OP4 can be the inverting input terminal of the operational amplifier.

[0178] For example, the second comparator OP4 can be a single-supply operational amplifier, that is, one power supply terminal of the fourth operational amplifier is electrically connected to the operating power supply (not shown in the figure), and the other power supply terminal is grounded.

[0179] It should be noted that, in order to simplify the accompanying drawings, Figure 11 The electrical connection between the first input terminal of the second comparator OP4 and the second terminal of the first resistor R1 is not shown.

[0180] The first input terminal of the second comparator OP4 is electrically connected to the first terminal of the second resistor R2 (i.e., the output terminal 120b of the sampling circuit 120), and the second input terminal of the second comparator OP4 is electrically connected to the output terminal of the third reference voltage source 270. This allows the second comparator OP4 to compare the output voltage of the sampling circuit 120 with the third reference voltage, and to generate and output a second comparison result when the output voltage of the sampling circuit 120 is less than the third reference voltage (the minimum value in the set voltage range). For example, the second comparison result is a high-level signal.

[0181] The output of the second comparator OP4 is electrically connected to the third terminal Q33 (gate) of the third switch Q3, so that the comparison result output by the second comparator OP4 can control the conduction or de-conduction of the third switch Q3. Understandably, when the output voltage of the sampling circuit 120 is less than the third reference voltage, the BUCK converter 110 is under-charged. The second comparator OP4 outputs the second comparison result, and the third switch Q3 can conduct, allowing the fourth resistor R4 to be connected in parallel with the second resistor R2. This reduces the output voltage of the sampling circuit 120, thereby decreasing the voltage value of the second calculation result output by the differential compensation unit 131, increasing the duty cycle of the first control signal generated by the pulse modulation unit 132, and allowing the output voltage of the BUCK converter 110 to increase rapidly, thus improving the dynamic response capability of the BUCK converter 100.

[0182] When the load 220 is in a steady state, the third switch Q3 can be turned off, which allows the fourth resistor R4 to be disconnected from the first resistor R1. This reduces the impact of the fourth resistor R4 on the output voltage of the sampling circuit 120 when the load 220 is in a steady state, reduces the fluctuation of the output voltage of the BUCK converter 100, and improves the stability of the output voltage of the BUCK converter 100.

[0183] For example, the fourth resistor R4 can be a fixed resistor or a variable resistor.

[0184] The third switch Q3 includes, but is not limited to, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The third switch Q3 can be an N-channel MOSFET or a P-channel MOSFET. For example, the third switch Q3 can also be a gallium nitride transistor or a transistor of carbide. When the third switch Q3 is a MOSFET, its first terminal Q31 can be the source of the MOSFET, and its second terminal Q32 can be the drain of the MOSFET; alternatively, its first terminal Q31 can be the drain of the MOSFET, and its second terminal Q32 can be the source of the MOSFET. The third terminal Q33 is the gate of the MOSFET.

[0185] In some examples, the third switch Q3 can be a signal-level MOSFET, that is, the third switch Q3 has a faster response speed, which improves the dynamic response capability of the BUCK converter 100.

[0186] In summary, the embodiments of this application have at least the following beneficial effects:

[0187] In the embodiments of this application, the first input terminal of the control signal generation circuit is electrically connected to the second terminal of the first voltage divider branch and the first terminal of the second voltage divider branch (that is, the output terminal of the sampling circuit), so that the control signal generation circuit can obtain the output voltage of the sampling circuit and generate a first control signal based on the output voltage of the sampling circuit to control the conduction or disconnection of the first switching transistor, thereby realizing negative feedback control of the BUCK conversion circuit.

[0188] Furthermore, the sampling adjustment circuit includes a first sampling adjustment circuit and / or a second sampling adjustment circuit. The first sampling adjustment circuit is connected in parallel with the first voltage divider branch to increase the output voltage of the sampling circuit; the second sampling adjustment circuit is connected in parallel with the second voltage divider branch to decrease the output voltage of the sampling circuit. This allows the sampling adjustment circuit to increase and / or decrease the output voltage of the sampling circuit, thereby changing the duty cycle of the first control signal generated by the control signal generation circuit. This enables the output voltage of the BUCK converter to change rapidly, improving the dynamic response capability of the BUCK converter and enabling the BUCK converter to provide a stable DC voltage to the load.

[0189] By setting up a sampling adjustment circuit to improve the dynamic response capability of the BUCK converter, there is no need to set up a large number of ceramic capacitors, nor is there a need to set up multiphase controllers or DRMOS, etc. The structure is simple, the cost of the BUCK converter is reduced, and it is conducive to the miniaturization of the BUCK converter.

[0190] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A BUCK converter, characterized in that, The BUCK converter includes a BUCK converter circuit, a sampling circuit, a control signal generation circuit, and a sampling adjustment circuit; The BUCK converter circuit includes an inductor and a first switching transistor; the first terminal of the first switching transistor is electrically connected to a DC power supply, and the second terminal of the first switching transistor is electrically connected to the first terminal of the inductor; the first switching transistor is used to control the charging or discharging of the inductor. The sampling circuit includes a first voltage divider branch and a second voltage divider branch; the first end of the first voltage divider branch is electrically connected to the second end of the inductor, and the second end of the first voltage divider branch, the first end of the second voltage divider branch, and the first input end of the control signal generation circuit are electrically connected; the second end of the second voltage divider branch is electrically connected to ground. The output terminal of the control signal generation circuit is electrically connected to the third terminal of the first switching transistor; the control signal generation circuit is used to generate a first control signal based on the output voltage of the sampling circuit, and the first control signal is used to control the first switching transistor to be turned on or off. The sampling adjustment circuit includes a first sampling adjustment circuit and / or a second sampling adjustment circuit; wherein, when the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit is connected in parallel with the first voltage divider branch to increase the output voltage of the sampling circuit; when the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit is connected in parallel with the second voltage divider branch to decrease the output voltage of the sampling circuit.

2. The BUCK converter according to claim 1, characterized in that, The first voltage divider branch includes a first resistor; the second voltage divider branch includes a second resistor; the first end of the first resistor is electrically connected to the second end of the inductor, the second end of the first resistor is electrically connected to the first end of the second resistor, and the second end of the second resistor is electrically connected to ground; when the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit is connected in parallel with the first resistor; when the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit is connected in parallel with the second resistor.

3. The BUCK converter according to claim 2, characterized in that, When the sampling adjustment circuit includes a first sampling adjustment circuit, the first sampling adjustment circuit includes a first comparison unit, a first switching unit, and a first adjustment unit; the first input terminal of the first comparison unit is electrically connected to the second terminal of the first voltage divider branch; the second input terminal of the first comparison unit is electrically connected to a second reference voltage source; and the output terminal of the first comparison unit is electrically connected to the third terminal of the first switching unit. The first terminal of the first switching unit is electrically connected to the first terminal of the first regulating unit; the second terminal of the first switching unit is electrically connected to the second terminal of the first voltage divider branch; and the second terminal of the first regulating unit is electrically connected to the first terminal of the first voltage divider branch.

4. The BUCK converter according to claim 2 or 3, characterized in that, When the sampling adjustment circuit includes a second sampling adjustment circuit, the second sampling adjustment circuit includes a second comparison unit, a second switching unit, and a second adjustment unit; the first input terminal of the second comparison unit is electrically connected to a third reference voltage source; the second input terminal of the second comparison unit is electrically connected to the first terminal of the second voltage divider branch; and the output terminal of the second comparison unit is electrically connected to the third terminal of the second switching unit. The first end of the second switching unit is electrically connected to the first end of the second regulating unit, and the second end of the second switching unit is electrically connected to ground; the second end of the second regulating unit is electrically connected to the first end of the second voltage divider branch.

5. The BUCK converter according to claim 3, characterized in that, The first comparison unit includes a first comparator; the first switching unit includes a second switching transistor; the first adjustment unit includes a third resistor; The first input terminal of the first comparator is electrically connected to the second terminal of the first resistor; the second input terminal of the first comparator is electrically connected to the output terminal of the second reference voltage source; the output terminal of the first comparator is electrically connected to the third terminal of the second switching transistor; the first terminal of the second switching transistor is electrically connected to the first terminal of the third resistor; the second terminal of the second switching transistor is electrically connected to the second terminal of the first resistor; and the second terminal of the third resistor is electrically connected to the first terminal of the first resistor.

6. The BUCK converter according to claim 5, characterized in that, The first adjustment unit further includes a first capacitor and a second capacitor; The second end of the third resistor is electrically connected to the first end of the first capacitor, and the second end of the first capacitor is electrically connected to the first end of the first resistor; the first end of the second capacitor is electrically connected to the first end of the third resistor, and the second end of the second capacitor is electrically connected to the second end of the first capacitor.

7. The BUCK converter according to claim 4, characterized in that, The second comparison unit includes a second comparator; the second switching unit includes a third switching transistor; the second adjustment unit includes a fourth resistor; The first input terminal of the second comparator is electrically connected to the output terminal of the third reference voltage source; the second input terminal of the second comparator is electrically connected to the first terminal of the second resistor; the output terminal of the second comparator is electrically connected to the third terminal of the third switch; the first terminal of the third switch is electrically connected to the first terminal of the fourth resistor; the second terminal of the third switch is electrically connected to ground; and the second terminal of the fourth resistor is electrically connected to the first terminal of the second resistor.

8. The BUCK converter according to any one of claims 1 to 3, 5, and 6, characterized in that, The control signal generation circuit includes a differential compensation unit and a pulse modulation unit; the differential compensation unit includes a first operational amplifier; the pulse modulation unit includes a second operational amplifier; The first input terminal of the first operational amplifier is electrically connected to the first terminal of the second voltage divider branch; the second input terminal of the first operational amplifier is electrically connected to the output terminal of the first reference voltage source; the output terminal of the first operational amplifier is electrically connected to the first input terminal of the second operational amplifier; the second input terminal of the second operational amplifier is electrically connected to the output terminal of the ramp signal generation circuit; and the output terminal of the second operational amplifier is electrically connected to the third terminal of the first switching transistor.

9. A motherboard, characterized in that, The motherboard includes a BUCK converter as described in any one of claims 1 to 8.

10. A computing device, characterized in that, The computing device includes the motherboard as described in claim 9.

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