Implementation method of clock synchronization of master-slave system based on EtherCAT
By measuring and compensating for the transmission delay between the master station and the reference slave station in the EtherCAT system, the problem of insufficient clock synchronization accuracy in traditional algorithms is solved, high-precision clock synchronization of the master-slave system is achieved, and the synchronization control effect of the EtherCAT system is improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TIANJIN POLYTECHNIC UNIV
- Filing Date
- 2022-07-07
- Publication Date
- 2026-07-28
AI Technical Summary
Traditional EtherCAT distributed clock synchronization algorithms fail to effectively consider the impact of transmission delay between the master station and the reference slave station on the initial clock offset of each slave station, resulting in insufficient clock synchronization accuracy.
By measuring the transmission delay between the master station and the reference slave station, and using this delay to compensate for the initial clock offset of each slave station, dynamic compensation for clock drift is achieved in conjunction with the clock control loop, thereby improving clock synchronization accuracy.
It achieves high-precision clock synchronization at the nanosecond level between the master station and the slave station, reduces system time deviation, and improves the synchronization control performance of the EtherCAT system.
Smart Images
Figure CN117411579B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of industrial control and provides a method for implementing master-slave system clock synchronization based on EtherCAT. Background Technology
[0002] EtherCAT, as one of the mainstream industrial Ethernet technologies on the market, has gained a broad market share due to its ultra-high speed, low cost, and ease of use. Its adoption rate in Europe, Asia, and the United States has surpassed that of other industrial Ethernet technologies. With industrial development, the industrial control field has placed higher demands on synchronous control performance. Improving the clock synchronization accuracy of master-slave control systems is fundamental to improving synchronous control accuracy. EtherCAT differs from other industrial Ethernet technologies in that it supports distributed clock synchronization. EtherCAT slaves with distributed clock functionality can achieve nanosecond-level clock synchronization accuracy.
[0003] To achieve better and more stable clock synchronization performance in industrial control systems, numerous researchers both domestically and internationally have studied EtherCAT's distributed clock synchronization technology. In the process of achieving clock synchronization in a master-slave system, it is necessary to synchronize the system time between the master station and the reference slave station, as well as between other slave stations and the reference slave station.
[0004] The system time deviation between the master station and the reference slave station mainly originates from the initial clock offset and the transmission delay between them. In the traditional EtherCAT distributed clock synchronization algorithm, the transmission delay between the master station and the reference slave station is assumed to be 0, attributing the system time deviation entirely to the initial clock offset. This results in the calculated initial clock offset of each slave station being larger than the actual value, impacting the time synchronization performance between the master station and each slave station. Therefore, to address this issue, a novel EtherCAT-based master-slave system clock synchronization method is studied. In the master-slave clock synchronization process, the transmission delay between the master station and the reference slave station is first measured, and then this transmission delay is used to compensate for the initial clock offset of each slave station. Summary of the Invention
[0005] The purpose of this invention is to improve the clock synchronization accuracy of master-slave industrial control systems based on EtherCAT industrial Ethernet. Starting from the main sources of time deviation in master-slave clock systems, a new master-slave clock synchronization algorithm is provided. This algorithm uses the transmission delay between the master station and the reference slave station to compensate for the initial clock offset of each slave station, thereby improving the clock synchronization accuracy between the master station and each slave station.
[0006] The specific steps of the EtherCAT-based master-slave system clock synchronization implementation method provided by this invention are as follows:
[0007] First, the master station scans the slave devices and obtains the network topology. The master station reads the characteristic information registers and data link status registers of all slave devices connected to the master station that support distributed clock functionality, as well as the communication status of each port, and obtains the network topology.
[0008] Second, obtain the master station's system time. The master station sends a data frame to each slave station and records the master station's current system time t. sys_master .
[0009] Third, the master station calculates the transmission delay between itself and the reference slave station. The master station records the time of sending and receiving data frames locally, and reads the timestamps of the data frames arriving at port 0 and port 1 recorded in the reference slave station to calculate the transmission delay T between the master station and the reference slave station. delay (m) can be represented as follows:
[0010]
[0011] In the formula, t m0 The time when the master station sends data frames, t m1 The time when the master station receives the returned data frame, t 10 The time when the first preamble bit of the data frame arrives at reference slave port 0, t 11 This is the time when the data frame arrives at reference slave port 1.
[0012] 4. Calculate the initial clock offset of each slave station. To achieve clock synchronization between the master station and each slave station, the current system time of the master station is used as a reference to calculate the initial clock offset T of each slave station. offset (n) , during the calculation process, the impact of the transmission delay between the master station and each slave station on the initial clock offset calculation result is considered. The time t for the data frame to arrive at the data processing unit of each slave station is also considered. rec (n) Transmission delay T between the master station and the reference slave station delay (m) are all related to the system time t when the main station sent the data frame. sys_master The difference is used to calculate the initial clock offset T of each slave station. offset (n) can be represented as follows:
[0013] T offset (n)=t sys_master -T delay (m)-t rec (n) (2)
[0014] In the formula, T delay (m) is the average value of the transmission delay between the master station and the reference slave station measured every 1ms by the master station, for a total of 10,000 measurements.
[0015] 5. Calculate the transmission delay of each slave station. Assuming that the data processing delay and data forwarding delay of each slave station are the same, the master station obtains the timestamps of the data frames arriving at each port of slave station n by reading the registers 0x0900~0x090F of slave station n, and calculates the transmission delay T between slave station n and the reference slave station according to formula (3). delay (n), Equation (3) is expressed as follows:
[0016]
[0017] In the formula, t n0 The time when the first preamble bit of the data frame arrives at port 0 of slave station n, t n1 t is the time when the data frame arrives at port 1 of slave station n. (n-1)0 The time t is the time when the data frame arrives at port 0 of the slave preceding slave n. (n-1)1 The time when the data frame arrives at port 1 of the slave preceding slave n.
[0018] 6. Each slave station calculates its local clock drift and compensates for it. The initial clock offset T calculated by the master station for each slave station is then used. offset (n), Transmission delay T delay (n) and the reference slave's system time t sys_ref (n) Local time t latched by each slave station local (n) serves as the input value for the clock control loop of each slave station. The system time t of each slave station can be obtained through the clock control loop. sys_local (n) and clock drift Δt(n). Where the system time t of each slave station is... sys_local (n) is represented as follows:
[0019] t sys_local (n)=t local (n)-T offset (n) (4)
[0020] The calculation method for Δt(n) in the clock control loop of each slave station can be expressed as:
[0021] Δt(n)=t local (n)-T offset (n)-T delay (n)-t sys_ref (n) (5)
[0022] Each slave station's time control loop calculates the sign of Δt(n) based on formula (5) to achieve initial compensation for clock drift. Thus, coarse clock synchronization is achieved during the clock initialization phase. In order to achieve precise synchronization between master and slave clocks, the master station sends ARMW or FRMW commands multiple times during each synchronization communication cycle and sends the reference slave station's system time to each slave station multiple times at regular intervals to achieve dynamic compensation for clock drift of each slave station.
[0023] The present invention has the following beneficial effects:
[0024] 1. This invention studies a method for calculating the transmission delay between a master station and a reference slave station.
[0025] 2. This invention provides for the first time a method for compensating the initial clock offset of each slave station by utilizing the transmission delay between the master station and the reference slave station. Compared with the traditional distributed clock synchronization algorithm, it considers the impact of the transmission delay between the master station and the reference slave station on the calculation results of the initial clock offset of each slave station.
[0026] 3. The test verified that the algorithm of the present invention improves the clock synchronization accuracy between the master station and the slave station while ensuring the nanosecond-level clock synchronization accuracy between slave stations. Attached Figure Description
[0027] Figure 1 This is a flowchart of the algorithm of this invention;
[0028] Figure 2 This is a flowchart of the ec_masterpdelay() function of the present invention;
[0029] Figure 3 This is a schematic diagram of the clock control loop;
[0030] Figure 4 This is a scatter plot of the clock deviation between the last slave station and the reference slave station using the algorithm of this invention;
[0031] Figure 5 This is a scatter plot of the clock deviation between the master station and the reference slave station using the traditional EtherCAT distributed clock synchronization algorithm;
[0032] Figure 6 This is a scatter plot of the clock deviation between the master station and the reference slave station using the algorithm of this invention. Detailed Implementation
[0033] To make the objectives, technical solutions, and technical features of this invention clearer and more understandable, the embodiments of this invention will be described in further detail below with reference to the accompanying drawings.
[0034] Please refer to Figure 1As shown, a method for implementing master-slave system clock synchronization based on EtherCAT includes the following specific steps:
[0035] First, the master station scans the slave devices and obtains the network topology. The master station sends the FPRD command to read the characteristic information registers 0x0008~0x0009 and data link status registers 0x0110~0x0111 of all slave devices, to obtain the communication status of all slave devices connected to the master station that support distributed clock function and their respective ports, thereby obtaining the network topology.
[0036] Second, obtain the master station's system time. The master station sends a broadcast write command BWR to each slave station and records the master station's current system time t. sys_master .
[0037] Third, the master station calculates the transmission delay between itself and the reference slave station. The master station calls... Figure 2 The ec_masterpdelay() function shown calculates the transmission delay T between the master station and the reference slave station. delay (m), this function increments the transmission delay T between the master station and the reference slave station every 1ms. delay (m) Perform one measurement and calculation, a total of 10,000 measurements were taken, and the output value of this function is the average value of the 10,000 measurement results. Among them, the formula (1) for calculating the transmission delay between the master station and the reference slave station is expressed as follows:
[0038]
[0039] 4. Calculate the initial clock offset for each slave station. The master station sends an FPRD command to read registers 0x0918 to 0x091F of each slave station to obtain the time t for each slave station's data processing unit to receive data frames. rec (n). To achieve clock synchronization between the master station and each slave station, the current system time of the master station is used as a reference, and the time t at which the data processing unit of each slave station receives the data frame is used as the reference. rec (n) Transmission delay T between the master station and the reference slave station delay (m) are all related to the system time t when the main station sent the data frame. sys_master The difference is used to calculate the initial clock offset T of each slave station. offset (n), and write it into the registers 0x0920~0x0927 of each slave station, T offset (n) is represented as follows:
[0040] T offset (n)=t sys_master -T delay (n)-t rec (n) (2)
[0041] 5. Calculate the transmission delay of each slave station. Assuming that the data processing delay and data forwarding delay of each slave station are the same, the master station obtains the timestamps of the data frames arriving at each port of slave station n by reading the registers 0x0900~0x090F of slave station n, and calculates the transmission delay T between slave station n and the reference slave station according to formula (3). delay (n), and write it into the registers 0x0928~0x090F of each slave station. Formula (3) is expressed as follows:
[0042]
[0043] In the formula, t n0 The time when the first preamble bit of the data frame arrives at port 0 of slave station n, t n1 t is the time when the data frame arrives at port 1 of slave station n. (n-1)0 The time t is the time when the data frame arrives at port 0 of the slave preceding slave n. (n-1)1 The time when the data frame arrives at port 1 of the slave preceding slave n.
[0044] 6. Each slave station calculates its local clock drift and compensates for it. Clock control loop reference. Figure 3 As shown, each slave station will use the initial clock offset T calculated by the master station. offset (n), Transmission delay T delay (n) and the reference slave's system time t sys_ref (n) Local time t latched by each slave station local (n) serves as the input value for the clock control loop of each slave station, from which the system time t of each slave station can be obtained. sys_local (n) and clock drift Δt(n). Where the system time t of each slave station is... sys_local (n) is represented as follows:
[0045] t sys_local (n)=t local (n)-T offset (n) (4)
[0046] The calculation method for Δt(n) in the clock control loop of each slave station can be expressed as:
[0047] Δt(n)=t local (n)-T offset (n)-T delay (n)-t sys_ref (n) (5)
[0048] Each slave station's time control loop compensates for clock drift based on the sign of Δt(n) calculated by formula (5). Thus, coarse clock synchronization is achieved during the clock initialization phase. In order to achieve precise synchronization between master and slave clocks, the master station sends ARMW or FRMW commands multiple times during each synchronization communication cycle and sends the reference slave station's system time to each slave station multiple times at regular intervals to achieve dynamic compensation for clock drift of each slave station.
[0049] To verify the effectiveness of the clock synchronization algorithm of the present invention, the system time deviation between the master station and the reference slave station, and between the last slave station connected to the master station and the reference slave station were tested. The test was performed once every 1ms, for a total of 10,000 tests.
[0050] Figure 4 The test results show the system time deviation between the last slave station connected to the master station and the reference slave station. After 5,000 clock drift compensations, the system time deviation between the last slave station and the reference slave station can be reduced to less than 50 ns, which is almost close to 0. This far exceeds the clock synchronization effect that the IEEE 1588 protocol can achieve.
[0051] contrast Figure 5 , Figure 6 The distribution of clock deviation values between the master station and the reference slave station shows that the clock synchronization algorithm used in this invention is more effective than the traditional clock synchronization algorithm. Compared with the traditional clock synchronization algorithm, the system time deviation between the master station and the reference slave station is reduced by about 72%, and the clock synchronization accuracy between the master station and the slave station is significantly improved.
Claims
1. A method for implementing clock synchronization in a master-slave system based on EtherCAT, characterized in that... The first slave station connected to the master station that supports distributed clocks is selected as the reference slave station. Clock offset between the master station and each slave station is compensated from three perspectives: initial clock offset, transmission delay, and clock drift. Transmission delay includes both the transmission delay between the master station and the reference slave station, as well as the transmission delay between other slave stations and the reference slave station. This method is performed according to the following steps: First, the master station scans the slave devices and obtains the network topology. The master station reads the feature information registers and data link status registers of all slave devices connected to the master station that support distributed clock function and the communication status of each port, thus obtaining the network topology.
2. Acquire the master station system time, the master station sends a data frame to each slave station, and records the current system time t of the master station sys_master； Third, the master station calculates the transmission delay between itself and the reference slave station. The master station records the time of sending and receiving data frames locally, and reads the timestamps of the data frames arriving at port 0 and port 1 recorded in the reference slave station to calculate the transmission delay T between the master station and the reference slave station. delay (m) can be represented as follows: In the formula, t m0 The time when the master station sends data frames, t m1 The time when the master station receives the returned data frame, t 10 The time when the first preamble bit of the data frame arrives at reference slave port 0, t 11 The time when the data frame arrives at reference slave port 1; 4. Calculate the initial clock offset of each slave station. In order to achieve clock synchronization between the master station and each slave station, the current system time of the master station is used as a reference to calculate the initial clock offset T of each slave station. offset (n), during the calculation process, the impact of the transmission delay between the master station and each slave station on the initial clock offset calculation result is considered, and the time t of the data frame arriving at the data processing unit of each slave station is taken as the calculation result. rec (n) Transmission delay T between the master station and the reference slave station delay (m) are all related to the system time t when the main station sent the data frame. sys_master The difference is used to calculate the initial clock offset T of each slave station. offset (n) can be represented as follows: T offset (n)=t sys_master -T delay (m)-t rec (n) (2) In the formula, T delay (m) is the average value of the transmission delay between the master station and the reference slave station measured every 1ms, for a total of 10,000 measurements; 5. Calculate the transmission delay of each slave station. Assuming that the data processing delay and data forwarding delay of each slave station are the same, the master station obtains the timestamps of the data frames arriving at each port of slave station n by reading the registers 0x0900~0x090F of slave station n, and calculates the transmission delay T between slave station n and the reference slave station according to formula (3). delay (n), Equation (3) is expressed as follows: In the formula, t n0 The time when the first preamble bit of the data frame arrives at port 0 of slave station n, t n1 t is the time when the data frame arrives at port 1 of slave station n. (n-1)0 The time t is the time when the data frame arrives at port 0 of the slave preceding slave n. (n-1)1 The time when the data frame arrives at port 1 of the slave station preceding slave station n; 6. Each slave station calculates its local clock drift and compensates for it, using the initial clock offset T calculated by the master station for each slave station. offset (n), Transmission delay T delay (n) and the reference slave's system time t sys_ref (n) Local time t latched by each slave station local (n) serves as the input value for the clock control loop of each slave station. The system time t of each slave station can be obtained through the clock control loop. sys_local (n) and clock drift Δt(n), where the system time t of each slave station is... sys_local (n) is represented as follows: t sys_local (n)=t local (n)-T offset (n) (4) The calculation method for Δt(n) in the clock control loop of each slave station can be expressed as: Δt(n)=t local (n)-T offset (n)-T delay (n)-t sys_ref (n) (5) Each slave station's time control loop calculates the sign of Δt(n) based on formula (5) to achieve initial compensation for clock drift. Thus, coarse clock synchronization is achieved during the clock initialization phase. In order to achieve precise synchronization between master and slave clocks, the master station sends ARMW or FRMW commands multiple times during each synchronization communication cycle and sends the reference slave station's system time to each slave station multiple times at regular intervals to achieve dynamic compensation for clock drift of each slave station.