Single-input multiple-output circuit system based on reverse polarity four-switch buck-boost

Abstract

The application relates to a single-input multi-output circuit system based on a reverse polarity four-switch Buck-boost, and belongs to the technical field of multi-port converters. The application aims at the problems of limited voltage regulation capability of a traditional isolated reverse polarity multi-port DC-DC converter and power coupling among the output ports. The application comprises multiplexed inverter half-bridge switches S1 and S2 and n two-port output branches. On the basis of a traditional four-switch Buck-boost circuit, a direct-current isolation capacitor is connected in series in an inductor branch to realize negative polarity output of voltage. A group of half-bridges on the output side of the reverse polarity four-switch Buck-boost and a group of Buck circuits are switched to realize multiplexing, and the reverse polarity four-switch Buck-boost is expanded into two-way output. The application has a simplified circuit structure and a small number of device quantities, and can avoid power coupling among the output ports.

Description

Technical Field

[0001] This invention relates to a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost, belonging to the field of multi-port converter technology. Background Technology

[0002] Fifth-generation wireless communication technology (5G) is characterized by high-speed data transmission, low latency, and large capacity, representing a major advancement in the field of communications. A typical 5G base station consists of multiple transceivers. Each transceiver includes an antenna array, a radio frequency power amplifier (RFPA), a baseband interface, signal processing components, a DC-DC power supply, and a cooling system. The 5G RFPA is a critical component ensuring extended wireless signal transmission range and is one of the most power-consuming components in the base station. The input voltage of the communication power supply in a 5G base station is typically set at -48V to reduce line losses, prevent electrode corrosion, and mitigate noise and other potential interference. The power output side provides multiple positive voltage outputs at different voltage levels to power the RF power amplifiers under various operating conditions.

[0003] Reverse polarity DC / DC converters feature negative input and positive output, making them suitable for 5G-RFPA equipment power supply. Based on their operating principles, these circuits are categorized into four types: ① buck-boost or Cuk-based topologies, ② switched capacitor and switched inductor-based topologies, ③ LC resonant-based topologies, and ④ transformer-based isolated topologies. Traditional optimized buck-boost or Cuk-based topologies struggle to achieve soft switching and exhibit significant switching losses at high frequencies. While adding inductor branches to create freewheeling loops can optimize soft-switching characteristics, the large inductance limits the improvement of system power density. Reverse polarity converters based on switched capacitor structures can achieve high step-up / step-down capabilities by expanding the unit composed of switched capacitors and commutator diodes. However, the voltage ratio of switched capacitor structures is fixed, limiting voltage regulation flexibility. Furthermore, large power pulses occur during the switching of switched capacitors, affecting system stability. Circuits based on LC resonant converters possess good soft-switching characteristics, but their voltage regulation capability is limited. Under wide gain conditions, the wide frequency modulation range leads to reduced system dynamics and stability. Although transformer-based isolation converters naturally achieve reverse voltage output, the power coupling between windings and the parasitic parameters of the transformer can interfere with the stable operation of the system.

[0004] To reduce the number of components in circuits, simplify circuit structure, and achieve unified energy control, multi-port converters are gradually replacing traditional two-port converter solutions. Based on electrical isolation, multi-port converters can be divided into two categories: isolated and non-isolated. Fully isolated topologies are based on multi-winding transformers, providing complete electrical isolation and a wide voltage regulation range. However, multi-winding transformers are large in size and weight, resulting in low system power density. Furthermore, magnetic coupling between windings causes power coupling between ports, leading to reduced system efficiency and stability. Traditional non-isolated multi-port converters have simple circuit structures, fewer components, and smaller prototype sizes. Their voltage regulation capability is limited; currently, methods such as coupled inductors, cascaded structures, and increasing the number of modules are used to broaden the system's gain range. However, hard-switching characteristics and the inflexible adjustment of port voltages remain problems that need to be solved in existing non-isolated multi-port converters. Summary of the Invention

[0005] To address the limitations of traditional isolated reverse polarity multiport DC-DC converters in voltage regulation and the power coupling issues between output ports, this invention provides a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost converter.

[0006] The present invention provides a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost, comprising multiplexed inverter half-bridge switches S1 and S2 and n two-port output branches, n = 1, 2, 3, ...;

[0007] Voltage source V in As a positive power supply, the source of the switching transistor S1 is connected to the voltage source V. in The negative terminal of transistor S1 is connected to the source of transistor S2, and the drain of transistor S2 is connected to the voltage source V. in The positive electrode;

[0008] The connection point between the drain of switch S1 and the source of switch S2 is taken as the negative connection point of the branch, and the drain of switch S2 is taken as the positive connection point of the branch.

[0009] The n two-port output branches have the same structure, and each two-port output branch is connected between the negative terminal connection point and the positive terminal connection point of the branch.

[0010] For the first two-port output branch:

[0011] Including the switching transistor S 3_1 Switch S 4_1 DC blocking capacitor C 1_1 Inductor L 1_1 Inductor L 2_1 DC output voltage regulator capacitor C o1_1 DC output voltage regulator capacitor C o2_1Load resistance R o1_1 and load resistance R o2_1 ,

[0012] The negative terminal of the branch is connected to a DC blocking capacitor C. 1_1 The negative terminal, DC blocking capacitor C 1_1 The positive terminal is connected to the inductor L 1_1 One end, inductor L 1_1 The other end is connected to the switching transistor S 4_1 The drain of the switching transistor S 4_1 The source connection branch positive terminal connection point; the switch S 4_1 The drain is connected to the inductor L 2_1 One end, inductor L 2_1 The other end is connected to the DC output voltage regulator capacitor C. o2_1 One end, DC output voltage regulator capacitor C o2_1 The other end is connected to the switching transistor S 4_1 The source; load resistance R o2_1 With DC output voltage regulator capacitor C o2_1 in parallel;

[0013] Switch S 4_1 The drain of the switching transistor S is connected. 3_1 The source of the switch S 3_1 The drain and the switching transistor S 4_1 A DC output voltage regulator capacitor C is connected between the source and the source. o1_1 Load resistance R o1_1 With DC output voltage regulator capacitor C o1_1 in parallel.

[0014] According to the single-input multiple-output circuit system based on reverse polarity four-switch Buck-boost of the present invention, when the circuit system includes n two-port output branches, the complementary turn-on conditions of the switching transistors are the same.

[0015] For the first two-port output branch, switches S1 and S2 are turned on complementaryly, and switch S... 3_1 and switching transistor S 4_1 Complementary opening;

[0016] By controlling the switching transistors S1, S2, and S... 3_1 and S 4_1 Duty cycle and switching transistors S1 and S 4_1 Compared to the phase shift, the operation of a single-input multiple-output circuit system is sequentially changed according to four modes: voltage balance, energy storage, energy circulation, and energy transmission, thereby realizing hybrid control of pulse width modulation and phase shift modulation.

[0017] According to the single-input multiple-output circuit system based on reverse polarity four-switch Buck-boost of the present invention, when the circuit system includes n two-port output branches, the control variable constraint boundary conditions are the same so that the working process of the single-input multiple-output circuit system changes sequentially according to four modes: voltage balance, energy storage, energy circulation and energy transmission.

[0018] For the first two-port output branch, the control variable constraint boundary conditions are as follows:

[0019]

[0020] In the formula, D1 is the duty cycle of the switching transistor S1, D 2_1 For the switching transistor S 4_1 The duty cycle, d1 is the switching transistor S1 and S2. 4_1 The shifts between them.

[0021] According to the single-input multiple-output circuit system based on the reverse polarity four-switch Buck-boost of the present invention, when the circuit system includes n two-port output branches, the maximum transmission power P of all two-port output branches is... i-out-max The conditions for control variables are the same; where i = 1, 2, 3, ..., n;

[0022] For the first two-port output branch, the maximum transmission power P of the circuit system 1-out-max The control variable conditions are:

[0023]

[0024] In the formula V o1_1 The first output voltage of the first two-port output branch corresponds to the load resistance R. o1_1 f is the operating frequency of the switching transistor.

[0025] According to the single-input multiple-output circuit system based on reverse polarity four-switch Buck-boost of the present invention, when the circuit system includes n two-port output branches, the zero-voltage turn-on condition of the switching transistors in each two-port output branch is the same.

[0026] For the first two-port output branch, the zero-voltage turn-on condition for the switching transistor is:

[0027]

[0028] In the formula, K1 represents the voltage gain of the first two-port output branch, K1 = V o1_1 / V in .

[0029] According to the single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to the present invention, the first output voltages of n two-port output branches have a predetermined proportional relationship as follows:

[0030] V o1_1 (1-D 2_1 ) = V o1_2 (1-D 2_2 )=···=V o1_n (1-D 2_n (4)

[0031] In the formula V o1_n Let D be the first output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle;

[0032] At this time, the duty cycle D1 of the switching transistor S1 is:

[0033] D1=1+K1(1-D 2_1 )=1+K2(1-D 2_2 )=···=K n (1-D 2_n (5)

[0034] In the formula K n The voltage gain of the nth two-port output branch: K n =V o1-n / V in ;

[0035]

[0036] In the formula V o2_n V is the second output voltage of the nth two-port output branch, where V o2_1 The second output voltage of the first two-port output branch corresponds to the load resistance R. o2_1 ;

[0037] The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment:

[0038]

[0039] Where L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

[0040] According to the present invention, the single-input multiple-output circuit system based on the reverse polarity four-switch Buck-boost makes the first output voltage of each of the n two-port output branches independent;

[0041] At this time, the duty cycle D1 of the switching transistor S1 is:

[0042] D1 = 0.5, (8)

[0043] D 2_i Determined based on the ratio of the first output voltage to the second output voltage of the i-th two-port output branch:

[0044]

[0045] In the formula V o1_n V is the first output voltage of the nth two-port output branch, where V o2_n D is the second output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle;

[0046] The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment:

[0047]

[0048] Where L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

[0049] The beneficial effects of this invention are as follows: This invention achieves negative polarity conversion of voltage by adding a DC blocking capacitor, and expands the number of output ports of the circuit through switch multiplexing and branch multiplexing. Compared with traditional isolated reverse polarity multiport DC-DC converters, this invention has a simplified circuit structure and a smaller number of components, and can avoid power coupling between output ports. Compared with traditional non-isolated reverse polarity multiport DC-DC converters, this invention has a wider voltage gain range and can achieve zero-voltage turn-on of each switch over a wide power range, improving the transmission efficiency of the system.

[0050] The circuit system described in this invention can meet the high-efficiency, high-power-density power supply requirements of 5G RF power amplifiers, achieving single-channel wide-range negative voltage input and multiple-channel adjustable positive voltage output. This invention can achieve efficient and stable power supply for 5G-RFPAs, and the output voltage can be adjusted according to the specific type of 5G-RFPA, the user's size, and activities, resulting in significant energy savings. Attached Figure Description

[0051] Figure 1 This is a schematic diagram of the circuit structure of a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost when n=1.

[0052] Figure 2 This is a schematic diagram of a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost, including multiple two-port output branches; V in the diagram C1_n Capacitor C in branch n 1_n Voltage across terminals, i L1_n Inductor L flows through branch n 1_n The current, i L2_n Inductor L flows through branch n 2_n The current, V o1_n V is the first output voltage at the first output port in branch n. o2_n The second output voltage of the second output port in branch n;

[0053] Figure 3 This is the voltage and current waveform diagram of the circuit system of the present invention when n=1; V in the diagram GS1 V is the drive signal for switching transistor S1. GS2 T is the drive signal for switching transistor S2. S V is the circuit's duty cycle. GS3 For the switching transistor S 3_1 The drive signal, V GS4 For the switching transistor S 4_1 The drive signal, V L1_1 For inductor L 1_1 Voltage across terminals, V L2_1 For inductor L 2_1 The voltage across the terminals, t0 to t4 represent the moments on the time axis t;

[0054] Figure 4 This is a schematic diagram of the operating mode of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when n=1. The operating mode at this time is the voltage balance mode.

[0055] Figure 5 This is a schematic diagram of the working mode of the single-input multiple-output circuit based on the reverse polarity four-switch Buck-boost when n=1. The working mode at this time is the energy storage mode.

[0056] Figure 6 This is a schematic diagram of the working mode of the single-input multiple-output circuit based on the reverse polarity four-switch Buck-boost when n=1. The working mode at this time is the energy cycling mode.

[0057] Figure 7 This is a schematic diagram of the operating mode of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when n=1. The operating mode at this time is the energy transfer mode.

[0058] Figure 8This is a voltage and current waveform diagram of the circuit system of the present invention when it has multiple two-port output branches; V in the diagram GS3_n For the nth output branch switch S 3_n The drive signal, V in the figure GS4_n For the nth output branch switch S 4_n The driving signal; t0 to t6 represent the moments on the time axis t;

[0059] Figure 9 This is a schematic diagram of the working modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the working modes of branch 1 and branch n are both voltage balance modes.

[0060] Figure 10 This is a schematic diagram of the operating modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the operating mode of branch 1 is the energy storage mode, and the operating mode of branch n is the voltage balance mode.

[0061] Figure 11 This is a schematic diagram of the working modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the working modes of both branch 1 and branch n are energy cycling modes.

[0062] Figure 12 This is a schematic diagram of the working modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the working modes of both branch 1 and branch n are energy cycling modes.

[0063] Figure 13 This is a schematic diagram of the working modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the working mode of branch n is the energy transfer mode, and the working mode of branch 1 is the energy circulation mode.

[0064] Figure 14 This is a schematic diagram of the working modes of a single-input multiple-output circuit based on a reverse polarity four-switch Buck-boost when there are multiple two-port output branches. At this time, the working modes of both branch 1 and branch n are energy transfer modes.

[0065] Figure 15 This is a diagram illustrating the power transfer range of a single branch in the single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost described in this invention; the diagram shows... This represents the actual transmission power of a single branch 1 relative to the maximum transmission power P of branch 1. 1-out-max The per-unit value;

[0066] Figure 16 This diagram illustrates the soft-switching range of transistor S1 under set voltage gain and output power conditions; the red line in the diagram corresponds to the per-unit power value. For a value of 0.3, the blue line corresponds to the per-unit power value. For a value of 0.5, the green line corresponds to the per-unit power value. When the value is 0.7, the yellow line corresponds to the per-unit power value. For a value of 0.9, the solid line corresponds to a voltage gain K1 of -0.5, and the dashed line corresponds to a voltage gain K1 of -1.5; S in the diagram... 1-ZVS This represents the ZVS condition for switch S1, corresponding to the surface in the figure; the gray plane in the figure is the soft-switching boundary of switch S1, when S... 1-ZVS When the corresponding working surface is above the boundary of the gray plane, the switch S1 can achieve ZVS turn-on;

[0067] Figure 17 This diagram illustrates the soft-switching range of transistor S2 under set voltage gain and output power conditions; the red line in the diagram corresponds to the per-unit power value. For a value of 0.3, the blue line corresponds to the per-unit power value. For a value of 0.5, the green line corresponds to the per-unit power value. When the value is 0.7, the yellow line corresponds to the per-unit power value. For a voltage gain of 0.9, the solid line corresponds to a voltage gain K1 of -1.5, and the dashed line corresponds to a voltage gain K1 of -0.5; S in the diagram... 2-ZVS The ZVS condition for switch S2 is represented by the surface shown in the figure; the gray plane in the figure represents the soft-switching boundary of switch S2, when S... 2-ZVS When the corresponding working surface is below the boundary of the gray plane, the switch S2 can achieve ZVS turn-on;

[0068] Figure 18 Under the conditions of set voltage gain and output power, the switching transistor S 3_1 A schematic diagram of the soft-switching range; the red line in the diagram corresponds to the per-unit power value. For a value of 0.3, the blue line corresponds to the per-unit power value. For a value of 0.5, the green line corresponds to the per-unit power value. When the value is 0.7, the yellow line corresponds to the per-unit power value. For a value of 0.9, the solid line corresponds to a voltage gain K1 of -0.5, and the dashed line corresponds to a voltage gain K1 of -1.5; where V o2_1 Port full load indicates that port V in branch 1 is fully loaded. o1_1 Unloaded, i.e., resistor R o1_1 When disconnected, all energy is transferred to port V. o2_1 resistance Ro2_1 Above; S in the diagram 3-ZVS Indicates the switching transistor S 3_1 The ZVS condition corresponds to the surface in the figure; the gray plane in the figure is S. 3_1 The soft-switching boundary, when S 3-ZVS When the corresponding working surface is below the boundary of the gray plane, the switching transistor S 3_1 ZVS can be enabled;

[0069] Figure 19 Under the conditions of set voltage gain and output power, the switching transistor S 4_1 A schematic diagram of the soft-switching range; the red line in the diagram corresponds to the per-unit power value P. * 1-out For a value of 0.3, the blue line corresponds to the per-unit power value P. * 1-out When the value is 0.5, the green line corresponds to the per-unit power value P. * 1-out When the value is 0.7, the yellow line corresponds to the per-unit power value P. * 1-out For a value of 0.9, the solid line corresponds to a voltage gain K1 of -0.5, and the dashed line corresponds to a voltage gain K1 of -1.5; S in the diagram... 4-ZVS Indicates the switching transistor S 4_1 The ZVS condition corresponds to the surface in the figure; the gray plane in the figure is S. 4_1 The soft-switching boundary, when S 4-ZVS When the corresponding working surface is above the boundary of the gray plane, the switching transistor S 4_1 ZVS can be enabled;

[0070] Figure 20 This is a schematic diagram of the experimental platform of the system of the present invention, which includes two two-port output branches, in a specific embodiment.

[0071] Figure 21 This is a schematic diagram of the soft-switching range of the switching transistor S1 in a specific embodiment; V in the figure GS This is the current drive signal for the switching transistor, i.e., the gate-source voltage of the switching transistor, V. DS This represents the drain-source voltage of the current switching transistor. ZVS stands for Zero Voltage Switch.

[0072] Figure 22 This is a schematic diagram of the soft-switching range of the switching transistor S2 in a specific embodiment;

[0073] Figure 23 In a specific embodiment, the switching transistor S 3_1 A schematic diagram of the soft-switching range;

[0074] Figure 24In a specific embodiment, the switching transistor S 4_1 A schematic diagram of the soft-switching range;

[0075] Figure 25 In a specific embodiment, the switching transistor S 3_2 A schematic diagram of the soft-switching range;

[0076] Figure 26 In a specific embodiment, the switching transistor S 4_2 A schematic diagram of the soft-switching range;

[0077] Figure 27 In a specific embodiment, the inductor L 1_1 Voltage and current waveforms;

[0078] Figure 28 In a specific embodiment, the inductor L 2_1 Voltage and current waveforms;

[0079] Figure 29 In a specific embodiment, the inductor L 1_2 Voltage and current waveforms;

[0080] Figure 30 In a specific embodiment, the inductor L 2_2 Voltage and current waveforms;

[0081] Figure 31 This is a schematic diagram of the two-port output voltage of the first two-port output branch in steady state in a specific embodiment.

[0082] Figure 32 This is a schematic diagram of the two-port output voltage of the second two-port output branch in steady state in a specific embodiment.

[0083] Figure 33 In a specific embodiment, the voltage source V in In the event of a sudden change, the inductance L of the first two-port output branch 1_1 and inductor L 2_1 Current waveform diagram;

[0084] Figure 34 In a specific embodiment, the voltage source V in In the event of a sudden change, the inductance L of the second two-port output branch 1_2 and inductor L 2_2 The current waveform diagram. Detailed Implementation

[0085] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0086] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0087] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but this is not intended to limit the scope of the invention.

[0088] Specific Implementation Method 1: Combination Figure 1 and Figure 2 As shown, the present invention provides a single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost, including multiplexed inverter half-bridge switches S1 and S2 and n two-port output branches, n = 1, 2, 3, ...;

[0089] Voltage source V in As a positive power supply, the source of the switching transistor S1 is connected to the voltage source V. in The negative terminal of transistor S1 is connected to the source of transistor S2, and the drain of transistor S2 is connected to the voltage source V. in The positive electrode;

[0090] The connection point between the drain of switch S1 and the source of switch S2 is taken as the negative connection point of the branch, and the drain of switch S2 is taken as the positive connection point of the branch.

[0091] The n two-port output branches have the same structure, and each two-port output branch is connected between the negative terminal connection point and the positive terminal connection point of the branch.

[0092] For the first two-port output branch:

[0093] Including the switching transistor S 3_1 Switch S 4_1 DC blocking capacitor C 1_1 Inductor L 1_1 Inductor L 2_1 DC output voltage regulator capacitor C o1_1 DC output voltage regulator capacitor C o2_1 Load resistance R o1_1 and load resistance R o2_1 ,

[0094] The negative terminal of the branch is connected to a DC blocking capacitor C. 1_1 The negative terminal, DC blocking capacitor C 1_1 The positive terminal is connected to the inductor L1_1 One end, inductor L 1_1 The other end is connected to the switching transistor S 4_1 The drain of the switching transistor S 4_1 The source connection branch positive terminal connection point; the switch S 4_1 The drain is connected to the inductor L 2_1 One end, inductor L 2_1 The other end is connected to the DC output voltage regulator capacitor C. o2_1 One end, DC output voltage regulator capacitor C o2_1 The other end is connected to the switching transistor S 4_1 The source; load resistance R o2_1 With DC output voltage regulator capacitor C o2_1 in parallel;

[0095] Switch S 4_1 The drain of the switching transistor S is connected. 3_1 The source of the switch S 3_1 The drain and the switching transistor S 4_1 A DC output voltage regulator capacitor C is connected between the source and the source. o1_1 Load resistance R o1_1 With DC output voltage regulator capacitor C o1_1 in parallel.

[0096] The circuit system described in this embodiment is based on the traditional four-switch buck-boost circuit, with a DC blocking capacitor C connected in series in the inductor branch. 1_1 This achieves negative voltage output. In the two-port output branch, a set of half-bridges and a set of buck circuits on the output side of the reverse polarity four-switch buck-boost are multiplexed, which can expand the reverse polarity four-switch buck-boost into a two-port output. The single-output branch circuit structure is as follows: Figure 1 As shown. Figure 1 In the middle, V C1_1 For capacitor C 1_1 Voltage across terminals, i L1_1 For the current flowing through inductor L 1_1 The current, i L2_1 For the current flowing through inductor L 2_1 The current. V o1_1 V is the first output voltage at the first output port of the output branch. o2_1 This is the second output voltage of the second output port of the output branch.

[0097] Furthermore, when the circuit system includes n two-port output branches, the complementary turn-on conditions of the switching transistors are the same;

[0098] For the first two-port output branch, switches S1 and S2 are turned on complementaryly, and switch S... 3_1 and switching transistor S 4_1 Complementary opening;

[0099] By controlling the switching transistors S1, S2, and S... 3_1 and S 4_1 Duty cycle and switching transistors S1 and S 4_1 Compared to the phase shift, the operation of a single-input multiple-output circuit system is sequentially changed according to four modes: voltage balance, energy storage, energy circulation, and energy transmission, thereby realizing hybrid control of pulse width modulation and phase shift modulation.

[0100] In this embodiment, a circuit system with a single output branch is taken as an example, combined with... Figures 3 to 7 The voltage and current waveforms and operating modes are shown. Figure 1 As shown, the inductance L is defined. 1_1 and inductor L 2_1 The positive direction of the current is from the input side to the output side, and the DC blocking capacitor C 1_1 The positive direction of the voltage is right-positive and left-negative. There are 4 operating modes within each operating cycle. The circuit adopts a hybrid control strategy of pulse width modulation (PWM) and phase shift modulation (PSM). The turn-off time of switch S2 is taken as the initial time t0, and the phase of S1 is taken as the initial zero phase.

[0101] When the circuit system includes n two-port output branches, the control variable constraint boundary conditions are the same to make the working process of the single-input multiple-output circuit system change sequentially in four modes: voltage balance, energy storage, energy circulation and energy transmission.

[0102] For the first two-port output branch, the control variable constraint boundary conditions are as follows:

[0103]

[0104] In the formula, D1 is the duty cycle of the switching transistor S1, D 2_1 For the switching transistor S 4_1 The duty cycle, d1 is the switching transistor S1 and S2. 4_1 The shifts between them.

[0105] The working process of a single-output branch circuit system is briefly analyzed below.

[0106] Operating Mode I: Voltage Balance Mode. (Combined with...) Figure 4 As shown, the voltage and current waveforms and equivalent circuits for this mode are respectively as follows: Figure 3 t0-t1 and Figure 4 As shown. At time t0, switch S2 is turned off, and the circuit enters the dead time. During the dead time, the positive inductor current i... L1_1This causes the parasitic capacitance of switch S1 to fully discharge, and the body diode of S1 to conduct. When the drive signal arrives, S1 achieves zero-voltage switch (ZVS) turn-on. At t0 * At time i, the inductor current i L1_1 The direction changes from positive to negative, and the input voltage V in For inductor L 1_1 Charging is in progress. On the output side, inductor L... 2_1 Energy storage, output voltage regulator capacitor C o1_1 and C o2_1 Maintain output voltage V respectively o1_1 and V o2_1 Stable. At time t1, switch S 3_1 Shut down, this mode ends.

[0107] Within this mode, the inductance L 1_1 The voltage across the terminals is V C1_1 +V in -V o1_1 Inductor L 2_1 The voltage across the terminals is V o1_1 -V o2_1 Flow through inductor L 1_1 current i L1_1 and flowing through inductor L 2_1 current i L2_1 They are respectively:

[0108]

[0109] Where i L1_1 (t0) represents the inductor current i at time t0. L1_1 (t) Initial value, i L2_1 (t0) represents the inductor current i at time t0. L2_1 (t) Initial value.

[0110] Operating Mode II: Energy Storage Mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 3 t1-t2 and Figure 5 As shown. At time t1, switch S3 is turned off, and the circuit enters the dead time. The inductor current i in the opposite direction... L1_1 This makes the switching transistor S 4_1 The parasitic capacitance is completely discharged, S 4_1 The body diode is turned on. When the drive signal arrives, S... 4_1 Achieve zero-voltage turn-on. In this mode, the input voltage V... in For capacitor C 1_1 and inductor L 1_1 During charging, the inductor current i L1_1 The current increases linearly. On the output side, the inductor current i...L2_1 Through S 4_1 Freewheeling, output voltage regulator capacitor C o1_1 and C o2_1 Maintain output voltage V respectively o1_1 and V o2_1 Stable. At time t2, switch S1 is turned off, ending this mode. During this mode, inductance L... 1_1 The voltage across the terminals is V C1_1 +V in ,

[0111] Inductor L 2_1 The voltage across the terminals is -V o1_1 Flow through inductor L 1_1 current i L1_1 and flowing through inductor L 2_1 current i L2_1 They are respectively:

[0112]

[0113] Among them, i L1_1 (t1) represents the inductor current i at time t1. L1_1 (t) Initial value, i L2_1 (t1) represents the inductor current i at time t1. L2_1 (t) Initial value.

[0114] Operating Mode III: Energy Cycling Mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 3 t2-t3 and Figure 6 As shown. At time t2, switch S1 is turned off, and the circuit enters the dead time. The inductor current i in the opposite direction... L1_1 This causes the parasitic capacitance of switch S2 to fully discharge, and the body diode of S2 to conduct. When the drive signal arrives, S2 achieves zero-voltage turn-on. The inductor current i... L1_1 Through the switching transistors S2 and S 4_1 The constructed path provides freewheeling. The output circuit state is consistent with Mode II. At t2 * At time i, the inductor current i L1_1 The direction changes from reverse to positive. At time t3, the switching transistor S... 3_1 Shut down, this mode ends.

[0115] Within this mode, the inductance L 1_1 The voltage across the terminals is V C1_1 Inductor L 2_1 The voltage across the terminals is -V o1_1 Flow through inductor L 1_1 current i L1_1 and flowing through inductor L 2_1 current i L2_1 They are respectively:

[0116]

[0117]

[0118] Among them, i L1_1 (t2) represents the inductor current i at time t2. L1_1 (t) Initial value, i L2_1 (t2) represents the inductor current i at time t2. L2_1 (t) Initial value.

[0119] Operating Mode IV: Energy Transfer Mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 3 t3-t4 and Figure 7 As shown. At time t3, the switching transistor S... 4_1 When switched off, the circuit enters the dead time. The inductor current i in the positive direction... L1_1 Make switch S 3_1 The parasitic capacitance is completely discharged, S 3_1 The body diode is turned on. When the drive signal arrives, S... 3_1 Achieving zero-voltage turn-on. In this mode, the inductor L... 1_1 The energy stored in the inductor is transferred to the output side. On the output side, the inductor L... 2_1 Energy storage, output voltage regulator capacitor C o1_1 and C o2_1 Maintain output voltage V respectively o1_1 and V o2_1 Stable. At time t4, the switching transistor S... 3_1 When mode IV ends, the system returns to mode 1, achieving stable periodic operation.

[0120] Within this mode, the inductance L 1_1 The voltage across the terminals is V C1_1 -V o1_1 Inductor L 2_1 The voltage across the terminals is V o1_1 -V o2_1 Flow through inductor L 1_1 current i L1_1 and flowing through inductor L 2_1 current i L2_1 They are respectively:

[0121]

[0122] Among them, i L1_1 (t3) represents the inductor current i at time t3. L1_1 (t) Initial value, i L2_1 (t3) represents the inductor current i at time t3. L2_1(t) Initial value.

[0123] Based on the above analysis, the circuit system of this invention operates in four modes: voltage balance, energy storage, energy circulation, and energy transfer. The proposed single-input multi-output circuit based on a reverse polarity four-switch buck-boost can achieve stable two-way output in single-branch mode. In inductor L... 1_1 and L 2_1 Under the freewheeling effect, all switching transistors in the circuit can achieve zero-voltage turn-on.

[0124] Figures 8 to 14 The figures show the voltage and current waveforms and operating modes of a single-input multiple-output circuit based on a reverse-polarity four-switch buck-boost in multi-branch mode. The inverter half-bridge composed of switches S1 and S2 performs branch multiplexing, and this circuit can achieve 2n port outputs in n-branch mode.

[0125] Operating Mode I: Both branch 1 and branch 2 operate in voltage balance mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 t0-t1 and Figure 9 As shown.

[0126] Operating Mode II: Branch 1 operates in energy storage mode, while branch 2 maintains voltage balance mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 t1-t2 and Figure 10 As shown.

[0127] Operating Mode III: Both branch 1 and branch 2 operate in energy storage mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 t2-t3 and Figure 11 As shown.

[0128] Operating Mode IV: Both branch 1 and branch 2 operate in energy cycling mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 t3-t4 and Figure 12 As shown.

[0129] Operating mode V: Branch 1 operates in energy cycling mode, while branch 2 maintains energy transfer mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 T4-T5 and Figure 13 As shown.

[0130] Operating Mode VI: Both branch 1 and branch 2 operate in energy transfer mode. The voltage and current waveforms and equivalent circuits for this mode are shown below. Figure 8 T5-T6 and Figure 14 As shown.

[0131] The working status of each branch is the same as that of the single branch mode, so it will not be described again.

[0132] In the single-branch mode, the voltage relationship between the two output ports of the circuit system of this invention is as follows:

[0133]

[0134] The actual transmission power P of the first branch of the system 1-out By analyzing the inductor current i in each operating mode L1_1 The integral of (t) is calculated as follows:

[0135]

[0136] Figure 15 This is a schematic diagram of the per-unit power transmission range for a single branch. The maximum output power P of branch 1 in the system is taken as the standard. 1-out-max The per-unit value represents the transmission power of branch 1 in the system. for:

[0137]

[0138] In this embodiment, when the circuit system includes n two-port output branches, the maximum transmission power P of all two-port output branches is... i-out-max The control variables are the same; where i = 1, 2, 3, ..., n, P i-out-max The maximum transmission power of the i-th branch;

[0139] For the first two-port output branch, the maximum transmission power P of the circuit system 1-out-max The control variable conditions are:

[0140]

[0141] In the formula V o1_1 The first output voltage of the first two-port output branch corresponds to the load resistance R. o1_1 f is the operating frequency of the switching transistor.

[0142] Using the current polarity before the switching transistor is turned on as the soft-switching criterion, the soft-switching conditions for each branch of the system are as follows:

[0143]

[0144] In this embodiment, when the circuit system includes n two-port output branches, the zero-voltage turn-on condition of the switching transistor in each two-port output branch is the same.

[0145] For the first two-port output branch, the zero-voltage turn-on condition for the switching transistor is:

[0146]

[0147] In the formula, K1 represents the voltage gain of the first two-port output branch, K1 = V o1_1 / V in .

[0148] Figures 16 to 19 The figure shows the soft-switching range of each switching transistor under different voltage gains and output power conditions. The vertical axis represents the current polarity of each switching transistor at the turn-on moment, which serves as the basis for judging soft switching. The gray plane represents the boundary of the ZVS conduction range. Figures 16 to 19 This indicates that all switches exhibit good soft-switching characteristics under both half-load and full-load conditions. When the system operates in multi-branch mode, switches S1 and S2 are multiplexed switches, and the current flowing through S1 and S2 increases, allowing for further optimization of their soft-switching characteristics. By adjusting various control variables, all switches in the circuit can achieve zero-voltage turn-on over a wide gain and load range.

[0149] The control logic of this implementation can be divided into the following two cases based on the operating conditions:

[0150] In the first operating condition of this embodiment, the first output voltages of the n two-port output branches have a predetermined proportional relationship as follows, that is, the output voltages of each branch have a specific proportional relationship:

[0151] V o1_1 (1-D 2_1 ) = V o1_2 (1-D 2_2 )=···=V o1_n (1-D 2_n (4)

[0152] In the formula V o1_n Let D be the first output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle;

[0153] At this time, the duty cycle D1 of the switching transistor S1 is:

[0154] D1=1+K1(1-D 2_1 )=1+K2(1-D 2_2 )=···=K n (1-D 2_n (5)

[0155] In the formula K n The voltage gain of the nth two-port output branch: K n =V o1-n / V in ;

[0156] The control variables for each branch are determined based on the voltage relationship between the two ports in the same branch:

[0157]

[0158] In the formula V o2_n V is the second output voltage of the nth two-port output branch, where V o2_1 The second output voltage of the first two-port output branch corresponds to the load resistance R. o2_1 ;

[0159] The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment:

[0160]

[0161] Where i = 1, 2, 3, ..., n, L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

[0162] In the second operating condition of this embodiment, the first output voltage of each of the n two-port output branches is independent, that is, the output voltage of each branch has no specific proportional relationship, and the output voltage of each branch can be adjusted.

[0163] At this time, the duty cycle D1 of the switching transistor S1 is:

[0164] D1 = 0.5, (8)

[0165] D 2_i Determined based on the ratio of the first output voltage to the second output voltage of the i-th two-port output branch:

[0166]

[0167] In the formula V o1_n V is the first output voltage of the nth two-port output branch, where V o2_n D is the second output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle;

[0168] The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment:

[0169]

[0170] Where i = 1, 2, 3, ..., n, L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

[0171] Based on the above working mode analysis, it is theoretically demonstrated that the single-input multiple-output circuit based on the reverse polarity four-switch buck-boost in this embodiment can achieve single negative voltage input and multiple positive voltage output. The system control strategy is simple, and it has good soft-switching characteristics and output port expansion capability. Specific implementation examples:

[0173] To verify the effectiveness of the system of this invention, a DC / DC system based on a single negative voltage input and four positive voltage outputs was constructed. The performance of the buck-boost single-input multi-output circuit based on the reverse polarity four-switch transistor was verified by examining the system's positive DC output and the soft-switching characteristics of each switch. The experimental platform constructed is as follows: Figure 20 As shown in Table 1, the experimental parameters in the experimental platform are as follows.

[0174] Table 1 Parameters of the experimental prototype

[0175]

[0176] In the designed circuit, the DC inductor L 2_1 and L 2_2 The inductance value was selected based on simulation results. AC inductance L 1_1 and L 1_2 DC blocking capacitor C 1_1 and C 1_2 The design process is as follows:

[0177]

[0178]

[0179] Where P 1-ou P represents the transmission power of branch 1. 2-out This represents the transmission power of branch 2. The inductance and capacitance of each branch, i.e., L... 1_1 With C 1_1 L 1_2 With C 1_2 The resonant frequencies of the components are all much lower than the operating frequency of the system.

[0180] Figures 21 to 34 These are experimental waveforms of a single-input, four-output circuit based on a reverse polarity four-switch buck-boost. Figures 21 to 26 These are the soft-switching waveforms of the six switching transistors in the circuit. Figures 27 to 30 For steady-state operation, the inductance L in the two branches 1_1 L 2_1 L1_2 L 2_2 The voltage and current waveforms, Figure 31 and Figure 32 The output voltage waveforms for each port are shown. Figure 33 and Figure 34 Input voltage V in The system dynamic waveform during a sudden change. Under a -48V input voltage condition, branch 1 stably outputs 48V and 24V, and branch 2 stably outputs 60V and 36V. Switches S1, S2, and S... 3_1 S 4_1 S 3_2 S 4_2 All systems achieved zero-voltage turn-on. The system is highly efficient, with a peak efficiency of 97.3%. The system efficiency is the overall efficiency from the DC input side to the DC output side, including drive circuit losses and stray losses.

[0181] Based on the above theoretical analysis and experimental verification, the single-input multiple-output circuit based on a reverse polarity four-switch buck-boost converter designed in this invention can achieve multiple stable positive voltage outputs under a single negative voltage input condition. Compared with traditional negative polarity buck-boost circuits and Cuk circuits, the circuit of this invention has fewer switching devices and smaller magnetic components under the same output port conditions. Each switch has good soft-switching characteristics, the system has high efficiency, and the output ports can be further expanded by increasing the number of energy branches. Compared with multiple two-port converters, this invention can effectively reduce costs, is simple to implement, and has stable and reliable performance, showing broad application prospects in the field of 5G RF power amplifier power supply.

[0182] While the invention has been described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the invention. Therefore, it should be understood that many modifications can be made to the exemplary embodiments, and other arrangements can be designed without departing from the spirit and scope of the invention as defined by the appended claims. It should be understood that different dependent claims and features described herein can be combined in ways different from those described in the original claims. It is also understood that features described in conjunction with individual embodiments can be used in other described embodiments.

Claims

1. A single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost, characterized in that... It includes multiplexed inverter half-bridge switches S1 and S2 and n two-port output branches, n = 1, 2, 3, ...; Voltage source V in As a positive power supply, the source of the switching transistor S1 is connected to the voltage source V. in The negative terminal of transistor S1 is connected to the source of transistor S2, and the drain of transistor S2 is connected to the voltage source V. in The positive electrode; The connection point between the drain of switch S1 and the source of switch S2 is taken as the negative connection point of the branch, and the drain of switch S2 is taken as the positive connection point of the branch. The n two-port output branches have the same structure, and each two-port output branch is connected between the negative terminal connection point and the positive terminal connection point of the branch. For the first two-port output branch: Including the switching transistor S 3_1 Switch S 4_1 DC blocking capacitor C 1_1 Inductor L 1_1 Inductor L 2_1 DC output voltage regulator capacitor C o1_1 DC output voltage regulator capacitor C o2_1 Load resistance R o1_1 and load resistance R o2_1 , The negative terminal of the branch is connected to a DC blocking capacitor C. 1_1 The negative terminal, DC blocking capacitor C 1_1 The positive terminal is connected to the inductor L 1_1 One end, inductor L 1_1 The other end is connected to the switching transistor S 4_1 The drain of the switching transistor S 4_1 The source connection branch positive terminal connection point; the switch S 4_1 The drain is connected to the inductor L 2_1 One end, inductor L 2_1 The other end is connected to the DC output voltage regulator capacitor C. o2_1 One end, DC output voltage regulator capacitor C o2_1 The other end is connected to the switching transistor S 4_1 The source; load resistance R o2_1 With DC output voltage regulator capacitor C o2_1 in parallel; Switch S 4_1 The drain of the switching transistor S is connected. 3_1 The source of the switch S 3_1 The drain and the switching transistor S 4_1 A DC output voltage regulator capacitor C is connected between the source and the source. o1_1 Load resistance R o1_1 With DC output voltage regulator capacitor C o1_1 in parallel.

2. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 1, characterized in that, When the circuit system includes n two-port output branches, the complementary turn-on conditions of the switching transistors are the same; For the first two-port output branch, switches S1 and S2 are turned on complementaryly, and switch S... 3_1 and switching transistor S 4_1 Complementary opening; By controlling the switching transistors S1, S2, and S... 3_1 and S 4_1 Duty cycle and switching transistors S1 and S 4_1 Compared to the phase shift, the operation of a single-input multiple-output circuit system is sequentially changed according to four modes: voltage balance, energy storage, energy circulation, and energy transmission, thereby realizing hybrid control of pulse width modulation and phase shift modulation.

3. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 2, characterized in that, When the circuit system includes n two-port output branches, the control variable constraint boundary conditions are the same to make the working process of the single-input multiple-output circuit system change sequentially in four modes: voltage balance, energy storage, energy circulation and energy transmission. For the first two-port output branch, the control variable constraint boundary conditions are as follows: In the formula, D1 is the duty cycle of the switching transistor S1, D 2_1 For the switching transistor S 4_1 The duty cycle, d1 is the switching transistor S1 and S2. 4_1 The shifts between them.

4. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 3, characterized in that, When the circuit system includes n two-port output branches, the maximum transmission power P of all two-port output branches is... i-out-max The conditions for control variables are the same; where i = 1, 2, 3, ..., n; For the first two-port output branch, the maximum transmission power P of the circuit system 1-out-max The control variable conditions are: In the formula V o1_1 The first output voltage of the first two-port output branch corresponds to the load resistance R. o1_1 f is the operating frequency of the switching transistor.

5. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 4, characterized in that, When the circuit system includes n two-port output branches, the zero-voltage turn-on condition of the switching transistors in each two-port output branch is the same. For the first two-port output branch, the zero-voltage turn-on condition for the switching transistor is: In the formula, K1 represents the voltage gain of the first two-port output branch, K1 = V o1_1 / V in .

6. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 5, characterized in that, The first output voltages of the n two-port output branches are made to have the following proportional relationship: V o1_1 (1-D 2_1 )=V o1_2 (1-D 2_2 )=···=V o1_n (1-D 2_n ), (4) In the formula V o1_n Let D be the first output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle; At this time, the duty cycle D1 of the switching transistor S1 is: D1=1+K1(1-D 2_1 )=1+K2(1-D 2_2 )=···=K n (1-D 2_n ), (5) In the formula K n The voltage gain of the nth two-port output branch: K n =V o1-n / V in ; In the formula V o2_n V is the second output voltage of the nth two-port output branch, where V o2_1 The second output voltage of the first two-port output branch corresponds to the load resistance R. o2_1 ; The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment: Where L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

7. The single-input multiple-output circuit system based on a reverse polarity four-switch Buck-boost according to claim 5, characterized in that, Make the first output voltage of each of the n two-port output branches independent; At this time, the duty cycle D1 of the switching transistor S1 is: D1＝0.5， (8) D 2_i Determined based on the ratio of the first output voltage to the second output voltage of the i-th two-port output branch: In the formula V o1_n V is the first output voltage of the nth two-port output branch, where V o2_n D is the second output voltage of the nth two-port output branch. 2_n For the switch S in the nth two-port output branch 4_n Duty cycle; The displacement of each branch is compared to d i Based on the transmission power P of the i-th branch i-out Determined through PI adjustment: Where L 1_i For the i-th two-port output branch, the corresponding inductor L 1_1 The inductance.

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