Array substrate, display panel and display device
By designing a pixel module structure on the array substrate that connects odd-numbered and even-numbered scan lines, the problem of the inability to achieve mixed display of red, green and blue in the prior art is solved, thus improving the display effect and picture quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MIANYANG HKC OPTOELECTRONICS TECH CO LTD
- Filing Date
- 2024-06-11
- Publication Date
- 2026-06-16
Smart Images
Figure CN118486277B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more particularly to an array substrate, a display panel, and a display device. Background Technology
[0002] In the field of display technology, the display refresh rate of a monitor is typically switched according to the application scenario. Dual Line Gate (DLG) technology is a technique that doubles the display frequency when switching the display. When the display frequency is switched, if the DLG function is activated, the gate waveform is split into separate odd-numbered rows and separate even-numbered rows, thus doubling the frequency.
[0003] Currently, the pixel arrangement of existing array substrates includes a first pixel module connected to even-numbered scan lines and a second pixel module connected to odd-numbered scan lines. Both the first and second pixel modules are one of three types: red, green, or blue pixel modules, and the first and second pixel modules are different. For example, the first pixel module is a red pixel module, and the second pixel module is a green pixel module. The first pixel modules of each row are connected to even-numbered scan lines, and the second pixel modules are connected to odd-numbered scan lines.
[0004] When the DLG function is activated under this pixel arrangement, if the odd-numbered scan lines are on and the even-numbered scan lines are off, the first pixel module connected to the even-numbered scan lines cannot be lit up. If the even-numbered scan lines are on and the odd-numbered scan lines are off, the second pixel module connected to the odd-numbered scan lines cannot be lit up. This results in the inability to achieve mixed display of red, green and blue in the same frame when all data lines are on, affecting the display effect.
[0005] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention
[0006] The main objective of this invention is to provide an array substrate, a display panel, and a display device, which aims to solve the technical problem that in the prior art, when all data lines are turned on, red, green, and blue cannot be mixed and displayed in the same frame.
[0007] To achieve the above objectives, the present invention provides an array substrate, the array substrate comprising: a plurality of scan lines arranged in parallel in sequence and a plurality of rows of pixels arranged in an array;
[0008] The pixel module of each row of pixels includes at least: a first pixel module and a second pixel module;
[0009] There exists a first pixel module in at least one row of pixels that is connected to an odd number of scan lines;
[0010] There exists a second pixel module in at least one row of pixels that is connected to an even-numbered row of scan lines;
[0011] When the display frequency is switched, if each of the odd-numbered scan lines is turned on, the first pixel module connected to the odd-numbered scan line is lit; if each of the even-numbered scan lines is turned on, the second pixel module connected to the even-numbered scan line is lit.
[0012] Optionally, each first pixel module in the same even-numbered row of pixels is connected to the same odd-numbered row of scan lines;
[0013] Each second pixel module in the same even-numbered row of pixels is connected to the same even-numbered row of scan lines;
[0014] Each first pixel module in the same odd-numbered row of pixels is connected to the same even-numbered row of scan lines;
[0015] Each second pixel module in the same odd-numbered row of pixels is connected to the same odd-numbered row of scan lines.
[0016] Optionally, each row of scan lines includes at least: a first row of scan lines, a second row of scan lines, a third row of scan lines, and a fourth row of scan lines that are sequentially adjacent;
[0017] The pixel modules connected to the first row of scan lines are the same as those connected to the fourth row of scan lines;
[0018] The second row of scan lines connects to the same pixel modules as the third row of scan lines;
[0019] The pixel module is one of the second pixel module, the first pixel module, or the third pixel module.
[0020] Optionally, two adjacent rows of pixels constitute a pixel structure;
[0021] In each of the pixel structures, the first row of pixels is located between the first row of scan lines and the second row of scan lines, and the next row of pixels is located between the third row of scan lines and the fourth row of scan lines;
[0022] The connection relationship between the pixel module of the previous row of pixels and the first row of scan lines and the second row of scan lines is the first connection relationship;
[0023] The connection relationship between the pixel module of the next row of pixels and the third row of scan lines and the fourth row of scan lines is a second connection relationship;
[0024] The first connection relationship and the second connection relationship are mirror images.
[0025] Optionally, the array substrate further includes: a plurality of data lines arranged sequentially perpendicular to each of the scan lines;
[0026] Adjacent pixel modules constitute a pixel unit, and pixel modules that constitute different pixel units are not repeated;
[0027] Pixel modules within the same pixel unit are all connected to the same data line;
[0028] In the same pixel structure, the pixel units of the previous row of pixels and the pixel units of the next row of pixels are all located on the same side of the connected data line.
[0029] Optionally, each of the pixel structures includes a first type of pixel structure and a second type of pixel structure;
[0030] In the first type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the first side of the connected data line;
[0031] In the second type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the second side of the connected data line;
[0032] Wherein, the first side and the second side are two sides of the same data line, and the data line, the first side of the data line and the second side of the data line are in the same plane.
[0033] Optionally, the pixel module of each row of pixels further includes: a third pixel module;
[0034] The first pixel module, the second pixel module, and the third pixel module are all one of the red pixel module, the green pixel module, and the blue pixel module;
[0035] The pixel modules of both the first type of pixel structure and the second type of pixel structure are arranged in the order of second pixel module, first pixel module and third pixel module, repeating sequentially.
[0036] If the pixel module closest to any data line in the first type of pixel structure is the third pixel module, then the pixel module closest to any data line in the second type of pixel structure is the first pixel module.
[0037] If the pixel module closest to any data line in the first type of pixel structure is the first pixel module, then the pixel module closest to any data line in the second type of pixel structure is the second pixel module;
[0038] If the pixel module in the first type of pixel structure that is closest to any of the data lines is the second pixel module, then the pixel module in the second type of pixel structure that is closest to any of the data lines is the third pixel module.
[0039] Optionally, in each row of pixels, the third pixel module is connected to the odd-numbered row scan line or the even-numbered row scan line on both sides of the pixel row;
[0040] The adjacent third pixel modules are connected to different scan lines.
[0041] In addition, to achieve the above objectives, the present invention also proposes a display panel, the display panel comprising a color filter substrate, a liquid crystal layer and the array substrate described above, wherein the liquid crystal layer is located between the color filter substrate and the array substrate.
[0042] In addition, to achieve the above objectives, the present invention also proposes a display device, the display device comprising a backlight module and the display panel described above, the backlight module being disposed on the back side of the display panel, the backlight module being used to provide a backlight source to the display panel.
[0043] This invention provides an array substrate, a display panel, and a display device. The array substrate includes: multiple parallel scan lines and multiple rows of pixels arranged in an array; a first pixel module in at least one row of pixels is connected to an odd-numbered row of scan lines; and a second pixel module in at least one row of pixels is connected to an even-numbered row of scan lines. Based on this, when the display frequency switches, if each of the odd-numbered scan lines is activated, the first pixel module connected to the odd-numbered scan lines is illuminated; if each of the even-numbered scan lines is activated, the second pixel module connected to the even-numbered scan lines is illuminated. Compared to the prior art where the second pixel module of each row of pixels is connected to an odd-numbered scan line, and the first pixel module is connected to an even-numbered scan line, the pixel arrangement of the array substrate of this invention enables the mixed display of red, green, and blue in the same frame of a mixed-color image when all data lines are activated, effectively improving the display effect. Attached Figure Description
[0044] Figure 1 This is a schematic diagram of the structure of an embodiment of the array substrate of the present invention;
[0045] Figure 2 This is a schematic diagram of the structure of the array substrate in Embodiment 2 of the present invention;
[0046] Figure 3 This is a schematic diagram of the structure of the array substrate of the present invention in embodiment three;
[0047] Figure 4 This is a schematic diagram of a pixel arrangement example of the array substrate of the present invention, embodiment three;
[0048] Figure 5 This is a schematic diagram of the structure of an embodiment of the display panel of the present invention;
[0049] Figure 6 This is a schematic diagram of the structure of an embodiment of the display device of the present invention.
[0050] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0051] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.
[0052] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0053] It should be noted that the descriptions involving "first," "second," etc., in the embodiments of the present invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include at least one of those features. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.
[0054] Reference Figure 1 , Figure 1 This is a schematic diagram of the structure of an embodiment of the array substrate of the present invention.
[0055] In this embodiment, the array substrate includes: multiple scan lines arranged in parallel in sequence and multiple rows of pixels arranged in an array.
[0056] Each pixel module of the pixel in each row includes at least: a first pixel module 1 and a second pixel module 2.
[0057] It should be noted that the first pixel module 1 and the second pixel module 2 can be one of the red pixel module, the green pixel module, and the blue pixel module, and the first pixel module 1 and the second pixel module 2 are different.
[0058] like Figure 1As shown, the scan lines, namely scan line Gate1, scan line Gate2, ..., scan line Gate n-1 and scan line Gate n, are parallel to each other. The number of scan lines is set according to requirements. The pixels in each row are arranged in an array between the scan lines, with the arrangement direction parallel to the scan lines. The pixel modules of each row are arranged in the order of second pixel module 2, first pixel module 1, and third pixel module 3, repeating sequentially. The first row of pixels is located between scan line Gate1 and scan line Gate2, the second row between scan line Gate3 and scan line Gate4, and so on, with the nth row between scan line Gate 2n-1 and scan line Gate 2n. Each scan line is individually connected to a pixel module within the same row.
[0059] The third pixel module 3 can be one of a red pixel module, a green pixel module, or a blue pixel module, and is different from the first pixel module 1 and the second pixel module 2. For example, the first pixel module 1 is a green pixel module, the second pixel module 2 is a red pixel module, and the third pixel module 3 is a blue pixel module.
[0060] There exists a first pixel module 1 in at least one row of pixels that is connected to an odd number of scan lines.
[0061] There exists a second pixel module 2 in at least one row of pixels that is connected to an even number of scan lines.
[0062] When the display frequency is switched, if each of the odd-numbered scan lines is turned on, the first pixel module 1 connected to the odd-numbered scan lines is lit; if each of the even-numbered scan lines is turned on, the second pixel module 2 connected to the even-numbered scan lines is lit.
[0063] It should be noted that in the existing pixel arrangement of the array substrate, since the second pixel module 2 of each row of pixels is connected to the odd-numbered scan lines, and the first pixel module 1 is connected to the even-numbered scan lines, when the DLG function is activated and all data lines are on, if the odd-numbered scan lines are on and the even-numbered scan lines are off, the first pixel module 1 connected to the even-numbered scan lines cannot be lit up. Conversely, if the even-numbered scan lines are on and the odd-numbered scan lines are off, the second pixel module 2 connected to the odd-numbered scan lines cannot be lit up. This results in the inability to achieve monochrome display of the colors corresponding to the first pixel module 1 and the first pixel module 2 in a single frame, thus preventing the mixed display of red, green, and blue in a single frame. For example, when the first pixel module 1 is a green pixel module and the second pixel module 2 is a red pixel module, monochrome display of green and red is not possible, thus preventing the mixed display of red, green, and blue in a single frame.
[0064] To address the aforementioned issues, this embodiment selects at least one row of target pixels in each row of pixels, specifically pixels located between scan line Gate x-1 and scan line Gate x. The first pixel module 1 of the target pixel is connected to the odd-numbered scan line Gate x-1, and the second pixel module 2 of the target pixel is connected to the even-numbered scan line Gate x. When the display frequency switches, the DLG function is enabled, and all data lines are active, if all odd-numbered scan lines are active and all even-numbered scan lines are deactivated, all pixel modules connected to the odd-numbered scan lines are illuminated. Since the first pixel module 1 of the target pixel is connected to the odd-numbered scan lines, in addition to displaying the second pixel module 2, the green display module 1 can also be displayed. If all even-numbered scan lines are active and all odd-numbered scan lines are deactivated, all pixel modules connected to the even-numbered scan lines are illuminated. Since the second pixel module 2 of the target pixel is connected to the even-numbered scan lines, in addition to displaying the first pixel module 1, the red display module 2 can also be displayed, thus achieving a mixed display of red, green, and blue in a single frame.
[0065] This embodiment's array substrate includes: multiple parallel scan lines and multiple rows of pixels arranged in an array; at least one first pixel module in one row of pixels is connected to the odd-numbered scan lines; and at least one second pixel module in one row of pixels is connected to the even-numbered scan lines. Based on this, in this embodiment, when the display frequency switches, if each of the odd-numbered scan lines is turned on, the first pixel module connected to the odd-numbered scan lines is lit; if each of the even-numbered scan lines is turned on, the second pixel module connected to the even-numbered scan lines is lit. Compared to the prior art where the second pixel modules of each row of pixels are all connected to the odd-numbered scan lines, and the first pixel modules are all connected to the even-numbered scan lines, the pixel arrangement of the array substrate in this embodiment enables the mixed display of red, green, and blue in the same frame of a mixed-color image when all data lines are turned on, effectively improving the display effect.
[0066] refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of the array substrate of the present invention, embodiment two.
[0067] Based on the first embodiment described above, in this embodiment, each first pixel module 1 in the same even-numbered row of pixels is connected to the same odd-numbered row of scan lines.
[0068] Each second pixel module 2 in the same even-numbered row of pixels is connected to the same even-numbered row of scan lines.
[0069] Each first pixel module 1 in the same odd-numbered row of pixels is connected to the same even-numbered row of scan lines.
[0070] Each second pixel module 2 in the same odd-numbered row of pixels is connected to the same odd-numbered row of scan lines.
[0071] It should be noted that if the number of target pixels on the array substrate (i.e., the pixels connected to the odd-numbered scan lines by the first pixel module 1 and the pixels connected to the even-numbered scan lines by the second pixel module 2) is less than that of other pixels, although it is possible to achieve mixed display of red, green and blue in a frame, the small number of target pixels results in a darker brightness compared to other pixels when displaying the color corresponding to the first pixel module 1 or the color corresponding to the first pixel module 2, leading to a poor display quality. Therefore, this embodiment is proposed.
[0072] like Figure 2 As shown, taking any two adjacent rows of pixels as an example, scan lines Gate1 and Gate3 are odd-numbered scan lines, and scan lines Gate2 and Gate4 are even-numbered scan lines. Odd-numbered row pixels N1 are located between scan lines Gate1 and Gate2, and even-numbered row pixels N2 are located between scan lines Gate3 and Gate4. Each second pixel module 2 in odd-numbered row pixels N1 is connected to the same odd-numbered scan line Gate1, and each first pixel module 1 in odd-numbered row pixels N1 is connected to the same even-numbered scan line Gate2. Similarly, each second pixel module 2 in even-numbered row pixels N2 is connected to the same even-numbered scan line Gate4, and each first pixel module 1 in even-numbered row pixels N2 is connected to the same odd-numbered scan line Gate3.
[0073] When the display frequency is switched and the DLG function is enabled, if the odd-numbered row scan lines Gate1 and Gate3 are on, and the even-numbered row scan lines Gate2 and Gate4 are off, then the second pixel module 2 in the odd-numbered row pixel N1 is lit up, and the first pixel module 1 in the even-numbered row pixel N2 is lit up, thus achieving a mixed display of red, green, and blue. If the even-numbered row scan lines Gate2 and Gate4 are on, and the odd-numbered row scan lines Gate1 and Gate3 are off, then the first pixel module 1 in the odd-numbered row pixel N1 is lit up, and the second pixel module 2 in the even-numbered row pixel N2 is lit up, thus achieving a mixed display of red, green, and blue. This allows the display to freely switch refresh rates in different scenarios, improving the display experience.
[0074] Therefore, by connecting each red display module 2 of even-numbered row pixels N2 to the same even-numbered row scan line Gate4, and connecting each first pixel module 1 to the same odd-numbered row scan line Gate3, it is possible to achieve mixed display of red, green and blue when only odd-numbered row scan lines are turned on or only even-numbered row scan lines are turned on.
[0075] For each odd-numbered row pixel and each even-numbered row pixel on the array substrate, the connection method between them and each scan line is the same as the connection method of the odd-numbered row pixel N1 and the even-numbered row pixel N2. At this time, the target pixel can be each even-numbered row pixel. When the number of pixel rows is large enough, it can be ensured that the number of odd-numbered row pixels and even-numbered row pixels is the same, that is, the number of target pixels on the array substrate is the same as the number of other pixels. This can solve the above problem, so that when the target pixel displays the color corresponding to the first pixel module 1 or the color corresponding to the first pixel module 2, the brightness is the same as other pixels, thereby making the picture display taste better and effectively improving the display effect.
[0076] Furthermore, in this embodiment, each row of scan lines includes at least: a first row of scan lines, a second row of scan lines, a third row of scan lines, and a fourth row of scan lines that are sequentially adjacent.
[0077] It should be noted that the number of scan lines in the array substrate is not limited to four. In this embodiment, the first row of scan lines, the second row of scan lines, the third row of scan lines, and the fourth row of scan lines can be any four adjacent rows of scan lines in the array substrate.
[0078] The first row of scan lines connects to the same pixel modules as the fourth row of scan lines.
[0079] The second row of scan lines connects to the same pixel modules as the third row of scan lines.
[0080] like Figure 2 As shown, this embodiment uses scan lines Gate1, Gate2, Gate3, and Gate4 to describe the first, second, third, and fourth scan lines, respectively. In odd-numbered rows of pixels N1 and even-numbered rows of pixels N2, the same pixel modules of each row are located in the same column; that is, the second pixel modules 2 of each row of pixels are located in the same column, the first pixel modules 1 of each row of pixels are located in the same column, and the third pixel modules 3 of each row of pixels are located in the same column.
[0081] It should be noted that the pixel module of the odd-numbered row N1 connected to scan line Gate 1 is the same as the pixel module of the even-numbered row N2 connected to scan line Gate 4, and the pixel module of the odd-numbered row N1 connected to scan line Gate 2 is the same as the pixel module of the even-numbered row N2 connected to scan line Gate 3. For example, if the pixel module of the odd-numbered row N1 connected to scan line Gate 1 is the second pixel module 2 in the first column, then the pixel module of the even-numbered row N2 connected to scan line Gate 4 is also the second pixel module 2 in the first column. If the pixel module of the odd-numbered row N1 connected to scan line Gate 2 is the first pixel module 1 in the second column, then the pixel module of the even-numbered row N2 connected to scan line Gate 3 is also the first pixel module 1 in the second column. This ensures that pixel modules in the same column display the same color when lit, further improving the display effect.
[0082] Furthermore, in this embodiment, two adjacent rows of pixels constitute a pixel structure.
[0083] It should be noted that, Figure 2 In a pixel structure, odd-numbered row pixels N1 and even-numbered row pixels N2 are adjacent and can form a pixel structure. Figure 2 Other rows of pixels, not shown, can also be used to form pixel structures by combining adjacent pixels in this way.
[0084] In each of the pixel structures, the first row of pixels is located between the first row of scan lines and the second row of scan lines, and the next row of pixels is located between the third row of scan lines and the fourth row of scan lines.
[0085] The connection relationship between the pixel module of the previous row of pixels and the first row of scan lines and the second row of scan lines is the first connection relationship.
[0086] The connection relationship between the pixel module of the next row of pixels and the third and fourth rows of scan lines is the second connection relationship.
[0087] The first connection relationship and the second connection relationship are mirror images.
[0088] In the specific implementation, Figure 2 To explain, Figure 2In this structure, odd-numbered row pixels N1 serve as the preceding row pixels, and even-numbered row pixels N2 serve as the following row pixels. These odd-numbered row pixels N1 and even-numbered row pixels N2 together constitute a pixel structure. In this pixel structure, the connection relationship between each pixel module of the odd-numbered row pixels N1 and scan lines Gate1 and Gate2 is a first relationship, and the connection relationship between each pixel module of the even-numbered row pixels N2 and scan lines Gate3 and Gate4 is a second relationship. These first and second relationships are mirror images of each other; that is, the connection relationships between odd-numbered row pixels N1 and their corresponding scan lines, and between even-numbered row pixels N2 and their corresponding scan lines, are symmetrical about the central axis of scan lines Gate2 and Gate3.
[0089] for Figure 2 Other pixel structures, not shown, have the same connection relationship with the scan lines as the odd-numbered row pixels N1 and even-numbered row pixels N2 described above. This connection relationship can be referred to, and will not be repeated here. Furthermore, the display effect achievable by each pixel structure is consistent with that achieved by the odd-numbered row pixels N1 and even-numbered row pixels N2, enabling monochrome display of green and red within a single frame.
[0090] It should be understood that in real-world scenarios, when setting multiple rows of pixels, the number of rows may be odd, causing the number of target pixels (as described above) to be inconsistent with the number of other pixels, affecting the display effect. This embodiment achieves multiple rows of pixels by constructing pixel structures and repeatedly setting these structures. Each pixel structure contains the target pixel, ensuring that the number of target pixels is consistent with the number of other pixels, thus resulting in a better display quality and effectively improving the display effect.
[0091] refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of the array substrate of the present invention in embodiment three.
[0092] Based on the second embodiment described above, in this embodiment, the array substrate further includes: a plurality of data lines arranged in sequence perpendicular to each of the scan lines.
[0093] Adjacent pixel modules constitute a pixel unit, and pixel modules that constitute different pixel units are not repeated.
[0094] like Figure 3 As shown, taking any four rows of pixels—first row X1, second row X2, third row X3, and fourth row X4—as an example, data lines Date1 to Date7 are the first to seventh columns of data lines, and scan lines Gate1 to Gate8 are the first to eighth rows of scan lines. Adjacent pixel modules located between two rows of scan lines and two columns of data lines constitute pixel units, such as... Figure 3The second pixel module 2 and the first pixel module 1, located between scan line Gate7, scan line Gate8, data line Date1 and data line Date2, constitute a pixel unit.
[0095] Pixel modules within the same pixel unit are all connected to the same data line.
[0096] For example, taking the first row of pixels X1 as an example, the second pixel module 2 and the first pixel module 1 of the first pixel structure of the pixel in this row are both connected to the data line Date1, the third pixel module 3 and the second pixel module 2 of the second pixel structure are both connected to the data line Date2, and so on. For each row of pixels, the pixel modules in the same pixel unit are all connected to the same data line.
[0097] It should be noted that by connecting all pixel modules in the same pixel unit to the same data line, a long and short hand drive mode can be achieved. For example, in the first pixel unit of the first row of pixels X1, its second pixel module 2 is closer to the data line Date1, while its first pixel module 1 is farther from the data line Date1, thus forming a long and short hand drive mode, resulting in a better display quality.
[0098] Furthermore, the first pixel module 1, connected to the odd-numbered scan lines, is designated as the first target pixel module, and the second pixel module 2, connected to the even-numbered scan lines, is designated as the second target pixel module. When the display frequency is switched (i.e., the DLG function is activated), if all odd-numbered scan lines are turned on, the data lines connected to the first target pixel modules are turned on, while the remaining data lines are turned off. Since all first target pixel modules are connected to odd-numbered scan lines, each first target pixel module in the same column can be individually illuminated, enabling individual display of the color corresponding to the first pixel module 1. For example, when the first pixel module 1 is a green pixel module, green can be displayed separately.
[0099] If all even-numbered scan lines are turned on, the data lines connected to the second target pixel module will be turned on, while the remaining data lines will be turned off. Since all second target pixel modules are connected to even-numbered scan lines, each second target pixel module in the same column can be individually lit, allowing for the individual display of the color corresponding to the second pixel module 2. For example, when the second pixel module 2 is a red pixel module, red can be displayed separately.
[0100] In the same pixel structure, the pixel units of the previous row of pixels and the pixel units of the next row of pixels are all located on the same side of the connected data line.
[0101] For example, Figure 3The pixel structure described below uses the first row of pixels (X1) and the second row of pixels (X2) as an example. In this pixel structure, the pixel units of the first row (X1) and the second row (X2) are both located on the right side of the connected data line. For any pixel structure, the pixel units of the preceding and following rows are located on the same side of the connected data line, ensuring that the colors displayed by pixels in the same column are consistent.
[0102] Furthermore, in this embodiment, each of the pixel structures includes a first type of pixel structure and a second type of pixel structure.
[0103] In the first type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the first side of the connected data line.
[0104] In the second type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the second side of the connected data line.
[0105] Wherein, the first side and the second side are two sides of the same data line, and the data line, the first side of the data line and the second side of the data line are in the same plane.
[0106] It should be noted that, as Figure 3 As shown, the first type of pixel structure can be composed of pixels in the first row X1 and pixels in the second row X2, and the second type of pixel structure can be composed of pixels in the third row X3 and pixels in the fourth row X4. For the first type of pixel structure, the pixel units of pixels in the first row X1 and pixels in the second row X2 are all located on the right side of the connected data line (i.e., the first side). For the second type of pixel structure, the pixel units of pixels in the third row X3 and pixels in the fourth row X4 are all located on the left side of the connected data line (i.e., the second side). Each pixel structure on the array substrate can be arranged in an alternating manner of the first type of pixel structure and the second type of pixel structure, so that corresponding pixel modules are connected to both sides of the same data line, thereby improving the display effect.
[0107] Furthermore, in this embodiment, the pixel module of each row of pixels further includes: a third pixel module 3.
[0108] The first pixel module 1, the second pixel module 2, and the third pixel module 3 are all one of the red pixel module, the green pixel module, and the blue pixel module.
[0109] The pixel modules of both the first type of pixel structure and the second type of pixel structure are arranged in the order of second pixel module 2, first pixel module 1 and third pixel module 3.
[0110] For ease of understanding, please refer to Figure 4 To explain, Figure 4This is a schematic diagram of a pixel arrangement example in Embodiment 3 of the array substrate of the present invention. The first pixel module 1 is a green pixel module G, the second pixel module 2 is a red pixel module R, and the third pixel module 3 is a blue pixel module B. The pixel modules in the first row X1, the second row X2, the third row X3, and the fourth row X4 are arranged in the order of red pixel module R, green pixel module G, and blue pixel module B, repeating sequentially. Adjacent pixel modules between adjacent data lines and adjacent scan lines constitute pixel units, such as... Figure 4 A pixel unit is formed by the red pixel module R and the green pixel module G located between scan lines Gate7, Gate8, Data lines Date1, and Date2. (About...) Figure 4 The data lines and scan lines in the diagram can be found in the descriptions in the other attached diagrams, and will not be repeated here.
[0111] in, Figure 4 The pixel arrangement shown is one example and does not limit the solution. In practical scenarios, the first pixel module 1, the second pixel module 2, and the third pixel module 3 can also be configured differently. Figure 4 Pixel module.
[0112] If the pixel module closest to any data line in the first type of pixel structure is the third pixel module 3, then the pixel module closest to any data line in the second type of pixel structure is the first pixel module 1.
[0113] If the pixel module closest to any data line in the first type of pixel structure is the first pixel module 1, then the pixel module closest to any data line in the second type of pixel structure is the second pixel module 2.
[0114] If the pixel module closest to any data line in the first type of pixel structure is the second pixel module 2, then the pixel module closest to any data line in the second type of pixel structure is the third pixel module 3.
[0115] It should be noted that, as Figure 3As shown, if the pixel module closest to data line Date2 or Date5 in the first type of pixel structure is the third pixel module 3, then the pixel module closest to data line Date2 or Date5 in the second type of pixel structure is the first pixel module 1. If the pixel module closest to data line Date3 or Date6 in the first type of pixel structure is the first pixel module 1, then the pixel module closest to data line Date3 or Date6 in the second type of pixel structure is the second pixel module 2. If the pixel module closest to data line Date1 or Date4 in the first type of pixel structure is the second pixel module 2, then the pixel module closest to data line Date1 or Date4 in the second type of pixel structure is the third pixel module 3. Based on the above connection relationship, it can be ensured that the pixel modules on both sides of the same data line are different, and that the pixel modules of the first and second types of pixel structures are arranged in the order of second pixel module 2, first pixel module 1, and third pixel module 3, thus improving the display effect.
[0116] Furthermore, in this embodiment, in each row of pixels, the third pixel module 3 is connected to the odd-numbered row scan lines or the even-numbered row scan lines on both sides of the pixel row.
[0117] The adjacent third pixel modules are connected to different scan lines.
[0118] For example, with Figure 3 Taking the first row of pixels X1 and the third row of pixels X3 as examples, in the first row of pixels X1, the first third pixel module 3 is connected to scan line Gate 2, the second third pixel module 3 is connected to scan line Gate 1, the third third pixel module 3 is connected to scan line Gate 2, and so on, with the third pixel module 3 alternately connected to scan line Gate 1 and scan line Gate 2. In the third row of pixels X3, the first third pixel module 3 is connected to scan line Gate 6, the second third pixel module 3 is connected to scan line Gate 5, the third third pixel module 3 is connected to scan line Gate 6, and so on, with the third pixel module 3 alternately connected to scan line Gate 5 and scan line Gate 6. For the third pixel module 3 of each row of pixels in the array substrate, adjacent scan lines are alternately connected.
[0119] Furthermore, this application also proposes a display panel, referring to... Figure 5 , Figure 6 This is a schematic diagram of the structure of a display panel embodiment of the present invention. The display panel includes the array substrate 101, a color filter substrate 103 disposed opposite to the array substrate 101, and a liquid crystal layer 102 sandwiched between the array substrate 101 and the color filter substrate 103.
[0120] Furthermore, embodiments of this application also propose a display device, referring to... Figure 6 , Figure 6 This is a schematic diagram of the structure of an embodiment of the display device of the present invention. The display device includes a display panel 100 and a backlight module 200 as described above. The backlight module 200 is disposed on the back side of the display panel 100 and is used to provide a backlight source to the display panel 100.
[0121] Since this display device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here.
[0122] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.
[0123] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0124] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.
Claims
1. An array substrate, characterized in that, The array substrate includes: multiple scan lines arranged in parallel sequence and multiple rows of pixels arranged in an array. The pixel module of each row of pixels includes at least: a first pixel module and a second pixel module; There exists a first pixel module in at least one row of pixels that is connected to an odd number of scan lines; There exists a second pixel module in at least one row of pixels that is connected to an even-numbered row of scan lines; When the display frequency is switched, if each of the odd-numbered scan lines is turned on, the first pixel module connected to the odd-numbered scan line is lit; if each of the even-numbered scan lines is turned on, the second pixel module connected to the even-numbered scan line is lit. The array substrate further includes: multiple data lines arranged perpendicularly to each of the scan lines; Adjacent pixel modules constitute a pixel unit, and pixel modules constituting different pixel units are not repeated; Pixel modules within the same pixel unit are all connected to the same data line.
2. The array substrate as described in claim 1, characterized in that, Each first pixel module in the same even-numbered row of pixels is connected to the same odd-numbered row of scan lines; Each second pixel module in the same even-numbered row of pixels is connected to the same even-numbered row of scan lines; Each first pixel module in the same odd-numbered row of pixels is connected to the same even-numbered row of scan lines; Each second pixel module in the same odd-numbered row of pixels is connected to the same odd-numbered row of scan lines.
3. The array substrate as described in claim 2, characterized in that, Each row of scan lines includes at least: a first row of scan lines, a second row of scan lines, a third row of scan lines, and a fourth row of scan lines that are sequentially adjacent; The pixel modules connected to the first row of scan lines are the same as those connected to the fourth row of scan lines; The second row of scan lines connects to the same pixel modules as the third row of scan lines.
4. The array substrate as described in claim 3, characterized in that, Two adjacent rows of pixels form a pixel structure; In each of the pixel structures, the first row of pixels is located between the first row of scan lines and the second row of scan lines, and the next row of pixels is located between the third row of scan lines and the fourth row of scan lines; The connection relationship between the pixel module of the previous row of pixels and the first row of scan lines and the second row of scan lines is the first connection relationship; The connection relationship between the pixel module of the next row of pixels and the third row of scan lines and the fourth row of scan lines is a second connection relationship; The first connection relationship and the second connection relationship are mirror images.
5. The array substrate as described in claim 4, characterized in that, In the same pixel structure, the pixel units of the previous row of pixels and the pixel units of the next row of pixels are all located on the same side of the connected data line.
6. The array substrate as described in claim 5, characterized in that, Each of the pixel structures includes a first type of pixel structure and a second type of pixel structure; In the first type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the first side of the connected data line; In the second type of pixel structure, the pixel units of the previous row of pixels and the next row of pixels are both located on the second side of the connected data line; The first side and the second side are two sides of the same data line, and the data line, the first side of the data line and the second side of the data line are in the same plane.
7. The array substrate as described in claim 6, characterized in that, The pixel module of each row of pixels also includes: a third pixel module; The first pixel module, the second pixel module, and the third pixel module are all one of the red pixel module, the green pixel module, and the blue pixel module; The pixel modules of both the first type of pixel structure and the second type of pixel structure are arranged in the order of second pixel module, first pixel module and third pixel module. If the pixel module closest to any data line in the first type of pixel structure is the third pixel module, then the pixel module closest to any data line in the second type of pixel structure is the first pixel module. If the pixel module closest to any data line in the first type of pixel structure is the first pixel module, then the pixel module closest to any data line in the second type of pixel structure is the second pixel module; If the pixel module in the first type of pixel structure that is closest to any of the data lines is the second pixel module, then the pixel module in the second type of pixel structure that is closest to any of the data lines is the third pixel module.
8. The array substrate as claimed in claim 7, characterized in that, In each row of pixels, the third pixel module is connected to the odd-numbered row scan line or the even-numbered row scan line on both sides of the pixel row; The adjacent third pixel modules are connected to different scan lines.
9. A display panel, characterized in that, The display panel includes a color filter substrate, a liquid crystal layer, and an array substrate according to any one of claims 1 to 8, wherein the liquid crystal layer is located between the color filter substrate and the array substrate.
10. A display device, characterized in that, The display device includes a backlight module and a display panel as described in claim 9. The backlight module is disposed on the back side of the display panel and is used to provide a backlight source to the display panel.