Processor board power consumption control method, device, processor board and medium

Abstract

The embodiment of the present invention discloses a method, device, processor board and medium for power consumption control of a processor board. The method includes: obtaining the rated power consumption and actual power consumption of the processor board during operation, and determining the power consumption difference between the rated power consumption and the actual power consumption; determining the frequency setting value required for the operation of the processor board according to the power consumption difference and the negative feedback principle; determining the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board; updating the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and performing negative feedback control on the power consumption of the processor board. When performing power consumption control, the frequency coefficient between each processing unit is considered, the power consumption can be reasonably allocated, and the execution energy efficiency of the processor board can be improved under the rated power consumption.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method and device for controlling power consumption of a processor board, a processor board, and a medium. Background Art

[0002] With the development of computer technology, the demand for computer computing power in data processing is increasing, and the resulting energy consumption problem is becoming increasingly prominent.

[0003] In processor boards, Thermal Design Power (TDP) is an important energy consumption control indicator. TDP represents the maximum energy consumption value consumed by the processor board within a certain period of time, and represents the heat dissipation capacity of the processor board. In the design of processor boards, it is necessary to ensure that the thermal design meets the established requirements and to maximize the computing power of the processor board under the established requirements.

[0004] The design scheme of the prior art usually only monitors whether the processor board meets the established energy consumption requirements. When the established energy consumption requirements are met, the operating parameters of the processor board are reduced to reduce energy consumption, which cannot bring into play the maximum computing power of the processor board.

[0005] In addition, in the prior art, there is also a method of using machine learning algorithms to input the operating parameters and energy consumption parameters of the processor board into the machine learning model to obtain reasonable processor board operating parameters and improve computing power. However, the parameter adjustment of the machine learning algorithm is difficult and cannot be well applied in engineering practice. In particular, the ability to handle stability and special scenarios is poor. Summary of the invention

[0006] The present invention provides a power consumption control method and device for a processor board, a processor board and a medium, so as to improve the execution energy efficiency of the processor board and maximize the computing power under rated power consumption.

[0007] According to one aspect of the present invention, a method for controlling power consumption of a processor board is provided, the method comprising:

[0008] Obtaining the rated power consumption and the actual power consumption of the processor board during operation, and determining the power consumption difference between the rated power consumption and the actual power consumption;

[0009] According to the power consumption difference and the negative feedback principle, the frequency setting value required for the processor board to work is determined;

[0010] Determine the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board;

[0011] According to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, the actual power consumption is updated, and negative feedback control is performed on the power consumption of the processor board.

[0012] According to another aspect of the present invention, a power consumption control device for a processor board is provided, the device comprising:

[0013] The power consumption difference determination module is used to obtain the rated power consumption and the actual power consumption of the processor board during operation, and determine the power consumption difference between the rated power consumption and the actual power consumption;

[0014] A frequency setting value determination module, used to determine the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle;

[0015] A frequency value calculation module, used to determine the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board;

[0016] The negative feedback control module is used to update the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and to perform negative feedback control on the power consumption of the processor board.

[0017] According to another aspect of the present invention, there is provided a processor board, the processor board comprising:

[0018] A computing unit and a non-computing unit, a clock source, at least one processor; and a memory in communication connection with the at least one processor; wherein,

[0019] a memory communicatively connected to the at least one processor; wherein,

[0020] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the power consumption control method of the processor board described in any embodiment of the present invention;

[0021] The clock source is used to obtain the computing unit frequency value and the non-computing unit frequency value obtained by the processor executing the power consumption control method of the processor board, and adjust the clock frequencies of the computing unit and the non-computing unit respectively according to the computing unit frequency value and the non-computing unit frequency value.

[0022] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the power consumption control method of the processor board described in any embodiment of the present invention when executed.

[0023] According to another aspect of the present invention, a computer program product is provided, including a computer program, wherein when the computer program is executed by a processor, the method for controlling power consumption of a processor board according to any embodiment of the present invention is implemented.

[0024] The technical solution of the embodiment of the present invention obtains the rated power consumption and actual power consumption of the processor board during operation, and determines the power consumption difference between the rated power consumption and the actual power consumption; determines the frequency setting value required for the processor board when it is working according to the power consumption difference and the negative feedback principle; determines the computing unit frequency value and the non-computing unit frequency value according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board; updates the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and performs negative feedback control on the power consumption of the processor board, thereby solving the energy consumption control problem in the processor board, reasonably allocating the power consumption, improving the execution energy efficiency of the processor board under the rated power consumption, and exerting the maximum computing power; and, by dynamically controlling the energy consumption through negative feedback control, the feasibility of the project can be improved and the stability of the energy consumption control can be ensured.

[0025] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 This is a flowchart of a method for controlling power consumption of a processor board provided in accordance with Embodiment 1 of the present invention;

[0028] Figure 2 This is a negative feedback control structure diagram of a processor card power consumption control provided in accordance with the first embodiment of the present invention;

[0029] Figure 3 This is a flow chart of a method for controlling power consumption of a processor board provided in accordance with Embodiment 2 of the present invention;

[0030] Figure 4 2 is a schematic diagram of the structure of a power consumption control device for a processor board provided according to Embodiment 3 of the present invention;

[0031] Figure 5It is a structural schematic diagram of a processor board provided according to Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0032] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0034] Embodiment 1

[0035] Figure 1 This is a flow chart of a power consumption control method for a processor board provided according to the first embodiment of the present invention. This embodiment is applicable to the situation where the maximum computing power of the processor is exerted by adjusting the frequency of each processing unit in the processor board under the rated power consumption of the processor board. The method can be executed by a power consumption control device of the processor board. The power consumption control device of the processor board can be implemented in the form of hardware and / or software. The power consumption control device of the processor board can be configured in an electronic device such as a processor board. Specifically, the processor board can be an inference accelerator card, such as a graphics processing unit (GPU) accelerator card. Figure 1 As shown, the method includes:

[0036] Step 110: Obtain the rated power consumption and the actual power consumption of the processor board during operation, and determine the power consumption difference between the rated power consumption and the actual power consumption.

[0037] Among them, a power consumption detector can be set in the processor board to monitor the actual power consumption in the processor board. The power consumption detector can be connected in series to the input end of the processor board such as a GPU accelerator card. A microprocessor (Microcontroller Unit, MCU) can be set in the processor board. The MCU can control the interface to read the actual power consumption monitored by the power consumption detector at a certain periodic frequency to control the power consumption of the processor board. Alternatively, a clock source can be set in the processor board. The clock source can output a clock (CLK) of a specific frequency. The power consumption detector can control the power consumption according to the specific frequency clock output by the clock source. The clock source can be configured through the registers in the processor board. For example, in each time window (such as at a frequency of 1 millisecond intervals), the actual power consumption value of the processor board is obtained for negative feedback adjustment to determine the frequency value required to be set for each processing unit in the processor board in the next time window.

[0038] The inventor found in actual research that the power consumption of the processor board can be calculated by the empirical formula OK. In the formula, is the load capacitance value, is the operating voltage, is the flip rate, is the operating frequency of the computing unit, is the leakage current.

[0039] According to the formula, it can be determined that there is a positive correlation between the chip power consumption and even the power consumption of the entire board and the actual operating frequency of the GPU. Since the GPU consumes a lot of power at high operating frequencies, and actual business scenarios will cause power consumption fluctuations, in order to ensure that the TDP of the entire board is controlled within the established rated power consumption, the power consumption difference between the actual power consumption of the entire board and the rated power consumption can be fed back to adjust the actual operating frequency of the GPU so that the final power consumption value approaches the rated power consumption, thereby achieving the power consumption control purpose of the processor board.

[0040] The power consumption difference can be expressed by the formula Error = Actual_Board_Power - Target_Power, where Actual_Board_Power is the actual power consumption obtained at any time, Target_Power is the rated power consumption of the processor board, and Error is the power consumption difference.

[0041] Step 120: Determine the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle.

[0042] Among them, the negative feedback principle can be a negative feedback control implemented according to at least one control principle of proportional control, integral control and differential control in negative feedback. By adjusting and controlling the power consumption difference through the negative feedback principle, the adjustment value required for the frequency (i.e., the current frequency difference) can be obtained. The operating frequency of the processor board can be set according to the adjustment value required for the frequency. The frequency setting value can be understood as the actual frequency value when the operating frequency of the processor board is set. The frequency setting value is obtained on the basis of the adjustment value. For example, the sum of the current frequency value and the adjustment value can be used as the frequency setting value. However, in the actual adjustment, there is a certain deviation between the calculated theoretical result and the actual setting. When determining the frequency setting value, the deviation between the theoretical result and the actual setting can be considered to make the setting frequency more accurate.

[0043] Specifically, in an optional implementation of an embodiment of the present invention, the frequency setting value required for the processor board to work is determined based on the power consumption difference and the negative feedback principle, including: determining the current frequency difference based on the power consumption difference, the power consumption difference at the previous moment, the power consumption difference between the previous two moments, and the proportional-integral-differential control parameter; determining the frequency adjustment calculation value based on the current frequency value and the current frequency difference; determining the frequency setting value required for the processor board to work based on the mapping relationship between the frequency adjustment calculation value and the set value, and the frequency adjustment calculation value.

[0044] Exemplarily, the current frequency difference can be determined by the formula Δlvl=P×(Error-Pre_Error)+I×Error+D×(Error+PPre_Error-2×Pre_Error). Among them, Δlvl is the current frequency difference, Error is the power consumption difference obtained at the current moment, Pre_Error is the power consumption difference at the previous moment, PPre_Error is the power consumption difference between the previous two moments, P is the proportional coefficient, I is the integral coefficient, and D is the differential coefficient. The specific parameter values ​​of P, I, and D can be adjusted through practical applications based on the negative feedback principle so that the negative feedback control reaches a steady state. The reliability and stability of power consumption management and control can be improved through proportional integral differential control.

[0045] The frequency adjustment calculation value may be the difference between the current frequency value and the current frequency difference value. The mapping relationship between the frequency adjustment calculation value and the set value may be determined based on actual application observations. Exemplarily, the frequency setting value required for the processor board to work may be determined by SetClkLvl=Kpll×(CurrentClklvl-Δlvl). In the formula, SetClkLvl is the frequency setting value, Kpll is the mapping relationship between the frequency adjustment calculation value and the set value, and CurrentClklvl is the current frequency value. By mapping the frequency adjustment calculation value to the set value, the frequency adjustment calculation value is accurately converted to the frequency setting value, which can ensure the reliability of frequency adjustment in power consumption control.

[0046] Step 130: Determine the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board.

[0047] In the embodiment of the present invention, the non-computing unit includes but is not limited to a data transmission unit and a data storage unit. The frequency coefficient between the computing unit and the non-computing unit can be determined according to the busyness of each unit in the processor board in an actual application. For example, when the computing unit is busier, a larger frequency value can be set for the computing unit; when the non-computing unit is busier, a larger frequency value can be set for the non-computing unit. Based on this rule, the frequency coefficient between the computing unit and the non-computing unit can be set.

[0048] In practice, the inventors consider that the busyness of the data transmission unit and the data storage unit is almost synchronized, and in order to simplify the workload of power consumption control, only the frequency control of the data transmission unit can be considered in the negative feedback control. The frequency value of the data storage unit can be synchronized with the data transmission unit.

[0049] For example, Figure 2 1 is a negative feedback control structure diagram of a processor card power consumption control according to the first embodiment of the present invention. Figure 2 As shown, based on the power consumption difference between the rated power consumption and the actual power consumption, the frequency value of the calculation unit can be controlled by PID to form a first negative feedback control loop; and the frequency value of the calculation unit and the frequency value of the data transmission unit can be negatively feedback controlled by the frequency coefficient to form a second negative feedback control loop. The frequency setting of the data storage unit can be increased or decreased synchronously with the data transmission unit.

[0050] Specifically, the formula ClkStep compute_clk =λ×ClkStep I / O_clk Represents the control relationship of the second negative feedback control loop. Where λ is the frequency coefficient between the calculation unit and the data transmission unit, ClkStep compute_clkClkStep is the minimum granularity of the operating frequency of the computing unit. I / O_clk The minimum granularity of the data transmission unit operating frequency. The unit frequency value can be calculated by SetClkLvl(t)×ClkStep compute_clk The frequency value of non-computational units such as data transmission units can be determined by SetClkLvl(t)×ClkStep I / O_clk Sure.

[0051] In an embodiment of the present invention, by taking the frequency coefficient between the computing unit and the non-computing unit in the processor board into consideration in the negative feedback control loop of power consumption control, the actual operation situation of the processor board can be taken into consideration, thereby improving the execution performance of the processor board in the power consumption control of the processor board and bringing into play the maximum computing power of the processor.

[0052] Step 140: Update the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and perform negative feedback control on the power consumption of the processor board.

[0053] In negative feedback control, the actual power consumption can be calculated by the formula Actual_Board_Power(t)=G×(SetClkLvl(t)×ClkStep compute_clk )+ F×SetClkLvl(t)×ClkStep I / O_clk ) is determined. Wherein, Actual_Board_Power(t) is the actual power consumption determined at time t in the negative feedback control, G represents the transfer function of the processor board power consumption and the operating frequency of the computing unit, and F represents the transfer function of the processor board power consumption and the operating frequency of the non-computing unit (such as the data transmission unit). The transfer function can be set according to actual needs, and the embodiment of the present invention does not specifically limit this.

[0054] After the actual power consumption is updated through the transfer function in the negative feedback control, it can be calculated based on Figure 2 As shown in the structure diagram, the operating frequency of each processing unit (computing unit and non-computing unit) in the processor board is adjusted to achieve power consumption control of the processor board. By considering the frequency coefficient between each processing unit for frequency adjustment, power consumption control that maximizes the performance of the processor board is achieved under rated power consumption. In addition, the negative feedback control method also ensures the feasibility and controllable stability of the engineering stage.

[0055] The operating frequency of each processing unit in the processor board can be set by the clock source in the processor board.

[0056] The technical solution of this embodiment obtains the rated power consumption and actual power consumption of the processor board during operation, and determines the power consumption difference between the rated power consumption and the actual power consumption; determines the frequency setting value required for the processor board when it is working according to the power consumption difference and the negative feedback principle; determines the computing unit frequency value and the non-computing unit frequency value according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board; updates the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and performs negative feedback control on the power consumption of the processor board, thereby solving the energy consumption control problem in the processor board, reasonably allocating the power consumption, improving the execution energy efficiency of the processor board under the rated power consumption, and exerting the maximum computing power; and, by dynamically controlling energy consumption through negative feedback control, the feasibility of the project can be improved and the stability of energy consumption control can be ensured.

[0057] Embodiment 2

[0058] Figure 3 1 is a flowchart of a method for controlling power consumption of a processor board provided according to Embodiment 2 of the present invention. This embodiment is a further refinement of the above technical solution. The technical solution in this embodiment can be combined with each optional solution in one or more of the above embodiments. Figure 3 As shown, the method includes:

[0059] Step 310: Obtain the rated power consumption and the actual power consumption of the processor board during operation, and determine the power consumption difference between the rated power consumption and the actual power consumption.

[0060] Step 320: Determine the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle.

[0061] In an optional implementation of an embodiment of the present invention, the frequency setting value required for the processor board to work is determined based on the power consumption difference and the negative feedback principle, including: determining the current frequency difference based on the power consumption difference, the power consumption difference at the previous moment, the power consumption difference between the previous two moments, and the proportional-integral-differential control parameter; determining the frequency adjustment calculation value based on the current frequency value and the current frequency difference; determining the frequency setting value required for the processor board to work based on the mapping relationship between the frequency adjustment calculation value and the set value, and the frequency adjustment calculation value.

[0062] Step 330: Obtain the impact index of the computing unit and the non-computing unit on the performance of the processor board according to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function.

[0063] The busyness can be determined by counting whether each processing unit works in each clock cycle within the statistical period. For example, when a computing unit or a non-computing unit works in its clock cycle, 1 can be added by the counter inside the unit. Specifically, within a certain statistical period T, the count output by the processing unit is f×T0. f is the working frequency of the processing unit, and T0 is the working time of the processing unit within the statistical period T. In different statistical periods, the counter can be re-counted. The busyness of each processing unit can be determined by T0 / T.

[0064] The pre-trained weight matrix is ​​used to represent the impact of the frequency of computing units and non-computing units on the performance of the processor board. There are many ways to determine the pre-trained weight matrix. For example, the performance of the processor board and the corresponding operating frequency of each processing unit can be collected, and the relationship between them can be learned through a neural network model to obtain a pre-trained weight matrix. Alternatively, the performance of each processor unit of the processor board when running the same operation at different operating frequencies is obtained, and the relationship between performance changes and operating frequency changes is analyzed to determine the pre-trained weight matrix. For another example, the pre-trained weight matrix can be set by management personnel based on actual experience.

[0065] In an embodiment of the present invention, the pre-trained weight matrix may be determined in the following manner to improve the reliability of the pre-trained weight matrix and more accurately reflect the impact of the operating frequency of each processing unit on the performance of the processor board.

[0066] Optionally, before obtaining the impact indicators of the computing units and non-computing units on the processor board performance respectively according to the busyness of the computing units and non-computing units, the pre-trained weight matrix, and the activation function, it also includes: obtaining the actual frequency combination of the computing units and the non-computing units in actual work and the corresponding actual values ​​of the processor board performance; multiplying the actual frequency combination with the current value of the pre-trained weight matrix to obtain the calculated value of the processor board performance; adjusting the current value of the pre-trained weight matrix according to the actual performance value and the calculated performance value; returning to the step of obtaining the actual frequency combination of the computing units and the non-computing units in actual work and the corresponding actual values ​​of the processor board performance, until the iteration termination condition is reached to obtain the pre-trained weight matrix.

[0067] Among them, when adjusting the current value of the pre-trained weight matrix, it can be based on the criterion that the performance calculation value tends to the actual performance value. The specific adjustment method is not specifically limited in the embodiment of the present invention. For example, the parameter adjustment mechanism of the neural network model can be referred to, and the deviation between the performance calculation value and the actual performance value can be characterized by the loss function. By making the deviation meet the iteration termination condition, the current value of the pre-trained weight matrix is ​​adjusted. The iteration termination condition can be that the number of iterations is reached, or the deviation is less than the set value, etc.

[0068] The pre-trained weight matrix may have an initial value. The initial value of the pre-trained weight matrix may be a random value, or an empirically set value, or may be set according to the influence of the actual operating frequency of each processing unit on the performance.

[0069] On the basis of the above implementation, optionally, the method for determining the pre-trained weight matrix can be: collecting the processor board performance values ​​when the computing unit and the non-computing unit perform the same operation under each frequency combination, and forming a training sample set for each frequency combination and the corresponding processor board performance value; determining a benchmark sample in the training sample set, and screening reference samples in the training sample set that have a single frequency difference with the frequency combination of the benchmark sample; calculating the processor board performance fluctuation ratio of the reference sample relative to the benchmark sample due to the single frequency difference; and generating the initialization value of the pre-trained weight matrix according to the performance fluctuation ratios corresponding to the computing unit and the non-computing unit respectively.

[0070] The performance fluctuation ratio may be determined by: calculating the performance difference between the reference sample and the benchmark sample, calculating the single frequency difference between the reference sample and the benchmark sample; and using the ratio of the performance difference to the single frequency difference as the performance fluctuation ratio of the processing unit corresponding to the single frequency difference to the processor board when the operating frequency changes. The performance fluctuation ratios of each processing unit to the processor board when the operating frequency changes are arranged to generate the initialization value of the pre-trained weight matrix.

[0071] By combining the initialization value of the pre-trained weight matrix with the actual processor board operation data for training and adjustment, the accuracy of the pre-trained weight matrix can be improved. When determining the pre-trained weight matrix, the influence index of the computing unit and the non-computing unit on the performance of the processor board can be determined based on the pre-trained weight matrix.

[0072] When determining the influencing index, there are many ways to select the activation function. The main purpose of selecting the activation function is to add nonlinear factors when determining the influencing index to increase the stability of energy consumption control; and map the influencing index between the interval (0,1). Exemplary, the activation function can select the sigmoid function. The influencing index can be understood as the weight of the influence of each processing unit on the performance of the processor board. If the influencing index tends to 1, it means that the processing unit is currently very busy. At this time, if the operating frequency of the processing unit is increased, the performance of the processor board can be significantly improved. If the influencing index tends to 0, it means that the current load of the processing unit is very light. At this time, if the operating frequency of the processing unit is increased, the performance of the processor board will be little affected.

[0073] The impact index of each processing unit on the performance of the processor board can be obtained by multiplying the busyness of the processing unit, the pre-trained weight matrix, and the activation function.

[0074] Step 340: Determine the frequency coefficient between the computing unit and the non-computing unit according to each influencing index.

[0075] Among them, through each influencing index, it can be determined which processing unit the performance bottleneck of the processor board is limited by, and the frequency coefficient is fed back to increase the operating frequency of the processing unit limited by the performance bottleneck, thereby improving the performance of the processor board. For example, if the influencing index of the computing unit is large, the frequency coefficient can be increased; if the influencing index of the computing unit is small, the frequency coefficient can be reduced.

[0076] In order to improve the accuracy of frequency coefficient setting, in an optional implementation of an embodiment of the present invention, the frequency coefficient between the computing unit and the non-computing unit is determined according to each influencing index, including: normalizing each influencing index to obtain the relative influence index of the computing unit and the non-computing unit on the performance of the processor board respectively; determining the frequency coefficient between the computing unit and the non-computing unit according to a preset mapping table between the relative influence index and the frequency coefficient, and each relative influence index.

[0077] By normalizing, the sum of the relative impact indicators corresponding to the computing unit, the data transmission unit, and the data storage unit can be made to be 1, so as to better compare the magnitudes of the impact indicators. The preset mapping table can be obtained by testing the performance optimization of the actual processor board. For example, Table 1 is an exemplary preset mapping table between relative impact indicators and frequency coefficients provided according to Embodiment 2 of the present invention.

[0078] Table 1

[0079]

[0080] According to Table 1, if the relative impact index of the computing unit is greater than or equal to 0.5, it indicates that the current computing unit is relatively busy, and the bottleneck for improving performance is in the computing unit. Therefore, the frequency of the computing unit should be higher than that of other processing units, and the λ value should be set larger. For example, when the relative impact index of the computing unit is greater than or equal to 0.8, the λ value is set to 1.4; when the relative impact index of the computing unit is greater than or equal to 0.7 and less than 0.8, the λ value is set to 1.3; when the relative impact index of the computing unit is greater than or equal to 0.6 and less than 0.5, the λ value is set to 1.2; when the relative impact index of the computing unit is greater than or equal to 0.5 and less than 0.6, the λ value is set to 1.1. If the relative impact index of the data transmission unit is greater than 0.5 and the data storage unit is greater than 0.4, it indicates that the output transmission link is relatively busy and the storage unit has a heavy task. Therefore, it is necessary to release the pressure of the storage unit, the frequency of the output transmission unit should be further increased, and the λ value should be set to a smaller value, such as 0.8. If the relative impact index of the data transmission unit is greater than 0.5 and the data storage unit is less than or equal to 0.4, the λ value should be set to 0.9. For other cases, the λ value can be set to 1.

[0081] By adjusting the frequency coefficient according to the relative impact index through the preset mapping table in Table 1, the accuracy of the frequency coefficient determination can be improved, thereby improving the execution performance of the processor board during energy consumption control, and ensuring that the maximum computing power of the processor board is exerted under rated power consumption.

[0082] Step 350: Determine the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board.

[0083] Step 360: Update the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and perform negative feedback control on the power consumption of the processor board.

[0084] The technical solution of the embodiment of the present invention obtains the rated power consumption and actual power consumption of the processor board during operation, and determines the power consumption difference between the rated power consumption and the actual power consumption; determines the frequency setting value required for the processor board when it is working according to the power consumption difference and the negative feedback principle; obtains the influence indexes of the computing unit and the non-computing unit on the performance of the processor board according to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function; determines the frequency coefficient between the computing unit and the non-computing unit according to each influencing index; determines the computing unit frequency value and the non-computing unit frequency value according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board; updates the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and performs negative feedback control on the power consumption of the processor board, thereby solving the energy consumption control problem in the processor board; by accurately determining the frequency coefficient, the power consumption can be reasonably allocated, and the execution energy efficiency of the processor board can be improved under the rated power consumption, and the maximum computing power can be exerted; and the dynamic control of energy consumption through negative feedback control can improve the feasibility of the project and ensure the stability of energy consumption control.

[0085] Embodiment 3

[0086] Figure 4 1 is a schematic diagram of the structure of a power consumption control device for a processor card according to Embodiment 3 of the present invention. Figure 4 As shown, the device includes: a power consumption difference determination module 410, a frequency setting value determination module 420, a frequency value calculation module 430 and a negative feedback control module 440. Among them:

[0087] The power consumption difference determination module 410 is used to obtain the rated power consumption and the actual power consumption of the processor board during operation, and determine the power consumption difference between the rated power consumption and the actual power consumption;

[0088] The frequency setting value determination module 420 is used to determine the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle;

[0089] A frequency value calculation module 430, for determining a frequency value of a computing unit and a frequency value of a non-computing unit according to a frequency setting value and a frequency coefficient between a computing unit and a non-computing unit in a processor board;

[0090] The negative feedback control module 440 is used to update the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and to perform negative feedback control on the power consumption of the processor board.

[0091] Optionally, the device further includes:

[0092] The influence index determination module is used to obtain the influence index of the computing unit and the non-computing unit on the performance of the processor board according to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function before determining the computing unit frequency value and the non-computing unit frequency value according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board;

[0093] Among them, the pre-trained weight matrix is ​​used to represent the impact of the frequency of the computing unit and the non-computing unit on the performance of the processor board;

[0094] The frequency coefficient determination module is used to determine the frequency coefficient between the calculation unit and the non-calculation unit according to each influencing index.

[0095] Optionally, a frequency coefficient determination module includes:

[0096] A relative impact index determination unit is used to normalize each impact index to obtain the relative impact index of the computing unit and the non-computing unit on the performance of the processor board;

[0097] The frequency coefficient determination unit is used to determine the frequency coefficient between the calculation unit and the non-calculation unit according to a preset mapping table between the relative influence index and the frequency coefficient and each relative influence index.

[0098] Optionally, the frequency setting value determination module 420 includes:

[0099] A current frequency difference determination unit, used to determine the current frequency difference according to the power consumption difference, the power consumption difference at the previous moment, the power consumption difference between the previous two moments, and a proportional-integral-differential control parameter;

[0100] A frequency adjustment calculation value determination unit, used to determine the frequency adjustment calculation value according to the current frequency value and the current frequency difference;

[0101] The frequency setting value determination unit is used to determine the frequency setting value required when the processor board is working according to the mapping relationship between the frequency adjustment calculation value and the setting value, and the frequency adjustment calculation value.

[0102] Optionally, the device further includes:

[0103] The actual execution data acquisition module is used to obtain the actual frequency combination of the computing unit and the non-computing unit in actual work and the corresponding actual value of the processor board performance before obtaining the influence index of the computing unit and the non-computing unit on the performance of the processor board according to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function;

[0104] The performance calculation value determination module is used to multiply the actual frequency combination with the current value of the pre-trained weight matrix to obtain the processor board performance calculation value;

[0105] A pre-trained weight matrix adjustment module is used to adjust the current value of the pre-trained weight matrix according to the actual performance value and the performance calculation value;

[0106] The module is repeatedly executed to return to the step of obtaining the actual frequency combination of the computing unit and the non-computing unit in actual operation and the corresponding actual value of the processor board performance until the iteration termination condition is reached to obtain the pre-trained weight matrix.

[0107] Optionally, the device further includes:

[0108] The training sample set forming module is used to collect the processor board performance values ​​when the computing unit and the non-computing unit perform the same operation under each frequency combination, and form a training sample set with each frequency combination and the corresponding processor board performance value;

[0109] A reference sample determination module is used to determine a benchmark sample in the training sample set, and to select a reference sample in the training sample set that has a single frequency difference from the frequency combination of the benchmark sample;

[0110] A performance fluctuation ratio calculation module, used to calculate the processor board performance fluctuation ratio of the reference sample relative to the benchmark sample due to a single frequency difference;

[0111] The initialization value generation module is used to generate the initialization value of the pre-trained weight matrix according to the performance fluctuation ratios corresponding to the computing unit and the non-computing unit respectively.

[0112] The power consumption control device of the processor board provided in the embodiment of the present invention can execute the power consumption control method of the processor board provided in any embodiment of the present invention, and has the functional modules and beneficial effects corresponding to the execution method.

[0113] Embodiment 4

[0114] Figure 5 1 is a schematic diagram of the structure of a processor board provided according to Embodiment 4 of the present invention. Figure 5 As shown, the processor board 500 includes: a computing unit 510 and a non-computing unit 520, a clock source 530, at least one processor 511; and a memory 540 that is communicatively connected to the at least one processor 511.

[0115] The memory 540 stores a computer program that can be executed by at least one processor 511. The computer program is executed by at least one processor 511 so that the at least one processor 511 can execute the power consumption control method of the processor board provided in any embodiment of the present invention.

[0116] Clock source 530 is used to obtain the computing unit frequency value and non-computing unit frequency value obtained by the processor 511 executing the power consumption control method of the processor board, and adjust the clock frequencies of the computing unit and the non-computing unit respectively according to the frequency value of the computing unit 510 and the frequency value of the non-computing unit 520.

[0117] A power management unit 550 may be further provided in the processor board 500 to provide power to various devices in the processor board 500. The non-computing unit 520 may include a data transmission unit 521 and a data storage unit 522. A power consumption detector 560 may also be provided on the processor board 500 to detect the actual power consumption of the processor board 500.

[0118] The processor board in the embodiment of the present invention can exert the maximum computing power of the processor board under rated power consumption by executing the power consumption control method of the processor board.

[0119] The power consumption control method of the processor board may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit.

[0120] The various embodiments described herein may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs, which may be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general programmable processor, which may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0121] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0122] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0123] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0124] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0125] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0126] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0127] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for controlling power consumption of a processor board, characterized in that: include: Obtaining the rated power consumption and the actual power consumption of the processor board during operation, and determining the power consumption difference between the rated power consumption and the actual power consumption; According to the power consumption difference and the negative feedback principle, the frequency setting value required for the processor board to work is determined; The negative feedback principle includes negative feedback control implemented according to at least one control principle of proportional control, integral control and differential control in negative feedback; determining the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle, including: adjusting and controlling the power consumption difference through the negative feedback principle to obtain the required adjustment value of the frequency; setting the operating frequency of the processor board according to the required adjustment value of the frequency; According to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board, the computing unit frequency value and the non-computing unit frequency value are determined; wherein the computing unit frequency value is obtained by SetClkLvl(t)×ClkStep compute_clk Determine the frequency value of the non-computational unit by SetClkLvl(t)×ClkStep I / O_clk OK, ClkStep compute_clk =λ×ClkStep I / O_clk , λ is the frequency coefficient, ClkStep compute_clk ClkStep is the minimum granularity of the operating frequency of the computing unit. I / O_clk is the minimum granularity of the operating frequency of the non-computing unit, and SetClkLvl is the frequency setting value; According to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, the actual power consumption is updated, and the power consumption of the processor board is negatively feedback controlled; wherein the actual power consumption is calculated by the formula Actual_Board_Power(t)=G×(SetClkLvl(t)×ClkStep compute_clk )+ F×SetClkLvl(t)×ClkStep I / O_clk ), Actual_Board_Power(t) is the actual power consumption determined at time t in the negative feedback control, G represents the transfer function between the processor board power consumption and the computing unit operating frequency, and F represents the transfer function between the processor board power consumption and the non-computing unit operating frequency.

2. The method according to claim 1, characterized in that Before determining the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board, the method further includes: According to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function, the impact index of the computing unit and the non-computing unit on the performance of the processor board is obtained; The pre-trained weight matrix is ​​used to represent the influence of the frequencies of the computing unit and the non-computing unit on the performance of the processor board; According to each influencing index, the frequency coefficient between the calculation unit and the non-computational unit is determined.

3. The method according to claim 2, characterized in that According to each influencing index, the frequency coefficient between the calculation unit and the non-computational unit is determined, including: Each influencing index is normalized to obtain the relative influencing indexes of the computing unit and the non-computing unit on the performance of the processor board; The frequency coefficient between the calculation unit and the non-calculation unit is determined according to a preset mapping table between the relative influence index and the frequency coefficient and each relative influence index.

4. The method according to claim 1, characterized in that: According to the power consumption difference and the negative feedback principle, the frequency setting value required for the processor board to work is determined, including: Determine the current frequency difference according to the power consumption difference, the power consumption difference at the previous moment, the power consumption difference between the previous two moments, and the proportional-integral-differential control parameter; Determining a frequency adjustment calculation value according to the current frequency value and the current frequency difference; The frequency setting value required for the processor board to work is determined according to the mapping relationship between the frequency adjustment calculation value and the setting value, and the frequency adjustment calculation value.

5. The method according to claim 2, characterized in that: Before obtaining the impact index of the computing unit and the non-computing unit on the performance of the processor board according to the busyness of the computing unit and the non-computing unit, the pre-trained weight matrix, and the activation function, the following is also included: Obtaining the actual frequency combination of the computing unit and the non-computing unit in actual operation and the corresponding actual value of the processor board performance; Multiplying the actual frequency combination by the current value of the pre-trained weight matrix to obtain a processor board performance calculation value; Adjusting the current value of the pre-trained weight matrix according to the actual performance value and the calculated performance value; Return to the step of obtaining the actual frequency combination of the computing unit and the non-computing unit in actual operation and the corresponding actual value of the processor board performance until the iteration termination condition is reached to obtain the pre-trained weight matrix.

6. The method according to claim 5, characterized in that Also includes: Collecting processor board performance values ​​when the computing unit and the non-computing unit perform the same operation under each frequency combination, and forming a training sample set with each frequency combination and the corresponding processor board performance value; Determine a benchmark sample in the training sample set, and select a reference sample in the training sample set that has a single frequency difference from the frequency combination of the benchmark sample; Calculating a processor board performance fluctuation ratio of the reference sample relative to the benchmark sample due to a single frequency difference; The initialization value of the pre-trained weight matrix is ​​generated according to the performance fluctuation ratios corresponding to the computing unit and the non-computing unit respectively.

7. A power consumption control device for a processor board, characterized in that: include: The power consumption difference determination module is used to obtain the rated power consumption and the actual power consumption of the processor board during operation, and determine the power consumption difference between the rated power consumption and the actual power consumption; A frequency setting value determination module, used to determine the frequency setting value required for the processor board to work according to the power consumption difference and the negative feedback principle; The negative feedback principle includes negative feedback control implemented according to at least one control principle of proportional control, integral control and differential control in negative feedback; the frequency setting value determination module is specifically used to: adjust and control the power consumption difference through the negative feedback principle to obtain the required adjustment value of the frequency; set the operating frequency of the processor board according to the required adjustment value of the frequency; The frequency value calculation module is used to determine the frequency value of the computing unit and the frequency value of the non-computing unit according to the frequency setting value and the frequency coefficient between the computing unit and the non-computing unit in the processor board; wherein the frequency value of the computing unit is determined by SetClkLvl(t)×ClkStep compute_clk Determine the frequency value of the non-computational unit by SetClkLvl(t)×ClkStep I / O_clk OK, ClkStep compute_clk =λ×ClkStep I / O_clk , λ is the frequency coefficient, ClkStep compute_clk ClkStep is the minimum granularity of the operating frequency of the computing unit. I / O_clk is the minimum granularity of the operating frequency of the non-computing unit, and SetClkLvl is the frequency setting value; The negative feedback control module is used to update the actual power consumption according to the computing unit frequency value, the non-computing unit frequency value, and the transfer function in the negative feedback, and perform negative feedback control on the power consumption of the processor board; wherein the actual power consumption is calculated by the formula Actual_Board_Power(t)=G×(SetClkLvl(t)×ClkStep compute_clk )+ F×SetClkLvl(t)×ClkStep I / O_clk ), Actual_Board_Power(t) is the actual power consumption determined at time t in the negative feedback control, G represents the transfer function between the processor board power consumption and the computing unit operating frequency, and F represents the transfer function between the processor board power consumption and the non-computing unit operating frequency.

8. A processor board, characterized in that: The processor board includes: a computing unit and a non-computing unit, a clock source, at least one processor; and a memory connected to the at least one processor in communication; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the power consumption control method of the processor board according to any one of claims 1 to 6; The clock source is used to obtain the computing unit frequency value and the non-computing unit frequency value obtained by the processor executing the power consumption control method of the processor board, and adjust the clock frequencies of the computing unit and the non-computing unit respectively according to the computing unit frequency value and the non-computing unit frequency value.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the power consumption control method of a processor board according to any one of claims 1 to 6 when executed.

10. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the power consumption control method of a processor board according to any one of claims 1 to 6.

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