Method and system for writing data to improve performance
By determining the space range and optimizing the writing process during FLASH data writing, and by combining direct erase/write or power-off protected write, along with RAM cache and parallel processing, the problem of slow FLASH data writing performance is solved, achieving more efficient data writing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUHAN TIANYU INFORMATION IND
- Filing Date
- 2024-08-30
- Publication Date
- 2026-06-19
AI Technical Summary
In existing technologies, FLASH data writing is slow due to the need for backup writes and power failure protection.
By determining whether the space to be written is in the newly allocated space list, the write operation can be directly written using erase or power-off protection, reducing backup write operations. Furthermore, the write process is optimized by using the RAM cache and parallel processing of the page erase backup area flags during transaction-based write operations.
It improves the performance of single writes and transactional writes, reduces write time, and enhances data writing efficiency.
Smart Images
Figure CN119088311B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of embedded systems, and more particularly to a method and system for improving the performance of writing FLASH data. Background Technology
[0002] In the embedded systems field, data storage mostly uses FLASH. FLASH chips have the characteristic of requiring full-page erasure; that is, before each write operation, a page must be erased first, and then the write operation can proceed. Some pages are 256 bytes, and some are 512 bytes. If only one byte is to be written, the entire page of data cache will be read first, the specific byte will be modified, then the page will be erased, and finally the modified cached data will be written to ensure that the byte is written successfully.
[0003] Following the above process, if a power outage occurs after erasing a page, the entire page's data will change, affecting previous data in the Flash memory. To avoid this, the data to be erased is typically saved before erasing. The process is as follows: first, the page data to be erased is written to the Flash backup area; then, the backup area's validity flag is written; then, the actual data is erased; finally, the backup area's validity flag is cleared. Upon power-on, the backup area flag is checked to see if a power outage occurred during the writing process. If a power outage did occur, the previously backed-up data is restored. This method ensures the correctness of the written data. However, this process involves writing to the backup area, setting the backup area flag, and erasing the backup area flag, resulting in slower performance.
[0004] A transaction mechanism ensures that multiple write operations either all succeed or none succeed. To implement this mechanism, a FLASH transaction buffer is needed. Each write operation first writes to the transaction buffer, sets the transaction buffer to be valid, then writes the actual data to protect it from power loss, and finally invalidates the transaction buffer when the transaction is committed. However, this process involves repeatedly writing to the transaction buffer, setting and erasing its validity flag, which leads to performance degradation.
[0005] To write data to Flash, first write the data of the page to be erased to the Flash backup area, then write the backup area validity flag, then erase and write the actual data, and finally clear the backup area validity flag. Power on and check the backup area flag to see if there was a power outage during the write process. This method ensures the correctness of the written data. However, this involves writing to the backup area, setting the backup area flag, and erasing the backup area flag, resulting in slower performance. In actual use, transaction mechanisms are frequently used, which also contribute to performance slowness.
[0006] Therefore, there is an urgent need for a data writing method that improves performance to solve the above problems. Summary of the Invention
[0007] The main objective of this invention is to address the slow performance issue caused by page erasure during a single write operation by providing a data writing method and system that can significantly improve the write performance of transaction mechanisms.
[0008] The technical solution adopted in this invention is:
[0009] A data writing method for improving performance is provided, characterized by the following steps:
[0010] When writing FLASH data, it checks whether the space range to be written is in the newly requested space list; the newly requested space list records the address and size of the newly requested FLASH space; the newly requested FLASH space is invalid data, after the whole page is aligned, there is no need to use backup writing, and you can directly use erase writing;
[0011] If yes, erase and write directly without power-off protection; otherwise, use power-off protection to write.
[0012] Following the above technical solution, during power-loss protection writes, data that is written to the same page multiple times is placed in the RAM cache. When the transaction is committed, only the actual data is written during power-loss protection.
[0013] Following the above technical solution, during direct erasure and writing, the operation of erasing the backup area flag and sending data are processed in parallel.
[0014] Following the above technical solution, each new space application will add a record to the space application record table.
[0015] Following the above technical solution, if the maximum number of records is reached, recording will start again from the first record.
[0016] The present invention also provides a data writing system for improving performance, comprising:
[0017] The new space application module is used to apply for FLASH space and add the address and size of the applied FLASH space to the new space application record table;
[0018] The judgment module determines whether the space to be written is in the newly requested space list when writing FLASH data through the transaction mechanism.
[0019] The execution module is used to directly erase and write when the space to be written is in the newly applied space list, without power-off protection; otherwise, power-off protection is used for writing.
[0020] Following the above technical solution, the execution module is also used to place the data written to the same page multiple times in the RAM cache during direct erasure and writing, and to only protect the actual data from being written when the transaction is committed by power failure.
[0021] Following the above technical solution, the execution module is also used to process the operation of erasing backup area flags and sending data in parallel during direct erasing and writing.
[0022] Following the above technical solution, the new space application module is also used to add a record to the application space record table each time a new space is applied for; if the maximum number of records is reached, the recording starts again from the first record.
[0023] The present invention also provides a computer storage medium storing a computer program executable by a processor, the computer program performing the performance-enhancing data writing method described above.
[0024] The beneficial effects of this invention are as follows: This invention proposes a new space for single write operations. This space contains invalid data. After the entire page is aligned, there is no need to use backup writes. Instead, erase writes can be used directly, and the original data is useless. When the data to be written is within this new space, the write performance of the new space can be greatly improved.
[0025] Furthermore, for transaction-based writes, the information to be written is first written to the RAM cache, which is one page in size. When a transaction is written, it is first written to the RAM cache. If multiple writes are all on the same page, they are all written to the RAM cache first. When the transaction is committed, if all data is on the same page, only one write is needed for power-off protection. The transaction backup area and the transaction cache flag are not written, which greatly improves performance.
[0026] Furthermore, the operation of erasing the page backup area flag is moved to the response data operation, allowing the page backup area to be erased and the data to be sent to be processed in parallel, reducing the time spent erasing the backup area flag before sending the response.
[0027] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description
[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0029] Figure 1 This is a flowchart of a data writing method for improving performance according to an embodiment of the present invention;
[0030] Figure 2 This is a flowchart illustrating the application for FLASH space according to an embodiment of the present invention;
[0031] Figure 3This is a flowchart of a direct erasing and writing process according to an embodiment of the present invention;
[0032] Figure 4 This is a flowchart of a data writing method according to an embodiment of the present invention. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0034] It should be noted that the illustrations provided in the embodiments of the present invention are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0035] In this invention, it should also be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used only for descriptive and distinguishing purposes and should not be construed as indicating or implying relative importance.
[0036] This invention addresses the slow performance caused by the need for page erasure during a single write operation by proposing a newly allocated space. In this space, data writing does not require backup writing; it can directly use erase writing, which can greatly improve the write performance of the newly allocated space.
[0037] like Figure 1 As shown, the data writing method for improving performance according to an embodiment of the present invention includes the following steps:
[0038] S101. When writing FLASH data, determine whether the space range to be written is in the newly requested space list; the newly requested space list records the address and size of the pre-requested FLASH space; if the newly requested FLASH space is invalid data, after the entire page is aligned, there is no need to use backup writing, and you can directly use erase writing;
[0039] S102. If so, erase and rewrite directly without power-off protection;
[0040] S103. If not, use power-loss protected write. If power-loss protected write is used, the original data must be backed up first.
[0041] Among them, such as Figure 2 As shown, the main steps for applying for FLASH space include:
[0042] S201. Apply for Flash storage space;
[0043] S202. Add the address and size of the newly requested FLASH space to the newly requested space record table.
[0044] Specifically, the newly added space application records are shown in Table 1 below:
[0045] Table 1 New Space Application Records
[0046]
[0047] Each new space application is added to the space application record table. If the maximum number of records is reached, the recording process starts again from the first record.
[0048] like Figure 3 As shown, in this embodiment, during direct erasure and writing, the operation of erasing the page backup area flag can be performed during the response data operation, allowing the page backup area erasure and data transmission to be processed in parallel, reducing the time spent erasing the backup area flag before sending the response. The method of this embodiment specifically includes the following steps:
[0049] S301, Receive commands related to FLASH;
[0050] S302. Determine whether all commands have been received;
[0051] S303. Once the command has been received, begin processing the command.
[0052] S304. Determine whether the command requires writing to FLASH;
[0053] S305. If the command requires writing to FLASH, then determine whether the address range for writing to FLASH is the newly allocated space.
[0054] S306. If the address range to be written to FLASH is the newly allocated space, then directly erase and write, and then proceed to step S310.
[0055] S307. If the address range to be written to FLASH is not the newly allocated space, then back up the original data.
[0056] S308, Page Backup Flag;
[0057] S309, Erasing and rewriting data;
[0058] S310. After completing the write operation, send a command response message;
[0059] S311. Determine if there is a page backup flag;
[0060] S312. If a page backup flag exists, erase the page backup flag.
[0061] S313. If there is no page backup flag, or after erasing the page backup flag, determine whether the command response message was sent successfully. If yes, end the process; otherwise, continue determining until the message is sent successfully.
[0062] This embodiment is designed for transaction-based writing. The information to be written is first written to a RAM cache, which is one page in size. During a transaction write, the data is first written to the RAM cache. If multiple writes occur within the same page, they are all written to the RAM cache first. When the transaction is committed, if all data is within the same page, only one write operation is needed for power-off protection. Therefore, the direct erase / write mechanism of this invention avoids writing to the transaction backup area and the transaction cache flag, thus significantly improving performance. In reality, many application scenarios do indeed involve data written in a single transaction within the same page.
[0063] The determination of whether a page backup flag exists optimizes the time for erasing the backup flag during power-loss protection writes, allowing erasing and data transmission to be processed concurrently. It is evident that during power-loss protection writes, placing the operation of erasing the page backup flag during the response data operation, allowing the page backup flag to be erased and data transmission to be processed in parallel, can reduce the time spent erasing the backup flag before sending the response.
[0064] By allocating new writing space, we can optimize the write time by using erase and rewrite directly instead of power-off protection.
[0065] Furthermore, during the write process of the transaction mechanism, a RAM cache can be used to store data that is written to the same page multiple times. When the transaction is committed, only a power outage is needed to protect the actual data being written. There is no need to write to the transaction FLASH cache or its flag, thus improving the write performance of the transaction mechanism.
[0066] By adding a buffer to store writes via the transaction mechanism, as shown in Table 2 below, the buffer information mainly includes:
[0067] Table 2 Cache Area Information
[0068] Flash page address Starting address within the page End URL within the page Write FLASH page information
[0069] in:
[0070] Flash page address: The address where you save the data.
[0071] Page start address: The starting address of the page to be written.
[0072] End address within the page: The end address within the page to be written.
[0073] Write FLASH page information: one page size, the information to be written to the page.
[0074] When writing a transaction, first check if the transaction write buffer contains the information. If not, add the information to be written to the transaction buffer. If the information exists, check if it's writing to the same page. If so, update the transaction buffer. Otherwise, write the information according to the normal transaction mechanism, and also write any information previously stored in the transaction buffer according to the normal transaction mechanism. If the amount of information to write is more than one page, write according to the normal transaction mechanism. When committing a transaction, check if the transaction buffer contains the information. If it does, write directly. If not, write according to the normal transaction mechanism and commit the transaction according to the normal transaction mechanism.
[0075] like Figure 4 As shown, the data writing method in this embodiment mainly includes the following steps:
[0076] S401, Transaction write initialization;
[0077] S402. Determine if the size of the data to be written is greater than one page;
[0078] S403-S405 If the data to be written is greater than one page, then write to the transaction backup area, write the actual area and write the transaction backup area flag, and then proceed to step S413.
[0079] S406. If the data is less than or equal to one page, determine whether there is a message in the transaction buffer. Otherwise, proceed to step S411; otherwise, proceed to step S407.
[0080] S407. Determine whether the information stored in the transaction cache is on the same page as the information to be written. If yes, proceed to step S412; otherwise, proceed to steps S408-S410.
[0081] S408-S410: Write the cache information to the transaction backup area, write the cache information to the actual area, and write the cache information transaction backup area flag.
[0082] S411. Add the information to be written to the transaction cache.
[0083] S412. Update the information to be written to the transaction cache.
[0084] S413. When a transaction is committed, check if there is information in the transaction buffer. If yes, proceed to step S415; otherwise, proceed to step S414.
[0085] S414. The transaction commit setting invalidates the transaction flag, and the transaction write ends;
[0086] S415. Write the transaction buffer information into the actual area, and the transaction write ends.
[0087] The data writing system for improving performance in this invention embodiment is mainly used to implement the above method embodiments. The system includes:
[0088] The new space application module is used to apply for FLASH space and add the address and size of the applied FLASH space to the new space application record table;
[0089] The judgment module determines whether the space to be written is in the newly requested space list when writing FLASH data.
[0090] The execution module is used to directly erase and write when the space to be written is in the newly applied space list, without power-off protection; otherwise, power-off protection is used for writing.
[0091] The execution module is also used to place data written to the same page multiple times in the RAM cache during direct erase / write operations, and to protect the actual data from being written during transaction commit by only power-off protection.
[0092] Furthermore, the execution module is also used to process the operation of erasing backup area flags and sending data in parallel during direct erasing and writing.
[0093] Furthermore, the new space application module is also used to add a record to the application space record table each time a new space is applied for; if the maximum number of records is reached, the recording will start again from the first record.
[0094] Each module is mainly for implementing the various steps in the method implementation, and will not be elaborated here.
[0095] This application also provides a computer-readable storage medium, such as flash memory, hard disk, multimedia card, card-type memory (e.g., SD or DX memory), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, disk, optical disk, server, app store, etc., which stores a computer program, and the program performs corresponding functions when executed by a processor. The computer-readable storage medium of this embodiment implements the performance-enhancing data writing method of the method embodiment when executed by a processor.
[0096] In summary, this invention proposes a newly allocated space for single writes. This space contains invalid data. After full page alignment, backup writes are not required; erasure writes can be performed directly, rendering the original data useless. When the data to be written is within this newly allocated space, the write performance of the newly allocated space can be greatly improved. Furthermore, for transaction-based writes, the information to be written is first written to the RAM cache, which is one page in size. For transaction writes, the data is first written to the RAM cache. If multiple writes are all within the same page, they are all first written to the RAM cache. When the transaction is committed, if all data is within the same page, only one write is needed for power-off protection, without writing to the transaction backup area or the transaction cache flag, greatly improving performance. The operation of erasing the page backup flag can also be performed during the response data operation, allowing the page backup flag to be erased and the data to be sent in parallel, thereby reducing the time spent erasing the backup flag before sending the response.
[0097] It should be noted that, depending on the implementation needs, the various steps / components described in this application can be broken down into more steps / components, or two or more steps / components or parts of the operation of steps / components can be combined into new steps / components to achieve the purpose of this invention.
[0098] The order of the steps in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0099] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A data writing method for improving performance, characterized in that, Includes the following steps: When writing FLASH data, check if the space range to be written is in the newly requested space list; The newly requested space list records the address and size of the newly requested FLASH space; the newly requested FLASH space is invalid data, and after the entire page is aligned, there is no need to use backup writing, and you can directly use erase writing; If yes, erase and write directly without power-off protection; otherwise, use power-off protection to write.
2. The data writing method for improving performance according to claim 1, characterized in that, When directly erasing and writing, the data written to the same page multiple times is placed in the RAM cache. When the transaction is committed, only the actual data is protected from being written when the power is off.
3. The data writing method for improving performance according to claim 1, characterized in that, During power failure protection write, the operation of erasing the backup area flag and sending data are processed in parallel.
4. The data writing method for improving performance according to claim 1, characterized in that, Each time a new space is applied for, a record is added to the space application record table.
5. The data writing method for improving performance according to claim 4, characterized in that, If the maximum number of records is reached, start recording again from the first record.
6. A data writing system for improving performance, characterized in that, include: The new space application module is used to apply for FLASH space and add the address and size of the applied FLASH space to the new space application record table; The judgment module determines whether the space to be written is in the newly requested space list when writing FLASH data. The execution module is used to directly erase and write when the space to be written is in the newly applied space list, without power-off protection; otherwise, power-off protection is used for writing.
7. The performance-enhancing data writing system according to claim 6, characterized in that, The execution module is also used to place data written to the same page multiple times in the RAM cache during direct erase / write operations, and to only protect the actual data from being written when the transaction is committed by power failure.
8. The performance-enhancing data writing system according to claim 6, characterized in that, The execution module is also used to process the operation of erasing backup area flags and sending data in parallel during direct erasure and write.
9. The performance-enhancing data writing system according to claim 6, characterized in that, The new space application module is also used to add a record to the application space record table each time a new space is applied for; if the maximum number of records is reached, the recording will start again from the first record.
10. A computer storage medium, characterized in that, It contains a computer program that can be executed by a processor, which performs the performance-enhancing data writing method according to any one of claims 1-5.