Data transmission method and device, computer equipment and storage medium
Through the block sparse superposition vector code method, information is divided and mapped to the target submatrix and non-zero elements, solving the problems of low spectrum efficiency, low reliability and large delay in the sixth generation mobile communication system, and achieving high spectrum efficiency and low latency data transmission.
Patent Information
- Application Number
- CN202411285676.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-13
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2044-09-13
AI Technical Summary
In the sixth generation mobile communication system, insufficient spectrum resources lead to low spectrum efficiency, low reliability and large delay in data transmission, making it difficult to achieve the balance of reliability and transmission delay in delay-sensitive scenarios such as emergency rescue and telemedicine. .
Using the block sparse overlay vector code method, by obtaining the pre-constructed codebook matrix, the transmission information is divided into different parts and mapped to the index of the target submatrix, the index of the non-zero block and the element value of the non-zero elements, and pseudo-random Expand and map onto subcarriers for transmission, and design three-stage decoding rules to improve the decoding reliability of the receiver.
It improves the spectrum efficiency and reliability of data transmission and reduces transmission delay. Compared with traditional sparse vector codes, the probability of successful decoding is higher than that of traditional sparse vector codes.
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Figure CN119109556A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of wireless communication technology, and in particular to a data transmission method, device, computer equipment and storage medium. Background Art
[0002] With the development of economy and society, people's requirements for the quality of wireless communication are increasing day by day. In the sixth generation (6G) mobile communication system, the number of devices is growing exponentially, and the massive device connections have brought huge challenges to the traditional communication system.
[0003] On the one hand, limited spectrum resources limit the throughput of data transmission between devices, and there is an urgent need to explore new dimensions of physical resources to make up for the problem of insufficient spectrum resources.
[0004] On the other hand, in delay-sensitive communication scenarios such as emergency rescue, telemedicine, and autonomous driving, the reliability and transmission delay of data transmission play a vital role in the safety of people's lives and property. However, the relevant long packet transmission method is difficult to achieve a balance between reliability and transmission delay. To ensure reliability, a large amount of resources need to be allocated to signaling, retransmission, and error checking, resulting in high transmission delay and low spectral efficiency. Under the finite block length constraint, the sparsity of the parity check matrix of the low-density parity-check code will be compromised, and the polarization code will not be able to fully polarize the channel, resulting in a significant loss of coding gain.
[0005] Therefore, there is an urgent need to develop new data transmission methods to meet the requirements of the next generation of wireless communications for high spectral efficiency, high reliability and low latency. Summary of the invention
[0006] In view of this, the present invention provides a data transmission method, apparatus, computer equipment and storage medium to solve the problems of low spectrum efficiency, low reliability and large delay in the related art.
[0007] In a first aspect, the present invention provides a data transmission method, the data transmission method comprising:
[0008] Obtain a pre-constructed codebook matrix; the codebook matrix is divided into a preset number of sub-matrices;
[0009] Selecting a target sub-matrix from the preset number of sub-matrices;
[0010] Mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result; the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part; mapping the first part to an index of the target sub-matrix, mapping the second part to an index of a non-zero block, and mapping the third part to an element value of a non-zero element;
[0011] Performing pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code;
[0012] Mapping the target block sparse superposition vector code onto a subcarrier for transmission;
[0013] The received signal is decoded according to a preset decoding rule to obtain a decoding result.
[0014] In an optional implementation, the pseudo-randomly extending the encoding result to obtain a target block sparse superposition vector code includes:
[0015] The encoding result is pseudo-randomly expanded according to the codebook matrix to obtain a target block sparse superposition vector code.
[0016] In an optional implementation manner, mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result includes:
[0017] Mapping the first part to the index of a target submatrix; randomly selecting K non-zero blocks of length L from the target submatrix; mapping the second part to the index of K non-zero blocks of length L; mapping the third part to the element values of KL non-zero elements by modulation to obtain a coding result.
[0018] In an optional implementation manner, decoding the received signal according to a preset decoding rule to obtain a decoding result includes:
[0019] Determine a correlation value between each sub-matrix of the preset number of sub-matrices and the received signal;
[0020] Determine the index of the submatrix corresponding to the maximum value of the correlation values between each submatrix and the received signal as the target index;
[0021] Decoding the received signal according to the target index to obtain a first part;
[0022] Construct a new sub-matrix according to the target index;
[0023] Decoding the received signal according to the indices of the K non-zero blocks of length L determined in the new sub-matrix to obtain a second part;
[0024] Determine the element values of KL non-zero elements in the new sub-matrix;
[0025] Decoding the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain a third part;
[0026] The decoding result is determined according to the first part, the second part and the third part obtained by decoding.
[0027] In an optional implementation, decoding the received signal to obtain the second part according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix includes:
[0028] S1: Initialize the residual and the number of initialization iterations: k = 1;
[0029] S2: Divide the new submatrix into C blocks, and determine the correlation value between each block in the C blocks and the residual; C = B / L;
[0030] S3: Determine the index of the block corresponding to the maximum value of the correlation value between each block and the residual as the index of the non-zero block obtained in the kth iteration;
[0031] S4: Determine whether the number of iterations is equal to K. When the number of iterations is equal to K, obtain the indexes of K non-zero blocks of length L and execute S5. When the number of iterations is less than K, update the residual, increase the number of iterations by 1, and repeat S2-S4.
[0032] S5: Decode the received signal according to the indexes of K non-zero blocks of length L to obtain a second part.
[0033] In an optional implementation, determining the element values of KL non-zero elements in the new sub-matrix includes:
[0034] The element values of the KL non-zero elements are determined according to the indices of the K non-zero blocks of length L determined in the new sub-matrix.
[0035] In an optional implementation, mapping the target block sparse superposition vector code to a subcarrier for transmission includes:
[0036] Mapping the target block sparse superposition vector code to M subcarriers; the power of the subcarriers corresponding to K non-zero blocks of length L among the M subcarriers is non-zero, and the power of the subcarriers other than the subcarriers corresponding to the K non-zero blocks of length L among the M subcarriers is zero;
[0037] After performing inverse discrete Fourier transform on the M subcarriers, a time domain signal sequence is obtained;
[0038] The time domain signal sequence is transmitted.
[0039] In a second aspect, the present invention provides a data transmission device, the data transmission device comprising:
[0040] A first processing module is used to obtain a pre-constructed codebook matrix; the codebook matrix is divided into a preset number of sub-matrices;
[0041] A second processing module, used for selecting a target sub-matrix from the preset number of sub-matrices;
[0042] Mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result; the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part; mapping the first part to an index of the target sub-matrix, mapping the second part to an index of a non-zero block, and mapping the third part to an element value of a non-zero element;
[0043] A third processing module is used to perform pseudo-random expansion on the encoding result to obtain a sparse superposition vector code of a target block;
[0044] A fourth processing module, configured to map the target block sparse superposition vector code onto a subcarrier for transmission;
[0045] The fifth processing module is used to decode the acquired received signal according to a preset decoding rule to obtain a decoding result.
[0046] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the data transmission method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.
[0047] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the data transmission method of the first aspect or any corresponding embodiment thereof.
[0048] The technical solution provided by the present invention has the following technical effects:
[0049] Based on the technical solution of the present invention, by dividing the transmission information into different parts and mapping them to the index of the target sub-matrix, the index of the non-zero block and the element value of the non-zero element, the effective encoding of the transmission information is achieved, so that the information bits transmitted are more, and the reliability of the transmission is improved. The technical solution of the present invention adopts a preset mapping rule to map the transmission information to the sub-matrix, and decodes the received signal according to the preset decoding rule. The probability of successful decoding at the receiving end is higher than that of the traditional sparse vector code. In the case of the same non-zero elements, the block sparse superposition vector code requires fewer time-frequency resources than the sparse vector code, and the spectrum efficiency of the block sparse superposition vector code is higher than that of the sparse vector code, which reduces the transmission delay. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the related technologies, the drawings required for use in the specific embodiments or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0051] Figure 1 is a flow chart of a data transmission method according to an embodiment of the present invention;
[0052] Figure 2 is a flowchart of a mapping process according to an embodiment of the present invention;
[0053] Figure 3 is a flowchart of a decoding process according to an embodiment of the present invention;
[0054] Figure 4 is a schematic diagram of simulation comparison results according to an embodiment of the present invention;
[0055] Figure 5 is a structural block diagram of a data transmission device according to an embodiment of the present invention;
[0056] Figure 6 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0057] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0058] Sparse vector codes have the advantages of smooth spectrum efficiency adjustment, high reliability, short transmission delay, and low decoding complexity. Traditional data transmission methods map information bits to a given constellation diagram, and then modulate the constellation points corresponding to the information bits to subcarriers for transmission. Unlike traditional methods, sparse vector codes map information bits to non-zero index resources of a sparse vector, and then pseudo-randomly expand the sparse vector to obtain a low-dimensional transmission vector, and finally map the low-dimensional transmission vector to time-frequency resources for transmission. Compared with traditional methods, sparse vector codes have two important advantages. First, the power in sparse vector codes is concentrated on a small number of non-zero elements, and the effective power of the received non-zero elements is higher, which helps to improve the decoding reliability of the receiving end. Second, in addition to time-frequency resources, sparse vector codes also use index resources to carry additional information bits, thereby improving the spectrum efficiency of data transmission.
[0059] However, most of the related sparse vector codes improve the reliability of data transmission by designing complex decoding algorithms. These methods usually require a lot of computing resources to improve reliability, and complex decoding algorithms will lead to higher processing delays. In addition, sparse vector codes only use random sparse mapping patterns to map transmission bits to sparse vectors, and their decoding reliability and spectrum efficiency are still low. Therefore, designing a data transmission method with high spectrum efficiency while ensuring high reliability and low latency is still a technical problem to be solved.
[0060] Therefore, the embodiments of the present invention provide a data transmission method, apparatus, computer equipment and storage medium to solve the above problems.
[0061] According to an embodiment of the present invention, a data transmission method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0062] Figure 1 It is a flowchart of a data transmission method according to an embodiment of the present invention.
[0063] like Figure 1 As shown, a data transmission method provided in an embodiment of the present invention includes:
[0064] S101: Obtain a pre-constructed codebook matrix.
[0065] In this embodiment, the codebook matrix is divided into a preset number of sub-matrices.
[0066] In this embodiment, the codebook matrix can be divided into a preset number D of sub-matrices. In this embodiment, there is no limitation on the specific value of the preset number, which can be designed and modified according to actual needs. As an example, when D=8, the codebook matrix can be divided into 8 sub-matrices.
[0067] In this embodiment, a sparse vector of length N can be obtained, and the sparse vector of length N can be divided into a preset number D of blocks, and a single block corresponds to a single sub-matrix. The codebook matrix can be flexibly designed according to different application requirements and channel characteristics, and can better adapt to various communication scenarios.
[0068] S102: Select a target sub-matrix from a preset number of sub-matrices, and map the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result.
[0069] In this embodiment, the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part, mapping the first part to the index of the target submatrix, mapping the second part to the index of the non-zero block, and mapping the third part to the element value of the non-zero element.
[0070] In this embodiment, the transmission information is encoded according to a preset encoding rule to obtain an encoding result. The preset encoding rule may include the technical solution in S101-S102: obtaining a pre-constructed codebook matrix, selecting a target sub-matrix from a preset number of sub-matrices, and mapping the transmission information to the target sub-matrix according to a preset mapping rule. In this embodiment, the transmission information can be mapped to multiple sub-matrices according to the preset mapping rule.
[0071] In this embodiment, a submatrix can be randomly selected from a preset number of submatrices as a target submatrix. The transmission information can be divided into a first part, a second part, and a third part according to the number of resources that can be used to carry information bits in each part. The first part includes b1 bits of information, the second part includes b2 bits of information, and the third part includes b3 bits of information.
[0072] In this embodiment, S102 maps the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result, which specifically includes:
[0073] The first part is mapped to the index of the target submatrix. K non-zero blocks of length L are randomly selected from the target submatrix. The second part is mapped to the index of K non-zero blocks of length L. The third part is mapped to the element values of KL non-zero elements by modulation to obtain the encoding result.
[0074] In this embodiment, the modulation may include soft symbol modulation, and the soft symbol modulation may include: phase modulation or amplitude modulation.
[0075] In this embodiment, according to the above preset mapping rule, the total number of transmission bits can be obtained as b=b1+b2+b3, the total number of transmission bits in the encoding result is b=b1+b2+b3, and the number of bits mapped in each part is respectively:
[0076]
[0077] b3=KLlog2(M mod )
[0078] Where b1 represents the number of bits mapped to the index of the target submatrix, b2 represents the number of bits mapped to the index of K non-zero blocks of length L, b3 represents the number of bits mapped to the element values of KL non-zero elements, and M mod represents the modulation order, represents rounding down, D represents the number of sub-matrices, N represents the length of the sparse vector, B=N / D represents the number of columns of the target sub-matrix, and D, N, and B are all integers.
[0079] In this embodiment, if D=8, a sub-matrix is selected for mapping encoding, and there are 8 selectable target sub-matrices, corresponding to which 8 encoding modes are generated.
[0080] like Figure 2 As shown, the mapping process is as follows: the target submatrix selected from the preset number of submatrices is the second submatrix, the second submatrix has a total of B columns, and K non-zero blocks of length L are randomly selected from the B columns. There are a total of (B / L, K) ways to obtain the number of bits b2 mapped to the index of the second submatrix. According to the index of the K non-zero blocks of length L, only b3 bits of information need to be mapped to the element values of KL non-zero elements. The above mapping process is actually a modulation process, and different orders of modulation can be used. The order of modulation is M mod In this case, b3 can be obtained.
[0081] S103: Perform pseudo-random expansion on the encoding result to obtain a sparse superposition vector code of the target block.
[0082] In this embodiment, the spectral efficiency of the target block sparse superposition vector code can be calculated according to the total number of transmission bits in the encoding result:
[0083]
[0084] Among them, M BSSC represents the transmission block length of the target block sparse superposition vector code, SE BSSC represents the spectral efficiency of the target block sparse superposition vector code, while the spectral efficiency of the traditional sparse vector code is:
[0085]
[0086] Among them, SE SVC represents the spectral efficiency of the traditional sparse vector code, M SVC Represents the transmission block length of the traditional sparse vector code.
[0087] In this embodiment, the block sparse superposition vector code adopts a non-zero block mapping mode, and the probability of successful decoding at the receiving end is higher than that of the traditional sparse vector code. In the case of the same non-zero elements, the block sparse superposition vector code requires less time-frequency resources than the sparse vector code, that is, M BSSC <M SVC In addition, compared with sparse vector codes, block sparse superposition vector codes not only map bit information to the index of non-zero blocks, but also map additional bit information to the index of the target submatrix and the element value of non-zero elements, so that it transmits more bit information. The spectrum efficiency of block sparse superposition vector codes is higher than that of sparse vector codes.
[0088] In this embodiment, S103 performs pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code, specifically including: performing pseudo-random expansion on the encoding result according to the codebook matrix to obtain a target block sparse superposition vector code. Different from the traditional sparse vector code, in this embodiment, the non-zero elements in the encoding result are randomly expanded in the form of blocks, rather than randomly expanding the non-zero elements one by one. This method of pseudo-randomly expanding the encoding result according to the codebook matrix of the block sparse superposition vector code provides additional block structure information, which can be used to design high-precision decoding rules. In order to reduce storage costs, the codebook matrix in this embodiment can adopt a random Hadamard matrix, whose elements are composed of 1 and -1 and obey the Bernoulli distribution. As an example: a codebook matrix G with a size of M=3, N=16 and composed of 4 sub-matrices G1, G2, G3, and G4 is shown as follows:
[0089]
[0090] In this embodiment, the process of pseudo-randomly extending the encoding result according to the codebook matrix is as follows:
[0091]
[0092] in, is the target block sparse superposition vector code obtained by pseudo-random expansion of K non-zero blocks, s = [s1, s2, …s d ,…s D ] is the sparse vector in the block sparse superposition vector code, is the codebook matrix, is the d-th sub-matrix, is the support set of the kth non-zero block corresponding to the dth matrix, and |.| means taking the modulus of., is the support set of all non-zero elements, where d * Represents the selected target submatrix.
[0093] S104: Map the target block sparse superposition vector code onto a subcarrier for transmission.
[0094] S105: Decoding the received signal according to a preset decoding rule to obtain a decoding result.
[0095] In an optional implementation manner, mapping the target block sparse superposition vector code to a subcarrier for transmission in S104 specifically includes:
[0096] Sa1: Map the target block sparse superposition vector code to M subcarriers.
[0097] In this embodiment, the power of the subcarriers corresponding to K non-zero blocks of length L among the M subcarriers is non-zero, and the power of the subcarriers other than the subcarriers corresponding to the K non-zero blocks of length L among the M subcarriers is zero. The non-zero power of the subcarrier indicates that the subcarrier is in an activated state, and the zero power of the subcarrier indicates that the subcarrier is in an inactivated state.
[0098] Sa2: Perform inverse discrete Fourier transform on the M subcarriers to obtain a time domain signal sequence.
[0099] Sa3: Transmit the time domain signal sequence.
[0100] In this embodiment, the time domain signal sequence may be transmitted through an antenna.
[0101] In this embodiment, in high mobility scenarios such as the Internet of Vehicles, the wireless channel exhibits both frequency-selective and time-selective fading characteristics, and the received signal obtained is:
[0102] y=FH T F H Gs+w=Φs+w
[0103] in, represents the measurement matrix, s represents the block sparse signal, which includes K non-zero blocks of length L, F is the discrete Fourier transform matrix, G is the codebook matrix, H T is the time domain channel matrix, Indicates receiving signal, Indicates that the mean is 0 and the variance is σ 2 The additive white Gaussian noise vector, I M represents the identity matrix of dimension M, represents complex Gaussian distribution. Due to the rich scattering environment and time-varying channel gain in the IoV scenario, H T Set to a pseudo-circular matrix, whose (p,q)th element is: [H T ] p,q =h p,mod(p-q,M) , p,q∈[0,M-1], mod(pq,M) means taking the remainder after dividing pq by M, h p,mod(p-q,M) represents the time domain channel gain at the mod(pq,M)th moment of the pth channel path.
[0104] In order to recover transmission information from a low-dimensional received signal, the present invention proposes a three-stage preset decoding rule, including non-zero sub-matrix identification, non-zero block index identification and soft symbol demodulation. Figure 3 A flow chart of the three-stage decoding process is given.
[0105] In an optional implementation manner, decoding the received signal according to a preset decoding rule to obtain a decoding result in S105 specifically includes:
[0106] Sb1: Determine a correlation value between each sub-matrix in a preset number of sub-matrices and a received signal.
[0107] In this embodiment, before executing Sb1, it is first necessary to obtain the received signal y, measure the matrix Φ, the preset number D of submatrices, the number B of submatrix columns, the number K of non-zero blocks, and the length L of a single non-zero block.
[0108] In this embodiment, Determine the correlation value between each sub-matrix in the preset number of sub-matrices and the received signal
[0109] Sb2: Determine the index of the submatrix corresponding to the maximum value of the correlation values between each submatrix and the received signal as the target index.
[0110] In this embodiment, according to Select the index of the submatrix corresponding to the maximum value The index of the non-zero submatrix can be identified according to the technical solution of Sb1-Sb2 above.
[0111] Sb3: Decode the received signal according to the target index to obtain the first part.
[0112] In this embodiment, the target index The received signal is decoded to obtain b1 bits of information of the first part.
[0113] Sb4: Construct a new submatrix based on the target index. Construct a new submatrix
[0114]
[0115] Sb5: Decode the received signal according to the indices of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part.
[0116] In this embodiment, the indexes of K non-zero blocks can be identified according to the technical solutions of Sb3-Sb5 above.
[0117] Sb6: Determine the element values of KL non-zero elements in the new sub-matrix.
[0118] In this embodiment, the element values of KL non-zero elements may be determined according to the indices of K non-zero blocks of length L determined in the new sub-matrix.
[0119] Sb7: Decoding the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain the third part.
[0120] In this embodiment, the demodulation may be soft symbol demodulation, and the soft symbol demodulation may include phase demodulation or amplitude demodulation. The element values of the KL non-zero elements may be demodulated according to the technical solutions of Sb6-Sb7 above.
[0121] Sb8: Determine the decoding result according to the first part, the second part and the third part obtained by decoding.
[0122] In this embodiment, the first part, the second part and the third part obtained by decoding are combined to obtain a decoding result.
[0123] In an optional implementation manner, Sb5 decodes the received signal according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part, specifically including:
[0124] S1: Initialize the residual and the number of initialization iterations: k=1.
[0125] In this embodiment, the residual is initialized as: (1) =y.
[0126] S2: Divide the new sub-matrix into C blocks, and determine the correlation value between each block in the C blocks and the residual. C = B / L.
[0127] In this embodiment, the new sub-matrix Divide into B / L=C blocks by column, and determine the correlation value of each block in the C blocks with the residual according to the following formula: Where c = 1, 2,…, C.
[0128] S3: Combine each block with the residual r(k) The index of the block corresponding to the maximum value of the correlation value is determined as the index of the non-zero block obtained in the kth iteration
[0129] In this embodiment, when executing the technical solution of S3, the index value of the non-zero element obtained in the kth iteration can be calculated. Determine the element value of the non-zero element in the kth iteration based on the index value of the non-zero element
[0130] S4: Determine whether the number of iterations is equal to K. When the number of iterations is equal to K, obtain the indexes of K non-zero blocks of length L and execute S5. When the number of iterations is less than K, update the residual The number of iterations increases by 1, and S2-S4 are repeated.
[0131] S5: Decode the received signal according to the indexes of K non-zero blocks of length L to obtain the second part.
[0132] In this embodiment, S2-S4 are repeatedly executed until K iterations are completed. Finally, the indexes of K non-zero blocks of length L are obtained. and the element values of KL non-zero elements The received signal is decoded according to the indexes of K non-zero blocks of length L to obtain b2 bits of information of the second part. The b3 bits of information of the third part are obtained by soft symbol demodulation of the element values of KL non-zero elements.
[0133] The present invention is directed to data transmission of highly mobile Internet of Vehicles devices and proposes a data transmission method, the key points of which are as follows:
[0134] A new mapping rule is designed, which divides the transmission information into three parts. One part of the transmission information is mapped to the index of the target submatrix, one part of the transmission information is mapped to the index of K non-zero blocks, and the remaining transmission information is mapped to the element values of KL non-zero elements. The difference between this mapping rule and the traditional method is that the transmission information is mapped to the index of the non-zero block instead of randomly mapping the transmission information to the index of a single non-zero element.
[0135] Traditional methods, such as sparse vector codes, are only applicable to low-speed or static scenarios, while the block sparse superposition vector code proposed in the technical solution of the present invention is applicable to high-mobility scenarios, such as Internet of Vehicles, unmanned logistics systems, emergency rescue systems, etc. These application scenarios usually present complex and changeable channel environments. Therefore, the data transmission method proposed in the present invention has a wider range of applications than traditional methods.
[0136] A three-stage decoding rule is designed for the proposed block sparse superposition vector code. This decoding rule utilizes the block structure sparse prior knowledge generated during the encoding process and can achieve accurate decoding.
[0137] Benefiting from the designed mapping rules, the transmission resources required by the data transmission method proposed in the present invention are much smaller than those of traditional sparse vector codes, thereby improving the spectrum efficiency of data transmission.
[0138] The present invention verifies the performance advantages of the proposed technical solution over related methods on different physical channels through simulation results. Figure 4 The simulation comparison results of the Block Error Rate (BLER) performance under different signal-to-noise ratios (SNRs) between the technical solution of the present invention and the traditional method are shown. In all comparison schemes, the total number of non-zero elements is set to 2, the number of transmitted information bits is b=14 bits, the transmission block length is M=40 subcarriers, and except for the sparse vector code, the other comparison schemes all adopt the Quadrature Phase ShiftKeying (QPSK) modulation method. The sparse vector lengths (N) of the sparse vector code scheme, the enhanced sparse vector code scheme, the constellation rotated sparse vector code scheme, and the block sparse superposition vector code scheme proposed in the present invention are 182, 46, 46, and 1088, respectively. For the block sparse superposition vector code scheme, the number of sub-matrices is 32, the number of columns of each sub-matrix is 34, the number of non-zero blocks is K=1, and the non-zero block length is L=2. By Figure 4 It can be seen that under different signal-to-noise ratios, the block error rate performance of the block sparse superposition vector code scheme proposed in the present invention is better than that of the traditional scheme. -4 The block sparse vector superposition code proposed in the present invention has an SNR that is about 1.8 dB lower than that required by the constellation rotation type sparse vector code. This shows that the technical solution of the block sparse vector superposition code proposed in the present invention is more reliable than the traditional method.
[0139] It should be noted that the contents not described in detail in the specification of the present invention belong to the common knowledge of those skilled in the art.
[0140] In this embodiment, a data transmission device is also provided, which is used to implement the above-mentioned embodiment and optional implementation methods, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware is also possible and conceived.
[0141] Figure 5 is a structural block diagram of a data transmission device according to an embodiment of the present invention.
[0142] This embodiment provides a data transmission device, such as Figure 5 As shown, the data transmission device includes:
[0143] The first processing module 11 is used to obtain a pre-built codebook matrix. The codebook matrix is divided into a preset number of sub-matrices.
[0144] The second processing module 12 is used to select a target submatrix from a preset number of submatrices. The transmission information is mapped to the target submatrix according to a preset mapping rule to obtain a coding result. The preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part. The first part is mapped to the index of the target submatrix, the second part is mapped to the index of the non-zero block, and the third part is mapped to the element value of the non-zero element.
[0145] The third processing module 13 is used to perform pseudo-random expansion on the encoding result to obtain a sparse superposition vector code of the target block.
[0146] The fourth processing module 14 is used to map the target block sparse superposition vector code to a subcarrier for transmission.
[0147] The fifth processing module 15 is used to decode the acquired received signal according to a preset decoding rule to obtain a decoding result.
[0148] In an optional implementation, the second processing module 12 is specifically configured to map the first part to an index of a target submatrix, randomly select K non-zero blocks of length L from the target submatrix, map the second part to the index of K non-zero blocks of length L, and map the third part to element values of KL non-zero elements by modulation to obtain a coding result.
[0149] In an optional implementation, the third processing module 13 is specifically configured to perform pseudo-random expansion on the encoding result according to the codebook matrix to obtain a target block sparse superposition vector code.
[0150] In an optional embodiment, the fourth processing module 14 includes:
[0151] The first processing unit is configured to map the target block sparse superposition vector code to M subcarriers. The power of the subcarriers corresponding to K non-zero blocks of length L in the M subcarriers is non-zero, and the power of the subcarriers other than the subcarriers corresponding to the K non-zero blocks of length L in the M subcarriers is zero.
[0152] The second processing unit is used to perform inverse discrete Fourier transform on the M subcarriers to obtain a time domain signal sequence.
[0153] The third processing unit is used to transmit the time domain signal sequence.
[0154] In an optional implementation, the fifth processing module 15 includes:
[0155] The first processing unit is used to determine a correlation value between each sub-matrix in a preset number of sub-matrices and the received signal.
[0156] The second processing unit is configured to determine the index of the submatrix corresponding to the maximum value of the correlation values between each submatrix and the received signal as the target index.
[0157] The third processing unit is used to decode the received signal according to the target index to obtain the first part.
[0158] The fourth processing unit is used to construct a new sub-matrix according to the target index.
[0159] The fifth processing unit is used to decode the received signal according to the indexes of the K non-zero blocks with a length of L determined in the new sub-matrix to obtain the second part.
[0160] The sixth processing unit is used to determine the element values of KL non-zero elements in the new sub-matrix.
[0161] The seventh processing unit is used to decode the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain the third part.
[0162] The eighth processing unit is used to determine the decoding result according to the first part, the second part and the third part obtained by decoding.
[0163] In an optional implementation, the fifth processing unit in the fifth processing module 15 is specifically configured to perform the following steps:
[0164] S1: Initialize the residual and the number of initialization iterations: k=1.
[0165] S2: Divide the new sub-matrix into C blocks, and determine the correlation value between each block in the C blocks and the residual. C = B / L.
[0166] S3: Determine the index of the block corresponding to the maximum value of the correlation value between each block and the residual as the index of the non-zero block obtained in the kth iteration.
[0167] S4: Determine whether the number of iterations is equal to K. When the number of iterations is equal to K, obtain the indexes of K non-zero blocks of length L, and execute S5. When the number of iterations is less than K, update the residual, increase the number of iterations by 1, and repeat S2-S4.
[0168] S5: Decode the received signal according to the indexes of K non-zero blocks of length L to obtain the second part.
[0169] In an optional implementation, the sixth processing unit in the fifth processing module 15 is specifically configured to determine element values of KL non-zero elements according to the indices of the K non-zero blocks of length L determined in the new sub-matrix.
[0170] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.
[0171] The data transmission device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.
[0172] The embodiment of the present invention also provides a computer device having the above Figure 5 The data transmission device shown.
[0173] See also Figure 6 , Figure 6 Schematic diagram of the hardware structure of the computer device according to the embodiment of the present invention. Figure 6 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses for communication, and can be installed on a common motherboard or installed in other ways as needed. The processor can process instructions executed in the computer device, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface).
[0174] In an optional embodiment, if desired, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, each device providing part of the necessary operations (e.g., as a server array, a group of blade servers, or a multi-processor system). Figure 6 A processor 10 is taken as an example.
[0175] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.
[0176] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.
[0177] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function. The data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In an optional embodiment, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0178] The memory 20 may include a volatile memory, such as a random access memory. The memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive. The memory 20 may also include a combination of the above-mentioned types of memory.
[0179] The computer device further comprises a communication interface 30 for the computer device to communicate with other devices or a communication network.
[0180] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc. Further, the storage medium can also include a combination of the above-mentioned types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.
[0181] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.
[0182] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A data transmission method, It is characterized in that The data transmission method comprises: Obtain a pre-constructed codebook matrix; the codebook matrix is divided into a preset number of sub-matrices; Selecting a target sub-matrix from the preset number of sub-matrices; Mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result; the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part; mapping the first part to an index of the target sub-matrix, mapping the second part to an index of a non-zero block, and mapping the third part to an element value of a non-zero element; Performing pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code; Mapping the target block sparse superposition vector code onto a subcarrier for transmission; The received signal is decoded according to a preset decoding rule to obtain a decoding result.
2. The method according to claim 1, It is characterized in that The pseudo-randomly extending the encoding result to obtain a target block sparse superposition vector code includes: The encoding result is pseudo-randomly expanded according to the codebook matrix to obtain a target block sparse superposition vector code.
3. The method according to claim 1, It is characterized in that Mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result includes: Mapping the first part to the index of a target submatrix; randomly selecting K non-zero blocks of length L from the target submatrix; mapping the second part to the index of K non-zero blocks of length L; mapping the third part to the element values of KL non-zero elements by modulation to obtain a coding result.
4. The method according to claim 3, It is characterized in that The decoding of the received signal according to a preset decoding rule to obtain a decoding result includes: Determine a correlation value between each sub-matrix of the preset number of sub-matrices and the received signal; Determine the index of the submatrix corresponding to the maximum value of the correlation values between each submatrix and the received signal as the target index; Decoding the received signal according to the target index to obtain a first part; Construct a new sub-matrix according to the target index; Decoding the received signal according to the indices of the K non-zero blocks of length L determined in the new sub-matrix to obtain a second part; Determine the element values of KL non-zero elements in the new sub-matrix; Decoding the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain a third part; The decoding result is determined according to the first part, the second part and the third part obtained by decoding.
5. The method according to claim 4, It is characterized in that The step of decoding the received signal according to the indices of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part comprises: S1: Initialize the residual and the number of initialization iterations: k = 1; S2: Divide the new submatrix into C blocks, and determine the correlation value between each block in the C blocks and the residual; C = B / L; S3: Determine the index of the block corresponding to the maximum value of the correlation value between each block and the residual as the index of the non-zero block obtained in the kth iteration; S4: Determine whether the number of iterations is equal to K. When the number of iterations is equal to K, obtain the indexes of K non-zero blocks of length L and execute S5. When the number of iterations is less than K, update the residual, increase the number of iterations by 1, and repeat S2-S4. S5: Decode the received signal according to the indexes of K non-zero blocks of length L to obtain a second part.
6. The method according to claim 3, It is characterized in that Determining the element values of KL non-zero elements in the new sub-matrix includes: The element values of the KL non-zero elements are determined according to the indices of the K non-zero blocks of length L determined in the new sub-matrix.
7. The method according to claim 3, It is characterized in that The step of mapping the target block sparse superposition vector code onto a subcarrier for transmission includes: Mapping the target block sparse superposition vector code to M subcarriers; the power of the subcarriers corresponding to K non-zero blocks of length L among the M subcarriers is non-zero, and the power of the subcarriers other than the subcarriers corresponding to the K non-zero blocks of length L among the M subcarriers is zero; After performing inverse discrete Fourier transform on the M subcarriers, a time domain signal sequence is obtained; The time domain signal sequence is transmitted.
8. A data transmission device, It is characterized in that The data transmission device comprises: A first processing module is used to obtain a pre-constructed codebook matrix; the codebook matrix is divided into a preset number of sub-matrices; A second processing module, used for selecting a target sub-matrix from the preset number of sub-matrices; Mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain a coding result; the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part; mapping the first part to an index of the target sub-matrix, mapping the second part to an index of a non-zero block, and mapping the third part to an element value of a non-zero element; A third processing module is used to perform pseudo-random expansion on the encoding result to obtain a sparse superposition vector code of a target block; A fourth processing module, configured to map the target block sparse superposition vector code onto a subcarrier for transmission; The fifth processing module is used to decode the acquired received signal according to a preset decoding rule to obtain a decoding result.
9. A computer device, It is characterized in that include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the steps of the data transmission method according to any one of claims 1 to 7 by executing the computer instructions.
10. A computer-readable storage medium, It is characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the steps of the data transmission method according to any one of claims 1 to 7.
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Cited By
Data transmission method and device, computer equipment and storage medium
CN119788096A
