Driving system of embedded touch panel and control method of driving circuit

Abstract

The invention provides a driving system of an embedded touch panel and a control method of a driving circuit. The driving system comprises a gate driving circuit and a control circuit. The control of the driving circuit includes: providing a first reference voltage, a second reference voltage and a third reference voltage to the gate driving circuit to drive the gate driving circuit, the first reference voltage being set as a first voltage value, the second reference voltage and the third reference voltage being set as second voltage values, the first voltage value being greater than the second voltage value; detecting an environment temperature; and judging whether the environment temperature is greater than a preset temperature threshold value or not. When the environment temperature is larger than the preset temperature threshold value, the second reference voltage is increased from the second voltage value to the first voltage value, the first reference voltage is maintained at the first voltage value, and the third reference voltage is maintained at the second voltage value.

Description

Technical Field

[0001] The invention relates to a driving system of an embedded touch panel and a control method of a driving circuit. Background Art

[0002] Touch display panels can be divided into out-cell, on-cell and in-cell types according to the touch position. In-cell touch display panels have the advantages of thinness and light weight because they do not need an additional touch glass layer. However, in-cell touch display panels are prone to horizontal stripes when displaying images, which will significantly affect the image quality. Summary of the invention

[0003] Therefore, the present invention provides a driving system of an embedded touch panel and a control method of a driving circuit to solve the problem of horizontal stripes appearing on the screen.

[0004] According to one embodiment of the present invention, a driving system of an embedded touch panel includes: a gate driving circuit and a control circuit. The gate driving circuit is used to output a gate driving signal corresponding to a gate line. The control circuit is electrically connected to the gate driving circuit to provide a first reference voltage, a second reference voltage, and a third reference voltage to the gate driving circuit to drive the gate driving circuit. The control circuit is also used to: set the first reference voltage to a first voltage value, and set the second reference voltage and the third reference voltage to a second voltage value, wherein the first voltage value is greater than the second voltage value; detect the ambient temperature; determine whether the ambient temperature is greater than a preset temperature threshold; when the ambient temperature is greater than the preset temperature threshold, increase the second reference voltage from the second voltage value to the first voltage value, and maintain the first reference voltage at the first voltage value, and maintain the third reference voltage at the second voltage value.

[0005] In some embodiments, the gate driving circuit includes: a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor and a second capacitor. The first end of the first transistor receives the second reference voltage, a control end of the first transistor receives the first gate control signal, the second end of the first transistor is electrically connected to the first node, the first end of the second transistor is electrically connected to the first clock signal source and receives the first clock signal, the control end of the second transistor is electrically connected to the first node, and the second end of the second transistor receives the third reference voltage. The first capacitor is electrically connected between the first end of the second transistor and the first clock signal source. The first end of the third transistor is electrically connected to the first node, the control end of the third transistor is electrically connected to the first end of the second transistor, and the second end of the third transistor receives the third reference voltage. The first end of the fourth transistor receives the first reference voltage, the control end of the fourth transistor receives the second gate control signal, and the second end of the fourth transistor is electrically connected to the first node. The first end of the fifth transistor is electrically connected to the second node, the control end of the fifth transistor is electrically connected to the second clock signal source and receives the second clock signal, and the second end of the fifth transistor receives the third reference voltage. The first end of the sixth transistor is electrically connected to the second node, the control end of the sixth transistor is electrically connected to the first end of the second transistor, and the second end of the sixth transistor receives the third reference voltage. The first end of the seventh transistor is electrically connected to the first clock signal source to receive the first clock signal, the control end of the seventh transistor is electrically connected to the first node, and the second end of the seventh transistor is electrically connected to the second node. The second capacitor is electrically connected between the first node and the second node.

[0006] In some embodiments, the first transistor and the fourth transistor correspond to an up to down scanning operation and a down to up scanning operation of the in-cell touch panel, respectively.

[0007] In some embodiments, when the first reference voltage is the first voltage value, and the second reference voltage and the third reference voltage are the second voltage value, the first node has a first node voltage value. When the first reference voltage and the second reference voltage are the first voltage value, and the third reference voltage is the second voltage value, the first node (Q) has a second node voltage value. The second node voltage value is greater than the first node voltage value.

[0008] In some embodiments, when the control circuit determines that the ambient temperature is not greater than a preset temperature threshold, the control circuit maintains the second reference voltage at a second voltage value.

[0009] According to one embodiment of the present invention, a control method for a driving circuit of the embedded touch panel includes: providing a gate driving circuit, wherein the gate driving circuit is used to output a gate driving signal corresponding to a gate line; providing a first reference voltage, a second reference voltage and a third reference voltage to the gate driving circuit to drive the gate driving circuit, wherein the first reference voltage is set to a first voltage value, and the second reference voltage and the third reference voltage are set to a second voltage value, and the first voltage value is greater than the second voltage value; detecting the ambient temperature; determining whether the ambient temperature is greater than a preset temperature threshold; and when the ambient temperature is greater than the preset temperature threshold, increasing the second reference voltage from the second voltage value to the first voltage value, and maintaining the first reference voltage at the first voltage value, and maintaining the third reference voltage at the second voltage value.

[0010] In some embodiments, the gate driving circuit includes: a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor and a second capacitor. The first end of the first transistor receives the second reference voltage, a control end of the first transistor receives the first gate control signal, the second end of the first transistor is electrically connected to the first node, the first end of the second transistor is electrically connected to the first clock signal source and receives the first clock signal, the control end of the second transistor is electrically connected to the first node, and the second end of the second transistor receives the third reference voltage. The first capacitor is electrically connected between the first end of the second transistor and the first clock signal source. The first end of the third transistor is electrically connected to the first node, the control end of the third transistor is electrically connected to the first end of the second transistor, and the second end of the third transistor receives the third reference voltage. The first end of the fourth transistor receives the first reference voltage, the control end of the fourth transistor receives the second gate control signal, and the second end of the fourth transistor is electrically connected to the first node. The first end of the fifth transistor is electrically connected to the second node, the control end of the fifth transistor is electrically connected to the second clock signal source and receives the second clock signal, and the second end of the fifth transistor receives the third reference voltage. The first end of the sixth transistor is electrically connected to the second node, the control end of the sixth transistor is electrically connected to the first end of the second transistor, and the second end of the sixth transistor receives the third reference voltage. The first end of the seventh transistor is electrically connected to the first clock signal source and receives the first clock signal, a control end of the seventh transistor is electrically connected to the first node, and the second end of the seventh transistor is electrically connected to the second node. The second capacitor is electrically connected between the first node and the second node. When the first reference voltage is a first voltage value, and the second reference voltage and the third reference voltage are second voltage values, the first node has a first node voltage value. When the first reference voltage and the second reference voltage are a first voltage value, and the third reference voltage is the second voltage value, the first node has a second node voltage value. The second node voltage value is greater than the first node voltage value.

[0011] In some embodiments, the first transistor and the fourth transistor correspond to a forward scanning operation and a reverse scanning operation of the in-cell touch panel, respectively.

[0012] In some embodiments, when the ambient temperature is not greater than the preset temperature threshold, the second reference voltage is maintained at a second voltage value.

[0013] In some embodiments, when the in-cell touch panel performs a touch sensing operation, the second reference voltage is increased from the second voltage value to the first voltage value.

[0014] In order to make the above and other purposes, features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of the structure of a driving system of an embedded touch panel according to an embodiment of the present invention is shown;

[0016] Figure 2 A schematic diagram of the circuit structure of a gate driving circuit according to an embodiment of the present invention is shown;

[0017] Figure 3 A schematic flow chart of a control method of a driving circuit of an in-cell touch panel according to an embodiment of the present invention is shown;

[0018] Figure 4 FIG. 4 is a voltage waveform diagram of a first reference voltage and a second reference voltage according to an embodiment of the present invention.

[0019] Wherein, the reference numerals are:

[0020] 100: Driving system of embedded touch panel

[0021] 110: Control circuit

[0022] 120: Gate drive circuit

[0023] 130: Pixel Array

[0024] 300: Control method of driving circuit of embedded touch panel

[0025] C1: First capacitor

[0026] C2: Second capacitor

[0027] CK: First clock signal source

[0028] D2U: Second reference voltage

[0029] G(n), G(n+1), G(n-1): control signal

[0030] M1: First transistor

[0031] M2: Second transistor

[0032] M3: The third transistor

[0033] M4: The fourth transistor

[0034] M5: The fifth transistor

[0035] M6: The sixth transistor

[0036] M7: The seventh transistor

[0037] N: Second node

[0038] Q: First Node

[0039] U2D: first reference voltage

[0040] VGL: The third reference voltage

[0041] XCK: Second clock signal source. DETAILED DESCRIPTION

[0042] The following disclosure provides many different embodiments or examples for implementing different features of the provided invention. The embodiments of the components and configurations described below are provided as examples only and are not intended to be limiting. In addition, for the purpose of simplicity and clarity, the present invention repeats reference symbols and / or numbers in each example, which in itself does not limit the relationship between the various embodiments and / or components discussed.

[0043] The terms “first,” “second,” etc. used in this document do not particularly refer to an order or sequence, but are only used to distinguish elements or operations described with the same technical terminology.

[0044] Please refer to Figure 1 , Figure 1 FIG. 1 is a schematic diagram showing the structure of a driving system 100 for an embedded touch panel according to an embodiment of the present invention. Figure 1 As shown, in an embodiment of the present invention, the driving system 100 of the embedded touch panel includes a control circuit 110 and a gate driving circuit 120. The gate driving circuit 120 outputs a gate driving signal corresponding to a gate line to the pixel array 130 to sequentially control the pixel units in the pixel array 130 to display. The control circuit 110 is electrically connected to the gate driving circuit 120 to output a signal to control the operation of the gate driving circuit 120. In this embodiment, the control circuit 110 is a chip including a timing controller (T-con), but the embodiments of the present invention are not limited thereto.

[0045] Please refer to Figure 2 , Figure 2 A schematic diagram of the circuit structure of the gate driving circuit 120 according to an embodiment of the present invention is shown. The gate driving circuit 120 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, a first capacitor C1 and a second capacitor C2. The control operation of the gate driving circuit 120 is illustrated below by taking the nth gate line as an example. For example, the gate driving circuit 120 corresponds to the nth gate line of the pixel array 130, and is used to output a control signal G(n) to the nth gate line to control the corresponding pixel array, where n is a positive integer. In the present embodiment, the gate driving circuit 120 receives the first reference voltage U2D, the second reference voltage D2U and the third reference voltage VGL provided by the control circuit 110 to output a control signal G(n) to the nth gate line of the pixel array 130. However, the embodiments of the present invention are not limited thereto.

[0046] The first end of the first transistor M1 receives the second reference voltage D2U, the control end of the first transistor M1 receives the first gate control signal G(n+1), and the second end of the first transistor M1 is electrically connected to the first node Q, wherein the first gate control signal G(n+1) is the control signal of the n+1th scan line. The first end of the second transistor M2 is electrically connected to the first clock signal source CK and receives the first clock signal, the control end of the second transistor M2 is electrically connected to the first node Q, and the second end of the second transistor M2 receives the third reference voltage VGL. The first capacitor C1 is electrically connected between the first end of the second transistor M2 and the first clock signal source CK. The first end of the third transistor M3 is electrically connected to the first node Q, the control end of the third transistor M3 is electrically connected to the first end of the second transistor M2, and the second end of the third transistor M3 receives the third reference voltage VGL. The first end of the fourth transistor M4 receives the first reference voltage U2D, the control end of the fourth transistor M4 receives the second gate control signal G(n-1), and the second end of the fourth transistor M4 is electrically connected to the first node Q, wherein the second gate control signal G(n-1) is the control signal of the n-1th scan line. The first end of the fifth transistor M5 is electrically connected to the second node N, the control end of the fifth transistor is electrically connected to the second clock signal source XCK and receives the second clock signal, and the second end of the fifth transistor M5 receives the third reference voltage VGL. The first end of the sixth transistor M6 is electrically connected to the second node N, the control end of the sixth transistor M6 is electrically connected to the first end of the second transistor M2, and the second end of the sixth transistor M6 receives the third reference voltage VGL. The first end of the seventh transistor M7 is electrically connected to the first clock signal source CK and receives the first clock signal, the control end of the seventh transistor M7 is electrically connected to the first node Q, and the second end of the seventh transistor M7 is electrically connected to the second node N. The second capacitor C2 is electrically connected between the first node Q and the second node N.

[0047] In an embodiment of the present invention, when the embedded touch panel is performing a display operation, the control circuit 110 sets the first reference voltage U2D to a first voltage value, and sets the second reference voltage D2U and the third reference voltage VGL to a second voltage value, wherein the first voltage value is greater than the second voltage value. The first voltage value may be, for example, +15 volts, and the second voltage value may be, for example, -12 volts, but the embodiment of the present invention is not limited thereto.

[0048] The first transistor M1 and the fourth transistor M4 correspond to the up to down scanning operation and the down to up scanning operation of the embedded touch panel, respectively. For example, when the embedded touch panel performs the up scanning, the fourth transistor M4 is turned on according to the second gate control signal G(n-1), so that the first reference voltage U2D can be received to charge the first node Q; when the embedded touch panel performs the down scanning, the first transistor M1 is turned on according to the first gate control signal G(n+1), so that the second reference voltage D2U can be received to charge the first node Q.

[0049] The seventh transistor M7 and the second capacitor C2 form an output driving unit 210. The seventh transistor M7 outputs a control signal G(n) according to the first clock signal of the first clock signal source CK to control the scanning operation of the nth scanning line. The second capacitor C2 is used to maintain the voltage of the seventh transistor M7 to prevent leakage.

[0050] The second transistor M2, the third transistor M3, the sixth transistor M6 and the first capacitor C1 form a pull-down control unit 220. The pull-down control unit 220 determines whether to pull down the potentials of the first node Q and the second node N according to the potential of the first node Q. For example, when the first node Q is at a high potential, the second transistor M2 is turned on, and when the first node Q is at a low potential, the second transistor M2 is turned off, so that the potential of the first end of the second transistor M2 can be controlled, and then the potential of the control end of the third transistor M3 and the sixth transistor M6 can be controlled to operate the third transistor M3 and the sixth transistor M6. When the third transistor M3 and the sixth transistor M6 are turned on, the potentials of the first node Q and the second node N are pulled down.

[0051] The fifth transistor M5 determines whether to pull down the potential of the control signal G(n) of the second node N according to the second clock signal of the second clock signal source XCK. The control terminal of the fifth transistor M5 receives the second clock signal of the second clock signal source XCK, which is inverted with the first clock signal of the first clock signal source CK.

[0052] Please refer to Figure 3 , Figure 3A flow chart of a control method 300 of a driving circuit of an embedded touch panel according to an embodiment of the present invention is shown. In step 310, the gate driving circuit 120 described above is provided. In step 320, the control circuit 110 provides a first reference voltage U2D, a second reference voltage D2U, and a third reference voltage VGL to the gate driving circuit 120. In step 330, the control circuit 110 detects the ambient temperature to obtain a temperature value of the working environment of the driving system 100. In step 340, the control circuit 110 determines whether the ambient temperature value is greater than a preset temperature threshold.

[0053] When the ambient temperature value is greater than the preset temperature threshold, step 350 is performed, and the control circuit 110 increases the second reference voltage D2U from the second voltage value to the first voltage value during the long vertical blank period (Long-H), and maintains the first reference voltage U2D at the first voltage value, and maintains the third reference voltage VGL at the second voltage value. For example, the second reference voltage D2U is increased from -12 volts to +15 volts, the first reference voltage U2D is maintained at +15 volts, and the third reference voltage VGL is maintained at -12 volts.

[0054] When the ambient temperature value is not greater than (less than or equal to) the preset temperature threshold, step 360 is performed, and the control circuit 110 maintains the second reference voltage D2U at the second voltage value during the long vertical blank period (Long-H), and also maintains the first reference voltage U2D at the first voltage value, and maintains the third reference voltage VGL at the second voltage value. For example, the second reference voltage D2U is maintained at -12 volts, the first reference voltage U2D is maintained at +15 volts, and the third reference voltage VGL is maintained at -12 volts.

[0055] Please also Figure 2 and Figure 4 ,in Figure 4 The voltage waveform diagram of the first reference voltage U2D and the second reference voltage D2U according to an embodiment of the present invention is shown. In an embodiment of the present invention, the temperature value of the driving system 100 may affect the working performance of the gate driving circuit 120 of the driving system 100. For example, the leakage current of the first transistor M1 of the gate driving circuit 120 may increase significantly at high temperature, so that the voltage of the first node Q cannot be maintained, and thus the working performance of the gate driving circuit 120 cannot reach the expected design performance. Therefore, the embodiment of the present invention utilizes the control circuit 110 to detect the temperature of the working environment, so as to change the value of the second reference voltage D2U accordingly according to the ambient temperature value, so that the working performance of the gate driving circuit 120 is not affected by the temperature and can reach the expected design performance.

[0056] For example, in this embodiment, the preset temperature threshold is 80° C. When the control circuit 110 detects that the temperature of the working environment reaches, for example, 85° C., the control circuit 110 will increase the second reference voltage D2U from -12 volts to +15 volts during the long vertical blank period, thereby reducing the leakage current of the first transistor M1 and maintaining the voltage of the first node Q. On the contrary, if the temperature of the working environment does not exceed the preset temperature threshold, the control circuit 110 will maintain the second reference voltage D2U at -12 volts.

[0057] The long vertical blank period is a period for the touch panel to provide touch sensing. During the long vertical blank period, the touch panel will sense the user's touch operation and give corresponding feedback.

[0058] From the above description, it can be known that the driving system 100 of the embedded touch panel and the control method 300 of the driving circuit of the embedded touch panel of the embodiment of the present invention provide a temperature compensation operation of the second reference voltage D2U by detecting the ambient temperature through the control circuit 110. Specifically, when the ambient temperature is detected to be over a preset temperature threshold, the control circuit 110 will increase the voltage value of the second reference voltage D2U during the long vertical blank period (Long-H) to reduce the leakage current of the first transistor M1 and maintain the voltage of the first node Q. In this way, the embedded touch display panel can be prevented from having horizontal stripes when displaying the picture, thereby improving the image quality of the embedded touch display panel.

[0059] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. A person skilled in the art in the art to which the present invention belongs may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be based on the scope of the attached patent application.

Claims

1. A driving system for an embedded touch panel, characterized in that: Include: a gate driving circuit for outputting a gate driving signal corresponding to a gate line; and a control circuit electrically connected to the gate driving circuit to provide a first reference voltage, a second reference voltage and a third reference voltage to the gate driving circuit to drive the gate driving circuit, wherein the control circuit is further used to: Setting the first reference voltage to a first voltage value, and setting the second reference voltage and the third reference voltage to a second voltage value, wherein the first voltage value is greater than the second voltage value; Detecting an ambient temperature; Determining whether the ambient temperature is greater than a preset temperature threshold; When the ambient temperature is greater than the preset temperature threshold, the second reference voltage is increased from the second voltage value to the first voltage value, the first reference voltage is maintained at the first voltage value, and the third reference voltage is maintained at a second voltage value.

2. The driving system of the embedded touch panel according to claim 1, wherein: The gate drive circuit includes: a first transistor, wherein a first terminal of the first transistor receives the second reference voltage, a control terminal of the first transistor receives a first gate control signal, and a second terminal of the first transistor is electrically connected to a first node; a second transistor, wherein a first terminal of the second transistor is electrically connected to a first clock signal source to receive a first clock signal, a control terminal of the second transistor is electrically connected to the first node, and a second terminal of the second transistor receives the third reference voltage; a first capacitor electrically connected between the first end of the second transistor and the first clock signal source; a third transistor, wherein a first terminal of the third transistor is electrically connected to the first node, a control terminal of the third transistor is electrically connected to the first terminal of the second transistor, and a second terminal of the third transistor receives the third reference voltage; a fourth transistor, wherein a first terminal of the fourth transistor receives the first reference voltage, a control terminal of the fourth transistor receives a second gate control signal, and a second terminal of the fourth transistor is electrically connected to the first node; a fifth transistor, wherein a first terminal of the fifth transistor is electrically connected to a second node, a control terminal of the fifth transistor is electrically connected to a second clock signal source to receive a second clock signal, and a second terminal of the fifth transistor receives the third reference voltage; a sixth transistor, wherein a first terminal of the sixth transistor is electrically connected to the second node, a control terminal of the sixth transistor is electrically connected to the first terminal of the second transistor, and a second terminal of the sixth transistor receives the third reference voltage; a seventh transistor, wherein a first terminal of the seventh transistor is electrically connected to the first clock signal source to receive the first clock signal, a control terminal of the seventh transistor is electrically connected to the first node, and a second terminal of the seventh transistor is electrically connected to the second node; and A second capacitor is electrically connected between the first node and the second node.

3. The driving system of the embedded touch panel according to claim 2, wherein: The first transistor and the fourth transistor correspond to a forward scanning operation and a reverse scanning operation of the in-cell touch panel respectively.

4. The driving system of the embedded touch panel according to claim 2, wherein: When the first reference voltage is the first voltage value, and the second reference voltage and the third reference voltage are the second voltage value, the first node has a first node voltage value; When the first reference voltage and the second reference voltage are the first voltage value, and the third reference voltage is the second voltage value, the first node has a second node voltage value; The second node voltage value is greater than the first node voltage value.

5. The driving system of the embedded touch panel according to claim 1, wherein: When the control circuit determines that the ambient temperature is not greater than the preset temperature threshold, the control circuit maintains the second reference voltage at the second voltage value.

6. A method for controlling a driving circuit of an embedded touch panel, characterized in that: Include: Providing a gate driving circuit, wherein the gate driving circuit is used to output a gate driving signal corresponding to a gate line; Providing a first reference voltage, a second reference voltage and a third reference voltage to the gate driving circuit to drive the gate driving circuit, wherein the first reference voltage is set to a first voltage value, and the second reference voltage and the third reference voltage are set to a second voltage value, and the first voltage value is greater than the second voltage value; Detecting an ambient temperature; Determining whether the ambient temperature is greater than a preset temperature threshold; as well as When the ambient temperature is greater than the preset temperature threshold, the second reference voltage is increased from the second voltage value to the first voltage value, the first reference voltage is maintained at the first voltage value, and the third reference voltage is maintained at a second voltage value.

7. The control method of the driving circuit of the embedded touch panel according to claim 6, characterized in that: The gate drive circuit includes: a first transistor, wherein a first terminal of the first transistor receives the second reference voltage, a control terminal of the first transistor receives a first gate control signal, and a second terminal of the first transistor is electrically connected to a first node; a second transistor, wherein a first terminal of the second transistor is electrically connected to a first clock signal source to receive a first clock signal, a control terminal of the second transistor is electrically connected to the first node, and a second terminal of the second transistor receives the third reference voltage; a first capacitor electrically connected between the first end of the second transistor and the first clock signal source; a third transistor, wherein a first terminal of the third transistor is electrically connected to the first node, a control terminal of the third transistor is electrically connected to the first terminal of the second transistor, and a second terminal of the third transistor receives the third reference voltage; a fourth transistor, wherein a first terminal of the fourth transistor receives the first reference voltage, a control terminal of the fourth transistor receives a second gate control signal, and a second terminal of the fourth transistor is electrically connected to the first node; a fifth transistor, wherein a first terminal of the fifth transistor is electrically connected to the second node, a control terminal of the fifth transistor is electrically connected to a second clock signal source to receive a second clock signal, and a second terminal of the fifth transistor receives the third reference voltage; a sixth transistor, wherein a first terminal of the sixth transistor is electrically connected to the second node, a control terminal of the sixth transistor is electrically connected to the first terminal of the second transistor, and a second terminal of the sixth transistor receives the third reference voltage; a seventh transistor, wherein a first terminal of the seventh transistor is electrically connected to the first clock signal source to receive the first clock signal, a control terminal of the seventh transistor is electrically connected to the first node, and a second terminal of the seventh transistor is electrically connected to the second node; as well as a second capacitor electrically connected between the first node and the second node; Wherein, when the first reference voltage is the first voltage value, and the second reference voltage and the third reference voltage are the second voltage value, the first node has a first node voltage value; When the first reference voltage and the second reference voltage are the first voltage value, and the third reference voltage is the second voltage value, the first node has a second node voltage value; The second node voltage value is greater than the first node voltage value.

8. The control method of the driving circuit of the embedded touch panel according to claim 7, characterized in that: The first transistor and the fourth transistor correspond to a forward scanning operation and a reverse scanning operation of the in-cell touch panel respectively.

9. The control method of the driving circuit of the embedded touch panel according to claim 6, characterized in that: When the ambient temperature is not greater than the preset temperature threshold, the second reference voltage is maintained at the second voltage value.

10. The control method of the driving circuit of the embedded touch panel according to claim 6, characterized in that: When the embedded touch panel performs a touch sensing operation, the second reference voltage is increased from the second voltage value to the first voltage value.

Images