Three-dimensional multi-interface interconnection fixture and method for manufacturing power device

Abstract

The present invention provides a three-dimensional multi-interface interconnection fixture and a method for manufacturing a power device. The three-dimensional multi-interface interconnection fixture is used to perform interface interconnection on a power device. The power device includes a liner, a chip, and an interconnection component. The three-dimensional multi-interface interconnection fixture includes: a fixture body; a positioning portion, which is arranged on the fixture body, and the positioning portion can be positioned and matched with the liner in the lateral direction and the vertical direction; a first interconnection groove, which is arranged through the upper surface and the lower surface of the fixture body, and the first part of the groove wall of the first interconnection groove is positioned and matched with the edge of the chip in the lateral direction, and the second part of the groove wall of the first interconnection groove is positioned and matched with the side wall of the interconnection component in the lateral direction. The technical solution provided by the present application can solve the problem in the related art that if the interconnection process of the power device has multi-step interconnection or spatial layout, multiple fixtures are often used, resulting in low interconnection efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of power devices, and in particular to a three-dimensional multi-interface interconnection fixture and a method for manufacturing a power device. Background Art

[0002] The fully controlled device power field effect transistor (MOSFET) is a semiconductor device. It is a voltage-controlled device that uses gate voltage to control the flow of current. MOSFET is a field effect transistor with a metal-oxide-semiconductor (MOS) structure and is widely used in various electronic circuits, especially in the field of power electronics. The fully controlled device power field effect transistor (MOSFET) is considered to be an ideal switching device due to its advantages such as high input impedance, fast switching speed and low driving requirements. However, the power handling capacity of traditional silicon-based power MOSFET devices in the high-voltage field is limited by the internal resistance of the chip. How to reduce the chip on-resistance and increase the chip breakdown voltage is the research focus of the next generation of power MOSFET devices. Wide bandgap semiconductor materials represented by silicon carbide materials are considered to be ideal materials for the next generation of high-voltage power devices due to their excellent material properties: wide bandgap width, high critical breakdown field strength, and high saturated carrier mobility. Among all silicon carbide devices, silicon carbide MOSFET has the advantages of low on-resistance, fast switching speed, and high withstand voltage, and has gradually replaced silicon-based MOSFET and IGBT devices.

[0003] In the related art, the fixture plays an important role in the manufacturing process of power devices. The fixture is a tool that plays a positioning role in the interconnection process. Among them, the fixture can position the sub-components (such as chips) of the power device to ensure assembly accuracy.

[0004] However, in the related art, one fixture usually corresponds to one process step or one plane layout of a power device. Therefore, if the interconnection process of the power device has multiple interconnection steps or spatial layout, multiple fixtures are often used, resulting in low interconnection efficiency. Summary of the invention

[0005] The present invention provides a three-dimensional multi-interface interconnection fixture and a method for manufacturing a power device to solve the problem in the related art that when the interconnection process of the power device has multiple steps of interconnection or a spatial layout, multiple fixtures are often used, resulting in low interconnection efficiency.

[0006] According to one aspect of the present invention, a three-dimensional multi-interface interconnection fixture is provided, which is used for performing interface interconnection on power devices. The power devices include a backing plate, a chip and an interconnection member. The chip is arranged on a conductive structure of the backing plate, and the interconnection member is conductively connected to the upper surface of the chip and the conductive structure respectively. The three-dimensional multi-interface interconnection fixture includes: a fixture body; a positioning portion, which is arranged on the fixture body, and the positioning portion can be positioned and matched with the backing plate in the lateral direction and the vertical direction; a first interconnection groove, which is arranged through the upper surface and the lower surface of the fixture body, and the first part of the groove wall of the first interconnection groove is positioned and matched with the edge of the chip in the lateral direction, and the second part of the groove wall of the first interconnection groove is positioned and matched with the side wall of the interconnection member in the lateral direction.

[0007] Further, the first interconnecting groove includes a first groove section and a second groove section which are connected and arranged in the lateral direction, at least part of the side wall of the first groove section is positioned and matched with the edge of the chip in the lateral direction, and at least part of the side wall of the second groove section is positioned and matched with the side wall of the interconnecting component in the lateral direction.

[0008] Furthermore, the shape of the first groove section is adapted to the outer shape of the chip, and all side walls of the first groove section are positioned and matched with the edge of the chip in the lateral direction.

[0009] Furthermore, the interconnection component includes a main body section and an interface interconnection section, the lower surface of the main body section is conductively connected to the conductive structure, the interface interconnection section is located on the side of the main body section and is connected to the main body section, and the lower surface of the interface interconnection section is conductively connected to the upper surface of the chip; the shape of the second groove section is adapted to the outer shape of the main body section, and all side walls of the second groove section are positioned and matched with the side walls of the main body section in the lateral direction.

[0010] Furthermore, the interconnection component also includes a connecting section, which is located on the side of the main body section, and the two ends of the connecting section are respectively connected to the main body section and the interface interconnection section; the first interconnection groove also includes a connecting groove section, and the two ends of the connecting groove section are respectively connected to the first groove section and the second groove section, the connecting section is located in the connecting groove section, and the two opposite side walls of the connecting groove section are respectively positioned and matched with the two side walls of the connecting section in the lateral direction.

[0011] Furthermore, the direction from the first slot segment to the second slot segment is a first transverse direction, and the second slot segment protrudes outwardly from the connecting slot segment on a first side in a second transverse direction perpendicular to the first transverse direction.

[0012] Further, the second slot segment is recessed inwardly with respect to the first slot segment at a second side in the second transverse direction.

[0013] Further, the first interconnected slot includes two first slot segments and two connecting slot segments, the two connecting slot segments are symmetrically arranged at both ends of the second slot segment, and a first slot segment is arranged at one end of each connecting slot segment away from the second slot segment.

[0014] Further, the side wall of the first interconnection groove that is positioned and matched with the chip and / or the interconnection member is a planar structure.

[0015] Furthermore, the three-dimensional multi-interface interconnection fixture also includes a second interconnection groove, the power device also includes a control component, the control component includes a mounting substrate and a resistor element arranged on the mounting substrate, one of the surfaces of the mounting substrate in its thickness direction is connected to the conductive structure, the resistor element is located on the other surface of the mounting substrate in its thickness direction, and at least a portion of the side wall of the second interconnection groove is positioned and matched with the edge of the mounting substrate.

[0016] Furthermore, the three-dimensional multi-interface interconnection fixture comprises two first interconnection grooves, the extension directions of the two first interconnection grooves are parallel to each other and are symmetrically arranged on both sides of the second interconnection groove.

[0017] Furthermore, a second interconnecting groove is arranged between two opposite first groove sections of the two first interconnecting grooves.

[0018] Furthermore, the positioning portion is arranged on the lower surface of the clamp body.

[0019] Furthermore, the positioning portion includes a positioning groove, the first interconnecting groove is connected to the positioning groove, the shape of the positioning groove is adapted to the outer shape of the lining plate, and all side walls of the positioning groove are positioned and matched with side walls of the lining plate in the lateral direction.

[0020] Furthermore, the depth dimension of the positioning groove is less than or equal to the thickness dimension of the lining plate.

[0021] According to another aspect of the present invention, a method for manufacturing a power device is provided. The method for manufacturing a power device is implemented using the three-dimensional multi-interface interconnection fixture provided above. The method for manufacturing a power device includes: placing a backing plate, a chip, and an interconnection component into a fixture body of the three-dimensional multi-interface interconnection fixture, positioning the backing plate using a positioning portion of the three-dimensional multi-interface interconnection fixture, positioning the chip and the interconnection component using a first interconnection groove of the three-dimensional multi-interface interconnection fixture; welding the chip and the backing plate, and welding the interconnection component to the chip and the backing plate, respectively.

[0022] According to another aspect of the present invention, a method for manufacturing a power device is provided, and the method for manufacturing a power device is implemented using the three-dimensional multi-interface interconnection fixture provided above, and the method for manufacturing a power device comprises: placing a backing plate, a chip, an interconnection component and a control component into a fixture body of the three-dimensional multi-interface interconnection fixture, positioning the backing plate using a positioning portion of the three-dimensional multi-interface interconnection fixture, positioning the chip and the interconnection component using a first interconnection groove of the three-dimensional multi-interface interconnection fixture, and positioning a mounting substrate of the control component using a second interconnection groove of the three-dimensional multi-interface interconnection fixture; welding the chip and the backing plate, and welding the interconnection component to the chip and the backing plate respectively, and welding the mounting substrate and the backing plate simultaneously or subsequently, and the chip and the mounting substrate are both welded to the same conductive layer of the conductive structure.

[0023] By applying the technical solution of the present invention, the three-dimensional multi-interface interconnection fixture is used to perform interface interconnection on power devices. The power devices include a liner, a chip, and an interconnection component. The chip is arranged on the conductive structure of the liner, and the interconnection component is conductively connected to the upper surface of the chip and the conductive structure respectively. When it is necessary to implement an interconnection process on the power device, the liner, the chip, and the interconnection component are first placed on the fixture body of the three-dimensional multi-interface interconnection fixture, and then the liner is positioned using the positioning portion of the three-dimensional multi-interface interconnection fixture, and the chip and the interconnection component are simultaneously positioned using the first interconnection groove of the three-dimensional multi-interface interconnection fixture. After the positioning of the liner, the chip, and the interconnection component is completed, the interconnection process is performed. By using the three-dimensional multi-interface interconnection fixture provided above, the multi-interface interconnection of multiple components can be realized using the same fixture, thereby improving the interconnection efficiency and reducing the interconnection cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0025] Figure 1 A top view of a three-dimensional multi-interface interconnection fixture provided according to an embodiment of the present invention is shown;

[0026] Figure 2 A schematic structural diagram of a three-dimensional multi-interface interconnection fixture provided according to an embodiment of the present invention is shown;

[0027] Figure 3 A bottom view of a three-dimensional multi-interface interconnection fixture provided according to an embodiment of the present invention is shown;

[0028] Figure 4 A schematic structural diagram of a three-dimensional multi-interface interconnection fixture provided by an embodiment of the present invention from another perspective is shown;

[0029] Figure 5A top view of the assembly of a three-dimensional multi-interface interconnection fixture and a power device according to an embodiment of the present invention is shown;

[0030] Figure 6 Shows Figure 5 A partial enlarged view of the middle A;

[0031] Figure 7 A partial enlarged view of a three-dimensional multi-interface interconnection fixture provided according to an embodiment of the present invention is shown;

[0032] Figure 8 A schematic diagram of assembling a three-dimensional multi-interface interconnection fixture and a power device according to an embodiment of the present invention is shown;

[0033] Fig. 9 A partial structural schematic diagram of a power device provided in an embodiment of the present invention is shown;

[0034] Fig.10 An exploded view of a control component of a power device provided in accordance with an embodiment of the present invention is shown;

[0035] Fig.11 A schematic structural diagram of an interconnection component of a power device provided according to an embodiment of the present invention is shown.

[0036] The above drawings include the following reference numerals:

[0037] 10. liner; 11. conductive structure; 111. first sub-conductive layer; 112. second sub-conductive layer;

[0038] 20. Chip;

[0039] 30. Interconnection member; 31. Main body section; 32. Interface interconnection section; 33. Connecting section; 34. Wetting groove; 35. Connecting groove;

[0040] 40. Fixture body;

[0041] 50. positioning portion; 51. positioning groove;

[0042] 60, first interconnecting groove; 61, first groove section; 62, second groove section; 63, connecting groove section; 631, first connecting groove section; 632, second connecting groove section;

[0043] 70. Second interconnection groove;

[0044] 80, control component; 81, mounting substrate; 811, substrate body; 812, first metal layer; 813, second metal layer; 82, resistor element;

[0045] X, first lateral direction; Y, second lateral direction. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] like Figures 1 to 11 As shown, an embodiment of the present invention provides a three-dimensional multi-interface interconnection fixture, which is used for interface interconnection of power devices. The power device includes a liner 10, a chip 20 and an interconnection member 30. The chip 20 is arranged on the conductive structure 11 of the liner 10. The interconnection member 30 is conductively connected to the upper surface of the chip 20 and the conductive structure 11 respectively. The three-dimensional multi-interface interconnection fixture includes a fixture body 40, a positioning portion 50 and a first interconnection groove 60. The positioning portion 50 is arranged on the fixture body 40, and the positioning portion 50 can be positioned and matched with the liner 10 in the lateral direction and the vertical direction. The first interconnection groove 60 is arranged through the upper surface and the lower surface of the fixture body 40. The first part of the groove wall of the first interconnection groove 60 is positioned and matched with the edge of the chip 20 in the lateral direction, and the second part of the groove wall of the first interconnection groove 60 is positioned and matched with the side wall of the interconnection member 30 in the lateral direction.

[0048] By using the three-dimensional multi-interface interconnection fixture provided in this embodiment, when it is necessary to implement an interconnection process on a power device, firstly, the liner 10, the chip 20 and the interconnection member 30 are all placed on the fixture body 40 of the three-dimensional multi-interface interconnection fixture, and then the liner 10 is positioned by using the positioning portion 50 of the three-dimensional multi-interface interconnection fixture, and the chip 20 and the interconnection member 30 are positioned by using the first interconnection groove 60 of the three-dimensional multi-interface interconnection fixture. After the positioning of the liner 10, the chip 20 and the interconnection member 30 is completed, the interconnection process is performed. By using the three-dimensional multi-interface interconnection fixture provided above, the multi-interface interconnection of multiple components can be realized by using the same fixture, thereby improving the interconnection efficiency and reducing the interconnection cost.

[0049] It should be noted that the positioning portion 50 can be positioned and matched with the liner 10 in the transverse direction and the vertical direction, which means that the positioning portion 50 can limit the liner 10 in the transverse direction and the vertical direction to limit the freedom of the liner 10 in the transverse direction and the vertical direction, so that the liner 10 is fixed on the fixture body 40. The first part of the groove wall of the first interconnecting groove 60 is positioned and matched with the edge of the chip 20 in the transverse direction, which means that the first part of the groove wall of the first interconnecting groove 60 can limit the chip 20 in the transverse direction to limit the freedom of the chip 20 in the transverse direction and prevent the chip 20 from moving relative to the liner 10 in the transverse direction. The second part of the groove wall of the first interconnecting groove 60 is positioned and matched with the side wall of the interconnection member 30 in the transverse direction, which means that the second part of the groove wall of the first interconnecting groove 60 can limit the interconnection member 30 in the transverse direction to limit the freedom of the interconnection member 30 in the transverse direction and prevent the interconnection member 30 from moving relative to the chip 20 and the liner 10 in the transverse direction.

[0050] Specifically, the transverse direction refers to all transverse directions on a horizontal plane. Alternatively, the transverse direction refers to all transverse directions within a transverse plane that is at a certain angle (e.g., ±10°) to the horizontal plane. In this embodiment, the transverse direction corresponds to the plane where the length direction and the width direction of the clamp body 40 are located.

[0051] Specifically, the vertical direction refers to a vertical direction perpendicular to the horizontal plane. Alternatively, the vertical direction refers to a vertical direction that is at a certain angle (eg, ±10°) to the vertical direction. In this embodiment, the vertical direction corresponds to the thickness direction of the clamp body 40 .

[0052] In addition, the first part of the groove wall of the first interconnecting groove 60 and the second part of the groove wall of the first interconnecting groove 60 can be two independently set areas, or the first part of the groove wall of the first interconnecting groove 60 and the second part of the groove wall of the first interconnecting groove 60 can have an overlapping area.

[0053] like Figure 1 As shown, the first interconnection groove 60 includes a first groove section 61 and a second groove section 62 that are connected and arranged in the transverse direction, at least a part of the side wall of the first groove section 61 is positioned and matched with the edge of the chip 20 in the transverse direction, and at least a part of the side wall of the second groove section 62 is positioned and matched with the side wall of the interconnection member 30 in the transverse direction. The first groove section 61 and the second groove section 62 arranged in the transverse direction are used to position the chip 20 and the interconnection member 30 respectively, and the positioning structures of the chip 20 and the interconnection member 30 do not affect each other, so the positioning accuracy can be guaranteed.

[0054] The at least part of the side wall of the first slot section 61 and the edge of the chip 20 are positioned and matched in the lateral direction, including the following two structures: the first structure is that the part of the side wall of the first slot section 61 and the edge of the chip 20 are positioned and matched in the lateral direction; the second structure is that the entire side wall of the first slot section 61 and the edge of the chip 20 are positioned and matched in the lateral direction. The at least part of the side wall of the second slot section 62 and the side wall of the interconnection member 30 are positioned and matched in the lateral direction, including the following two structures: the first structure is that the part of the side wall of the second slot section 62 and the side wall of the interconnection member 30 are positioned and matched in the lateral direction; the second structure is that the entire side wall of the second slot section 62 and the side wall of the interconnection member 30 are positioned and matched in the lateral direction.

[0055] In this embodiment, the shape of the first groove section 61 is adapted to the shape of the chip 20, and all side walls of the first groove section 61 are positioned and matched with the edge of the chip 20 in the lateral direction. With the above structure, the chip 20 has more contact parts with the first interconnection groove 60, which can improve the positioning accuracy of the chip 20.

[0056] like Figure 1 , Fig. 9 as well as Fig.11 As shown, the interconnection member 30 includes a main body section 31 and an interface interconnection section 32. The lower surface of the main body section 31 is conductively connected to the conductive structure 11. The interface interconnection section 32 is located at the side of the main body section 31 and connected to the main body section 31. The lower surface of the interface interconnection section 32 is conductively connected to the upper surface of the chip 20. The shape of the second slot section 62 is adapted to the shape of the main body section 31, and all the side walls of the second slot section 62 are positioned and matched with the side walls of the main body section 31 in the lateral direction. With the above structure, the main body section 31 has more contact parts with the first interconnection slot 60, which can ensure the positioning accuracy of the interconnection member 30.

[0057] like Fig.11 As shown, the interconnection member 30 further includes a connection section 33 , which is located at the side of the main body section 31 , and two ends of the connection section 33 are respectively connected to the main body section 31 and the interface interconnection section 32 .

[0058] In this embodiment, the first interconnecting groove 60 further includes a connecting groove section 63, the two ends of which are respectively connected to the first groove section 61 and the second groove section 62, the connecting section 33 is located in the connecting groove section 63, and the two opposite side walls of the connecting groove section 63 are respectively positioned and matched with the two side walls of the connecting section 33 in the lateral direction. By using the connecting groove section 63 to limit the connecting section 33 in the lateral direction, the positioning accuracy of the interconnecting member 30 can be further improved.

[0059] It should be noted that there are two positioning matches between the interconnection component 30 and the first interconnection groove 60. The first is that all the side walls of the second groove section 62 are positioned and matched with the side walls of the main section 31 in the transverse direction, and the second is that the two opposite side walls of the connecting groove section 63 are respectively positioned and matched with the two side walls of the connecting section 33 in the transverse direction. Under the effect of the positioning matches at the above two positions, the interconnection component 30 has the advantage of precise positioning.

[0060] like Figure 1 As shown, the direction from the first slot segment 61 to the second slot segment 62 is a first transverse direction, and the second slot segment 62 protrudes outward from the connecting slot segment 63 on a first side in a second transverse direction perpendicular to the first transverse direction.

[0061] like Figure 1 and Figure 8 As shown, the main body section 31 is also arranged to protrude from the interface interconnection section 32, that is, the main body section 31 forms a protruding structure, which is positioned and matched with the second groove section 62 in both the first lateral direction and the second lateral direction to achieve the positioning and matching of the main body section 31 and the second groove section 62.

[0062] It should be noted that the first transverse direction X is Figure 1 The second lateral direction Y is Figure 1 In the direction from left to right.

[0063] like Figure 1 As shown, in this embodiment, the first interconnected groove 60 includes two first groove sections 61 and two connecting groove sections 63, the two connecting groove sections 63 are symmetrically arranged at both ends of the second groove section 62, and one first groove section 61 is arranged at one end of each connecting groove section 63 away from the second groove section 62. Specifically, the first transverse direction X is Figure 1 The first slot section 61 located at the top points in the direction of the second slot section 62 .

[0064] Moreover, in this embodiment, the second slot segment 62 protrudes outward from the connecting slot segment 63 on a first side in a second transverse direction perpendicular to the first transverse direction, wherein “protruding outward” means protruding in a direction away from the center line of the connecting slot segment 63 .

[0065] like Figure 1 and Figure 6 As shown, the second slot section 62 is recessed inwardly in the first slot section 61 on the second side in the second transverse direction. Since the edge of the main section 31 of the interconnection member 30 in the second transverse direction is located on the inner side of the edge of the chip 20, by making the second slot section 62 recessed inwardly in the first slot section 61 on the second side in the second transverse direction, it is convenient to utilize the second slot section 62 on the second side in the second transverse direction to position and cooperate with the main section 31 of the interconnection member 30.

[0066] Furthermore, in this embodiment, the second slot segment 62 is recessed inwardly with respect to the first slot segment 61 at the second side in the second transverse direction, wherein “recessed” means recessed inwardly in the direction toward the center line of the connecting slot segment 63 .

[0067] like Figure 7 As shown, in this embodiment, the connecting groove segment 63 includes a first connecting groove segment 631 and a second connecting groove segment 632 in the direction from the first groove segment 61 to the second groove segment 62, the first end of the first connecting groove segment 631 is connected to the first groove segment 61, the second end of the first connecting groove segment 631 is connected to the first end of the second connecting groove segment 632, the second end of the second connecting groove segment 632 is connected to the second groove segment 62, and the groove width of the first connecting groove segment 631 is greater than the groove width of the second connecting groove segment 632.

[0068] Furthermore, the groove wall of the first side of the second connecting groove section 632 in the second transverse direction is flush with the groove wall of the first side of the first connecting groove section 631 in the second transverse direction, and the groove wall of the second side of the second connecting groove section 632 in the second transverse direction is flush with the groove wall of the second side of the second groove section 62 in the second transverse direction.

[0069] like Figure 7 As shown, the groove wall of the first connecting groove section 631 on the second side in the second transverse direction is flush with the groove wall of the first groove section 61 on the second side in the second transverse direction, which facilitates the processing of the first interconnecting groove 60 .

[0070] The above structure is adopted to facilitate the operation of the actual process. When the interconnection member 30 is placed in the first interconnection groove 60, the connecting section 33 of the interconnection member can be clamped by tweezers. Specifically, in the process of placing the interconnection member 30 in the first interconnection groove 60, since the groove width of the first connecting groove section 631 is greater than the groove width of the second connecting groove section 632, the first connecting groove section 631 can facilitate the placement operation of the tweezers.

[0071] like Figure 1 , Figure 5 as well as Figure 6 As shown, the first interconnecting groove 60 includes two first groove sections 61 and two connecting groove sections 63, and the interconnecting member 30 includes a main body section 31, two interface interconnecting sections 32 and two connecting sections 33, the two connecting sections 33 are symmetrically arranged on both sides of the main body section 31, and one end of each connecting section 33 away from the main body section 31 is provided with an interface interconnecting section 32. The first interconnecting groove 60 is arranged in the above structure, so that the first interconnecting groove 60 can be adapted to the interconnecting member 30.

[0072] In this embodiment, the conductive structure 11 is an axisymmetric structure, the symmetry axis of the conductive structure 11 extends along the second lateral direction, and the conductive structure 11 is provided with a plurality of chips 20, and the plurality of chips 20 on the conductive structure 11 are symmetrically arranged on both sides of the symmetry axis, so that the interconnection length between the upper surface of the chip 20 and the conductive structure 11 can be equal and moderate. In the related art, the chip layout position is relatively concentrated, resulting in different and generally longer interconnection lengths between the upper surface of the chip and the upper copper layer.

[0073] like Fig. 9 As shown, the conductive structure 11 includes a first sub-conductive layer 111 and two second sub-conductive layers 112, the first sub-conductive layer 111 and the second sub-conductive layer 112 are arranged at intervals in the first lateral direction, the axis of the first sub-conductive layer 111 is coaxial with the symmetry axis, the two second sub-conductive layers 112 are respectively located on both sides of the first sub-conductive layer 111 in the first lateral direction, the two second sub-conductive layers 112 are provided with a chip 20, and the upper surfaces of the chips 20 on the two second sub-conductive layers 112 are conductively connected to the first sub-conductive layer 111. By separating the two second sub-conductive layers 112 with the first sub-conductive layer 111 and providing the chips 20 on the two second sub-conductive layers 112, the spacing between the chips 20 can be further increased, so that the chips 20 are arranged as dispersedly as possible, and the heat dissipation performance is improved.

[0074] Furthermore, since the interconnection member 30 connects at least two chips, the number of connectors in the related art can be reduced, the space occupied in the power module can be reduced, the space utilization rate can be improved, and the arrangement of the devices can be facilitated.

[0075] It should be noted that in the related art, the power current conduction between the components inside the power module relies on the metal interconnection interface set on the components and the connectors connecting the metal interconnection interfaces. For example, the interconnection between the upper surface of the chip and the upper copper layer. However, the existing connectors are mostly used to realize the signal connection of two interconnection interfaces. When there are multiple pairs of interfaces that need to be interconnected, such as when there are multiple pairs of chips on a liner, multiple connectors are required, which will occupy a larger space in the module, resulting in low device space utilization and placing greater restrictions on device layout.

[0076] Specifically, at least one of the lower surface of the main body section 31 and the lower surface of the interface interconnection section 32 is provided with a wetting groove 34. The wetting groove 34 can be used to wet the solder to form a solder layer with a concave upper surface, which increases the wetting boundary length of the interconnection material compared to the case where there is no groove at the interconnection interface, thereby improving the strength of the interface connection.

[0077] It should be noted that the wetting groove 34 extends along the length direction of the interconnection component 30, so that the wetting groove 34 on the interconnection component 30 has a larger length, thereby making the interconnection component 30 and the chip have a larger wetting boundary length, thereby improving the strength of the interface connection.

[0078] like Fig.11 As shown, in this embodiment, the connecting section 33 is provided with a connecting groove 35, which can effectively increase the flexibility of the interconnection component 30, reduce the maximum interlayer stress when different interconnection interfaces produce relative displacement, and is beneficial to improving the reliability of the interconnection interface.

[0079] In this embodiment, the connecting grooves 35 and the wetting grooves 34 on the adjacent connecting sections 33 and the interface interconnection sections 32 are connected to facilitate processing.

[0080] Since the chip is disposed on the substrate, the main body section 31 is connected to the conductive structure of the substrate, and the interface interconnection section is connected to the chip, so that there is a height difference between the main body section 31 and the interface interconnection section. Generally speaking, the lower surface of the interface interconnection section is higher than the lower surface of the main body section 31.

[0081] It should be noted that, in the present embodiment, the interconnection member 30 is a sheet-like structure, which has a large heat dissipation area and can ensure the rapid conduction of the current heat flow, thereby improving the heat dissipation capacity of the power module.

[0082] The interface interconnection section 32 is a flat plate structure, which can increase the contact area between the interface interconnection section and the chip, thereby improving the connection strength and heat dissipation capability. In addition, the main body section 31 is a flat plate structure, which can increase the contact area between the main body section 31 and the conductive structure, thereby improving the connection strength and heat dissipation capability.

[0083] Specifically, the connecting section 33 is an arched plate structure, and the highest point of the upper surface of the connecting section 33 is higher than the highest point of the upper surface of the main section 31 and the highest point of the upper surface of the interface interconnection section 32. In this embodiment, the connecting section 33 is an arched plate structure.

[0084] The side wall of the first interconnection groove 60 that is positioned and matched with the chip 20 and / or the interconnection member 30 is a planar structure, which facilitates the chip 20 and the interconnection member 30 to be placed in the first interconnection groove 60 .

[0085] In this embodiment, the sidewall of the first interconnection groove 60 that is positioned and matched with the chip 20 and the interconnection member 30 is a planar structure.

[0086] like Figure 1 , Figure 2 , Figure 5 , Figure 6 as well as Figures 8 to 10As shown, the three-dimensional multi-interface interconnection fixture further includes a second interconnection groove 70, the power device further includes a control component 80, the control component 80 includes a mounting substrate 81 and a resistor element 82 disposed on the mounting substrate 81, one surface of the mounting substrate 81 in the thickness direction thereof is connected to the conductive structure 11, the resistor element 82 is located on the other surface of the mounting substrate 81 in the thickness direction thereof, and at least part of the sidewall of the second interconnection groove 70 is positioned and matched with the edge of the mounting substrate 81. The second interconnection groove 70 can be used to limit the mounting substrate 81 to limit the movement of the mounting substrate 81 in the lateral direction relative to the liner 10.

[0087] By setting the control component 80 as a mounting substrate 81 and a resistor element 82 disposed on the mounting substrate 81, and using the mounting substrate 81 to mount the resistor element 82 on the conductive structure 11 (a mounting position is provided on the conductive structure 11, one surface of the mounting substrate 81 in the thickness direction is connected to the mounting position, and the resistor element 82 is located on the other surface of the mounting substrate 81 in the thickness direction), the miniaturized discrete design of the control component 80 can be realized, and after the control component 80 itself is assembled and processed, the control component 80 is fixed to the mounting position of the liner 10. Compared with the method of directly connecting the resistor element to the liner in the related art, the risk of interconnection process failure of the resistor element can be reduced or eliminated, and the influence on the overall interconnection process failure can be reduced or eliminated.

[0088] In this embodiment, the resistor element 82 includes a gate resistor. The power device controls the switching characteristics of the silicon carbide device in the form of a series gate resistor, thereby effectively alleviating the module current sharing problem under switching transients.

[0089] Specifically, the gate circuit area and the power area are separated into upper and lower side structures to avoid the failure of the entire liner caused by the gate resistor failure caused by the process and high temperature, thereby improving the overall packaging yield. Since the control component is a miniaturized discrete design, the interconnection processing of the gate resistor can be completed by batch formation. Due to the insufficient temperature resistance of the gate resistor, there is a problem of probabilistic failure at high process temperatures. Screening can be introduced after the interconnection processing to avoid potential failure hazards. The control component can then be flexibly fixed to the liner according to the liner layout.

[0090] In summary, in this solution, we separate the gate circuit area from the power area, and place the gate circuit area above the power area, realizing the independent packaging of gate resistors individually and in batches in the early stage, while meeting the timely and efficient screening of gate resistor components after packaging. Since the packaging process can be separated from the power area, the failure of the gate resistor caused by the process and high temperature can be effectively avoided, which leads to the failure of the entire liner, thereby improving the overall packaging yield. At the same time, the structure of this solution makes full use of the space area, increases the use area of ​​the module, and increases the flexibility of the module gate side layout.

[0091] Furthermore, since the mounting substrate 81 has a certain vertical insulation effect, the insulation area of ​​the horizontal surface of the liner of the power device is effectively saved.

[0092] like Fig.10 As shown, the mounting substrate 81 includes a substrate body 811 and a first metal layer 812 disposed on the substrate body 811. The substrate body 811 is connected to the mounting position, and the resistor element 82 is disposed on the first metal layer 812. The first metal layer 812 is conductively connected to the resistor element 82.

[0093] Specifically, the first metal layer 812 is copper. Copper has high electrical conductivity, can reduce resistance, and improve current transmission efficiency. In addition, copper also has good thermal conductivity, which helps to dissipate heat of power devices and improve the stability and life of power devices.

[0094] In this embodiment, the mounting substrate 81 also includes a second metal layer 813. The first metal layer 812 and the second metal layer 813 are respectively located on both sides of the substrate body 811. The substrate body 811 is connected to the mounting position through the second metal layer 813. In this way, the second metal layer 813 can be used to improve the structural strength and heat dissipation performance of the control component.

[0095] In this embodiment, the second metal layer 813 is connected to the mounting position by melting and then solidifying (welding) the solder, which has the advantage of a firm connection.

[0096] In other embodiments, the second metal layer 813 is connected to the mounting position by bonding, which has the advantages of simple connection and easy assembly.

[0097] Specifically, the substrate body 811 is a ceramic substrate, and thus can effectively avoid the influence of heat generated on the power side on the resistance element, thereby improving the reliability of the device under high-temperature applications.

[0098] Ceramic substrates help improve the efficiency, stability and safety of power electronic systems through their unique thermal, mechanical and electrical properties. Ceramic substrates have high thermal conductivity, large heat capacity and strong heat diffusion function, which can effectively conduct the heat generated by the chip in the power module to the outside to achieve good heat dissipation effect. Ceramic substrates have strong electrical insulation capabilities, protecting users from the impact of the electrical system while ensuring electrical safety inside the module.

[0099] Specifically, ceramic substrates generally include alumina, aluminum nitride, zirconium oxide-doped alumina, silicon nitride and other ceramic materials. Alumina has excellent mechanical strength and chemical corrosion resistance, and is suitable for applications with high durability requirements. Zirconia is known for its outstanding toughness and high temperature resistance, and performs well in high temperature and high stress environments. Aluminum nitride has high thermal conductivity and low expansion coefficient, can effectively dissipate heat, and is suitable for high-power electronic devices. Silicon carbide not only has high hardness and high wear resistance, but also can remain stable at extremely high temperatures, making it very popular in high-temperature electronic devices and high-frequency applications. The diversity and excellent properties of these ceramic materials provide a wide range of choices and significant performance improvements for the design and application of silicon carbide devices.

[0100] In other embodiments, the substrate body 811 may be made of a polymer composite board.

[0101] Specifically, the gate resistor is first fixed to the mounting substrate using an interconnection process such as reflow soldering. This is different from the previous method of directly soldering the gate resistor and the chip to a substrate. Since the interconnection process temperature can exceed the rated temperature resistance of the existing gate resistor, some resistors fail due to process overheating. This solution can screen out the gate resistors that fail after the process, and then connect the assembled control components to the substrate.

[0102] Traditional modules generally design gate resistors on the same power liner plane, and the interconnection process needs to be completed in one step. If a single gate resistor fails, the entire liner will fail. In addition, in order to ensure the insulation capacity of the module, the traditionally designed gate resistor area occupies a large liner area, affecting the overall power density of the module. This embodiment designs a flexible gate resistor packaging solution to avoid the failure of the entire liner caused by the process and high temperature caused by the gate resistor failure, thereby improving the overall packaging yield.

[0103] like Figure 1 As shown, the three-dimensional multi-interface interconnection fixture includes two first interconnection grooves 60, the extension directions of the two first interconnection grooves 60 are parallel to each other and symmetrically arranged on both sides of the second interconnection groove 70. In addition, a second interconnection groove 70 is arranged between two opposite first groove sections 61 of the two first interconnection grooves 60, so that the three-dimensional multi-interface interconnection fixture can be applied to the layout of dispersed chips.

[0104] In the present embodiment, the positioning portion 50 is disposed on the lower surface of the clamp body 40 , and the positioning portion 50 does not interfere with the first interconnecting groove 60 and the second interconnecting groove 70 .

[0105] like Figure 3 and Figure 4As shown, the positioning portion 50 includes a positioning groove 51, the first interconnecting groove 60 is connected to the positioning groove 51, the shape of the positioning groove 51 is adapted to the shape of the liner 10, and all the side walls of the positioning groove 51 are positioned and matched with the side walls of the liner 10 in the transverse direction. The positioning groove 51 is used to limit the liner 10, which has the advantages of simple structure, easy processing and low cost.

[0106] In this embodiment, the depth dimension of the positioning groove 51 is less than or equal to the thickness dimension of the liner 10. After the three-dimensional multi-interface interconnection fixture is placed above the power device, the liner 10 extends into the positioning groove 51, so that the fixture body 40 can be placed on the liner 10 to achieve the vertical and horizontal positioning of the three-dimensional multi-interface interconnection fixture on the liner 10.

[0107] It should be noted that the three-dimensional multi-interface interconnection fixture provided in this embodiment provides the pattern of through-hole trenching (first interconnection trench 60 and second interconnection trench 70) of the three-dimensional multi-interface interconnection fixture according to the spatial layout of the power device and the projection geometry of the components to be interconnected (such as the liner 10, the chip 20, the interconnection component 30 and the control component 80) to the surface of the copper layer (conductive structure) and the spatial layout in the height direction. When the projections of different components to the surface of the copper layer partially overlap, the pattern of through-hole trenching of the three-dimensional multi-interface interconnection fixture is reflected in that the contour of the trenching pattern only partially overlaps with the projection contour of each component and partially contacts the components at different heights (when the production error is not considered), but the displacement of each component in the lateral direction can be limited in space.

[0108] Another embodiment of the present invention provides a method for manufacturing a power device. The method for manufacturing a power device is implemented using the three-dimensional multi-interface interconnection fixture provided above. The method for manufacturing a power device includes:

[0109] Place the liner 10, the chip 20 and the interconnection member 30 into the fixture body 40 of the three-dimensional multi-interface interconnection fixture, use the positioning part 50 of the three-dimensional multi-interface interconnection fixture to position the liner 10, and use the first interconnection groove 60 of the three-dimensional multi-interface interconnection fixture to position the chip 20 and the interconnection member 30;

[0110] The chip 20 and the backing plate 10 are welded, and at the same time, the interconnection member 30 is welded to the chip 20 and the backing plate 10 respectively.

[0111] By adopting the above-mentioned manufacturing method of the power device, the multi-interface interconnection of the liner 10, the chip 20 and the interconnection member 30 can be realized by using the same fixture, thereby improving the interconnection efficiency and reducing the interconnection cost.

[0112] Another embodiment of the present invention provides a method for manufacturing a power device. The method for manufacturing a power device is implemented using the three-dimensional multi-interface interconnection fixture provided above. The method for manufacturing a power device includes:

[0113] Place the liner 10, the chip 20, the interconnection member 30 and the control assembly 80 into the fixture body 40 of the three-dimensional multi-interface interconnection fixture, use the positioning portion 50 of the three-dimensional multi-interface interconnection fixture to position the liner 10, use the first interconnection groove 60 of the three-dimensional multi-interface interconnection fixture to position the chip 20 and the interconnection member 30, and use the second interconnection groove 70 of the three-dimensional multi-interface interconnection fixture to position the mounting substrate 81 of the control assembly 80;

[0114] The chip 20 and the backing plate 10 are welded, and the interconnection member 30 is welded to the chip 20 and the backing plate 10 respectively, and the mounting substrate 81 and the backing plate 10 are welded at the same time or subsequently, and the chip 20 and the mounting substrate 81 are welded to the same conductive layer of the conductive structure 11. Here, "simultaneously or subsequently" means: if the interconnection process temperature is lower than the existing gate resistor rated temperature resistance, then "simultaneously" is allowed; if the interconnection process temperature exceeds the existing gate resistor rated temperature resistance, then "subsequently" is required.

[0115] It should be noted that the chip 20 and the mounting substrate 81 are both soldered to the same conductive layer of the conductive structure 11. The “same conductive layer” here refers to the same continuous conductive layer, for example Fig. 9 The second sub-conductive layer 112 in the embodiment of the present invention.

[0116] By adopting the manufacturing method of the power device, the multi-interface interconnection of the liner 10, the chip 20, the interconnection member 30 and the control assembly 80 can be realized by using the same fixture, thereby improving the interconnection efficiency and reducing the interconnection cost.

[0117] Through the device provided in the embodiment, a three-dimensional multi-interface interconnection fixture is proposed for the case where the plane of the liner 10 has different heights relative to the plane and the projections on the plane where the liner 10 is located overlap. On the one hand, the three-dimensional multi-interface interconnection fixture can realize one-time interconnection of interfaces of different heights. On the other hand, if different interfaces need to be interconnected in multiple steps, only the same set of fixtures proposed can be used without using other fixtures. This is conducive to the mass production of power devices, reduces costs, and increases the stability of the interface interconnection process.

[0118] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0119] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present invention. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to actual proportional relationships. The technology, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0120] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the devices or elements referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention. The directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0121] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0122] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0123] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A three-dimensional multi-interface interconnection fixture, characterized in that: The three-dimensional multi-interface interconnection fixture is used for performing interface interconnection on a power device, the power device comprising a liner (10), a chip (20) and an interconnection member (30), the chip (20) being arranged on a conductive structure (11) of the liner (10), the interconnection member (30) being conductively connected to the upper surface of the chip (20) and the conductive structure (11) respectively, the three-dimensional multi-interface interconnection fixture comprising: A fixture body (40); A positioning portion (50) is provided on the clamp body (40), and the positioning portion (50) can be positioned and matched with the lining plate (10) in the transverse direction and the vertical direction; A first interconnecting groove (60) is arranged through the upper surface and the lower surface of the clamp body (40), a first portion of the groove wall of the first interconnecting groove (60) is positioned and matched with the edge of the chip (20) in the transverse direction, and a second portion of the groove wall of the first interconnecting groove (60) is positioned and matched with the side wall of the interconnecting member (30) in the transverse direction; A second interconnection groove (70) is arranged through the upper surface and the lower surface of the clamp body (40); the power device also includes a control component (80); the control component (80) includes a mounting substrate (81) and a resistor element (82) arranged on the mounting substrate (81); one of the surfaces of the mounting substrate (81) in the thickness direction is connected to the conductive structure (11); the resistor element (82) is located on the other surface of the mounting substrate (81) in the thickness direction; at least part of the side wall of the second interconnection groove (70) is positioned and matched with the edge of the mounting substrate (81).

2. The three-dimensional multi-interface interconnection fixture according to claim 1, characterized in that: The first interconnecting groove (60) comprises a first groove section (61) and a second groove section (62) which are connected and arranged along the transverse direction, at least a portion of the side wall of the first groove section (61) is positioned and matched with the edge of the chip (20) in the transverse direction, and at least a portion of the side wall of the second groove section (62) is positioned and matched with the side wall of the interconnecting member (30) in the transverse direction.

3. The three-dimensional multi-interface interconnection fixture according to claim 2, characterized in that: The shape of the first groove section (61) is adapted to the outer shape of the chip (20), and all side walls of the first groove section (61) are positioned and matched with the edge of the chip (20) in the transverse direction.

4. The three-dimensional multi-interface interconnection fixture according to claim 2, characterized in that: The interconnection member (30) comprises a main body section (31) and an interface interconnection section (32), the lower surface of the main body section (31) being conductively connected to the conductive structure (11), the interface interconnection section (32) being located at a side of the main body section (31) and being connected to the main body section (31), and the lower surface of the interface interconnection section (32) being conductively connected to the upper surface of the chip (20); The shape of the second groove section (62) is adapted to the outer shape of the main body section (31), and all side walls of the second groove section (62) are positioned and matched with the side walls of the main body section (31) in the transverse direction.

5. The three-dimensional multi-interface interconnection fixture according to claim 4, characterized in that: The interconnection member (30) further comprises a connection section (33), wherein the connection section (33) is located at a side portion of the main body section (31), and two ends of the connection section (33) are respectively connected to the main body section (31) and the interface interconnection section (32); The first interconnecting groove (60) further comprises a connecting groove section (63), the two ends of which are respectively connected to the first groove section (61) and the second groove section (62), the connecting section (33) is located in the connecting groove section (63), and the two opposite side walls of the connecting groove section (63) are respectively positioned and matched with the two side walls of the connecting section (33) in the transverse direction.

6. The three-dimensional multi-interface interconnection fixture according to claim 5, characterized in that: The direction from the first slot section (61) to the second slot section (62) is a first transverse direction, and the second slot section (62) protrudes outwardly from the connecting slot section (63) on a first side in a second transverse direction perpendicular to the first transverse direction.

7. The three-dimensional multi-interface interconnection fixture according to claim 6, characterized in that: The second slot section (62) is recessed inwardly with respect to the first slot section (61) on a second side in the second transverse direction.

8. The three-dimensional multi-interface interconnection fixture according to claim 5, characterized in that: The first interconnecting groove (60) comprises two first groove sections (61) and two connecting groove sections (63), the two connecting groove sections (63) being symmetrically arranged at two ends of the second groove section (62), and one of the first groove sections (61) being arranged at one end of each connecting groove section (63) away from the second groove section (62).

9. The three-dimensional multi-interface interconnection fixture according to any one of claims 1 to 8, characterized in that: The side wall of the first interconnection groove (60) that is positioned and matched with the chip (20) and / or the interconnection component (30) is a planar structure.

10. The three-dimensional multi-interface interconnection fixture according to any one of claims 2 to 8, characterized in that: The three-dimensional multi-interface interconnection fixture comprises two first interconnection grooves (60), the extension directions of the two first interconnection grooves (60) are parallel to each other and are symmetrically arranged on both sides of the second interconnection groove (70).

11. The three-dimensional multi-interface interconnection fixture according to claim 10, characterized in that: A second interconnecting groove (70) is provided between two opposite first groove sections (61) of two first interconnecting grooves (60).

12. The three-dimensional multi-interface interconnection fixture according to any one of claims 1 to 8, characterized in that: The positioning portion (50) is arranged on the lower surface of the clamp body (40).

13. The three-dimensional multi-interface interconnection fixture according to claim 12, characterized in that: The positioning portion (50) comprises a positioning groove (51), the first interconnecting groove (60) is connected to the positioning groove (51), the shape of the positioning groove (51) is adapted to the outer shape of the lining plate (10), and all side walls of the positioning groove (51) are positioned and matched with side walls of the lining plate (10) in the transverse direction.

14. The three-dimensional multi-interface interconnection fixture according to claim 13, characterized in that: The depth dimension of the positioning groove (51) is less than or equal to the thickness dimension of the lining plate (10).

15. A method for manufacturing a power device, characterized in that: The method for manufacturing the power device is implemented using the three-dimensional multi-interface interconnection fixture according to claim 1, and the method for manufacturing the power device comprises: Placing a liner (10), a chip (20), an interconnection component (30) and a control component (80) on a fixture body (40) of the three-dimensional multi-interface interconnection fixture, positioning the liner (10) using a positioning portion (50) of the three-dimensional multi-interface interconnection fixture, positioning the chip (20) and the interconnection component (30) using a first interconnection groove (60) of the three-dimensional multi-interface interconnection fixture, and positioning a mounting substrate (81) of the control component (80) using a second interconnection groove (70) of the three-dimensional multi-interface interconnection fixture; The chip (20) and the backing plate (10) are welded, and the interconnection member (30) is welded to the chip (20) and the backing plate (10) respectively, and the mounting substrate (81) and the backing plate (10) are welded simultaneously or subsequently, and the chip (20) and the mounting substrate (81) are both welded to the same conductive layer of the conductive structure (11).

Images