High-frequency front-end circuit

Abstract

The invention provides a high-frequency front-end circuit and a communication device, which can suppress deterioration of communication quality when simultaneous communication using a plurality of frequency bands is performed. A high-frequency front-end circuit (1) is provided with an antenna terminal (2), a transmission filter (3), a reception filter, a transmission filter, a switch (6), and a phase adjustment circuit (7). The switch (6) can be connected to the antenna terminal (2) and the transmission filter (3) or to the reception filter and the transmission filter at the same time. The transmission filter (3) is provided in the transmission path (T1). The reception filter is provided in the reception path. The transmission filter is arranged on the transmission path. The phase adjustment circuit (7) is provided in at least one of the transmission path (T1), the reception path, and the transmission / reception path.

Description

[0001] This application is a divisional application of the invention patent application with application number 202080010412.7, application date July 22, 2021, and invention name “High-frequency front-end circuit and communication device”. Technical Field

[0002] The present invention generally relates to a high-frequency front-end circuit and a communication device, and more particularly to a high-frequency front-end circuit capable of handling a plurality of different communications simultaneously, and a communication device having the high-frequency front-end circuit. Background Art

[0003] Conventionally, there is known a high-frequency front-end circuit that can cope with a plurality of mutually different communications used simultaneously (for example, refer to Patent Document 1).

[0004] In the high frequency front end circuit described in Patent Document 1, FDD (Frequency Division Duplex) and TDD (Time Division Duplex) communications are performed simultaneously by carrier aggregation (CA) for simultaneously transmitting and receiving signals in multiple frequency bands. The high frequency front end circuit described in Patent Document 1 bundles multiple carrier waves or channels.

[0005] Patent document 1: U.S. Patent Application Publication No. 2018 / 0294858.

[0006] In addition, during transmission, the strength of the transmission signal is high, so the noise of the transmission signal itself becomes a problem. Therefore, in the filter, it is necessary to increase the noise attenuation. On the other hand, during reception, the strength of the received signal is lower than that of the transmission signal, so it is not necessary to increase the attenuation. Therefore, it is preferable to make the attenuation of the filter different in transmission and reception.

[0007] However, in the high-frequency front-end circuit described in Patent Document 1, since the transmission signal and the reception signal are in the same frequency band, the same filter is used for transmission and reception. Therefore, for reception, there is a problem of loss degradation caused by attenuation more than necessary to cope with transmission. On the other hand, for transmission, since it is necessary to consider matching with the receiving low noise amplifier (Low Noise Amplifier: LNA), there is a problem that it cannot be a low impedance suitable for matching with the transmitting power amplifier (Power Amplifier: PA).

[0008] In order to solve the above problem, it is considered to separate the transmission filter and the reception filter. In other words, it is considered to separate the transmission path and the reception path. In this case, the connection destination of the antenna is switched between the transmission path and the reception path by a switch.

[0009] Here, for example, when the above-mentioned signals (transmitting signal, receiving signal) communicate with signals of other frequency bands at the same time, the switch needs to keep the signal path of the signals of other frequency bands in a connected state at all times, and switch the transmission path of the above-mentioned transmitting signal and the reception path of the above-mentioned receiving signal. At this time, the phase of the signals of other frequency bands changes when the transmitting signal is sent and when the receiving signal is received. That is, the phase of the signals of other frequency bands when the transmitting signal is sent is different from the phase of the signals of other frequency bands when the receiving signal is received. Therefore, at the switching timing of the sending of the transmitting signal and the receiving of the receiving signal, the EVM (Error Vector Magnitude) may deteriorate in the communication of other frequency bands, resulting in degradation of communication quality. Summary of the invention

[0010] The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a high-frequency front end circuit and a communication device capable of suppressing degradation of communication quality when performing simultaneous communications using a plurality of frequency bands.

[0011] A high frequency front end circuit of one embodiment of the present invention comprises: an antenna terminal, an input terminal, an output terminal, a communication terminal, a transmission filter, a reception filter, a transmission filter, a switch, and a phase adjustment circuit. The transmission filter allows a first transmission signal transmitted through the antenna terminal by TDD to pass through. The reception filter allows a first reception signal received through the antenna terminal by TDD to pass through. The transmission filter allows a second transmission signal or a second reception signal, i.e., a communication signal, transmitted through the antenna terminal by FDD to pass through. The switch can be connected to the antenna terminal, the transmission filter, or the reception filter and the transmission filter at the same time. The phase adjustment circuit is a circuit for adjusting the phase. The switch has: a common terminal, which can be electrically connected to the antenna terminal; a first selection terminal, which can be electrically connected to the transmission filter; a second selection terminal, which can be electrically connected to the reception filter; and a third selection terminal, which can be electrically connected to the transmission filter. The transmission filter is provided in a transmission path. The transmission path is a path connecting the input terminal and the first selection terminal and is a path for transmitting the first transmission signal. The reception filter is provided in a reception path. The receiving path is a path connecting the output terminal and the second selection terminal and is a path for receiving the first reception signal. The transmission filter is provided in the transmission path. The transmission path is a path connecting the communication terminal and the third selection terminal and is a path for transmitting the communication signal. The phase adjustment circuit is provided in at least one of the transmission path, the receiving path and the transmission path.

[0012] A high-frequency front-end circuit of one embodiment of the present invention comprises: an antenna terminal, an input terminal, an output terminal, a communication terminal, a transmission filter, a reception filter, a transmission filter, a switch, and a phase adjustment circuit. The transmission filter allows a first transmission signal transmitted via the antenna terminal based on the 4G standard or the 5G standard, i.e., the first standard, to pass. The reception filter allows a first reception signal received via the antenna terminal based on the first standard to pass. The transmission filter allows a second transmission signal or a second reception signal, i.e., a communication signal, transmitted via the antenna terminal based on the 4G standard or the 5G standard, i.e., the second standard, to pass. The switch can be connected to the antenna terminal, the transmission filter or the reception filter, and the transmission filter at the same time. The phase adjustment circuit is a circuit for adjusting the phase. The switch has: a common terminal, which can be electrically connected to the antenna terminal; a first selection terminal, which can be electrically connected to the transmission filter; a second selection terminal, which can be electrically connected to the reception filter; and a third selection terminal, which can be electrically connected to the transmission filter. The transmission filter is provided in a transmission path. The transmission path is a path connecting the input terminal and the first selection terminal and is a path for transmitting the first transmission signal. The receiving filter is provided in a receiving path. The receiving path is a path connecting the output terminal and the second selection terminal and is a path for receiving the first reception signal. The transmitting filter is provided in a transmitting path. The transmitting path is a path connecting the communication terminal and the third selection terminal and is a path for transmitting the communication signal. The phase adjustment circuit is provided in at least one of the transmitting path, the receiving path and the transmitting path.

[0013] A communication device according to one aspect of the present invention includes the high frequency front end circuit and a signal processing circuit. The signal processing circuit processes the first transmission signal, the first reception signal, and the communication signal.

[0014] According to the high-frequency front end circuit and the communication device of the above-described aspect of the present invention, when performing simultaneous communications using a plurality of frequency bands, it is possible to suppress degradation of communication quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic configuration diagram of a high-frequency front-end circuit according to an embodiment.

[0016] Figure 2 This is a schematic structural diagram of a communication device according to an embodiment.

[0017] Figure 3 A~ Figure 3 D is a circuit diagram of a phase adjustment circuit for the high-frequency front-end circuit as above.

[0018] Figure 4 A~ Figure 4 D is a circuit diagram of a phase adjustment circuit for the high-frequency front-end circuit as above.

[0019] Figure 5 This is a circuit diagram of a phase adjustment circuit used in the same high-frequency front-end circuit.

[0020] Figure 6 A is a graph showing the bit error rate before error correction is applied in the high frequency front end circuit as above when the phase difference is 30°. Figure 6 B is a graph showing the bit error rate after error correction is applied in the high frequency front end circuit as above when the phase difference is 30°.

[0021] Figure 7 A is a graph showing the bit error rate before error correction is applied in the high frequency front end circuit as above when the phase difference is 10°. Figure 7 B is a graph showing the bit error rate after error correction is applied in the high frequency front end circuit as above when the phase difference is 10°.

[0022] Figure 8 A is a graph showing the bit error rate before error correction is applied in the high frequency front end circuit as above when the phase difference is 4°. Figure 8 B is a graph showing the bit error rate after error correction is applied in the high frequency front end circuit as above when the phase difference is 4°.

[0023] Fig. 9 A is a graph showing the bit error rate before error correction is applied in the high frequency front end circuit as above when the phase difference is 1°. Fig. 9 B is a graph showing the bit error rate after error correction is applied in the high frequency front end circuit as above when the phase difference is 1°.

[0024] Fig.10 It is a schematic configuration diagram of a high-frequency front-end circuit according to a second variation of the embodiment.

[0025] Fig.11 It is a schematic configuration diagram of a high-frequency front-end circuit according to a third variation of the embodiment. DETAILED DESCRIPTION

[0026] The high frequency front end circuit and the communication device of the embodiment are described below with reference to the drawings. The drawings referred to in the following embodiments are schematic drawings, and the size and thickness ratios of the components in the drawings do not necessarily reflect the actual dimensional ratios.

[0027] (Implementation Method)

[0028] (1) High-frequency front-end circuit

[0029] Reference Figure 1 The overall structure of the high-frequency front-end circuit 1 according to the embodiment will be described.

[0030] like Figure 1 As shown, the high frequency front end circuit 1 of this embodiment includes an antenna terminal 2, a transmission filter 3, a first reception filter 4 (reception filter), a second reception filter 5 (transmission filter), a switch 6, and a phase adjustment circuit 7. In addition, as an amplifier 11 for amplifying a signal, the high frequency front end circuit 1 includes a power amplifier 12, a first low noise amplifier (LowNoise Amplifier: LNA) 13, and a second low noise amplifier 14. In addition, the high frequency front end circuit 1 includes a reactance circuit 15, an inductor 16, and a capacitor 17. In addition, the high frequency front end circuit 1 includes an input terminal 21, an output terminal 22, and a communication terminal 23.

[0031] In the present embodiment, the high-frequency front-end circuit 1 supports simultaneous use of a TDD (Time Division Duplex) signal and an FDD (Frequency Division Duplex) signal.

[0032] The high-frequency front-end circuit 1 is used in a mobile phone such as a smart phone. In addition, the high-frequency front-end circuit 1 is not limited to a mobile phone, and can also be a wearable terminal such as a smart watch. Figure 2 As shown, the high frequency front end circuit 1 is used in a communication device 8 for communicating with an external device (not shown).

[0033] (2) Components of high-frequency front-end circuits

[0034] Hereinafter, each component of the high-frequency front-end circuit 1 according to the present embodiment will be described with reference to the drawings.

[0035] (2.1) Antenna terminal, input terminal, output terminal and communication terminal

[0036] like Figure 1 As shown, the antenna terminal 2 is electrically connected to the antenna 9 described later. The input terminal 21, the output terminal 22 and the communication terminal 23 are connected to the RF signal processing circuit 82 described later. The input terminal 21 is a terminal for inputting a high-frequency signal (transmission signal) from an external circuit to the high-frequency front-end circuit 1. The output terminal 22 is a terminal for outputting a high-frequency signal (reception signal) from the first low-noise amplifier 13 to the external circuit. The communication terminal 23 is a terminal for outputting a high-frequency signal (reception signal) from the second low-noise amplifier 14 to the external circuit.

[0037] (2.2) Transmit filter

[0038] like Figure 1 As shown, the transmission filter 3 is provided in the transmission path T1 for transmitting the first transmission signal to the antenna 9 via TDD. The transmission path T1 is a path connecting the input terminal 21 and the selection terminal 621 described later and is a path for transmitting the first transmission signal via the antenna terminal 2 via TDD. The transmission filter 3 allows the first transmission signal of the first communication band (first frequency band) to pass. The first communication band is, for example, Band 41 (2496MHz-2690MHz) of the LTE (Long Term Evolution) standard (including the LTE-Advanced standard). The transmission filter 3 allows the first transmission signal transmitted via the antenna terminal 2 via TDD to pass.

[0039] (2.3) First receiving filter

[0040] like Figure 1 As shown, the first receiving filter 4 is provided in a first receiving path R1 (receiving path) for receiving a first receiving signal from the antenna 9 by TDD. The first receiving path R1 is a path connecting the output terminal 22 and the selection terminal 622 described later and is a path for receiving the first receiving signal via the antenna terminal 2 by TDD. The first receiving filter 4 allows the first receiving signal of the first communication band (first frequency band) to pass. The first communication band of the first receiving signal is the same as the first communication band of the first transmitting signal. The first receiving filter 4 allows the first receiving signal received via the antenna terminal 2 by TDD to pass.

[0041] (2.4) Second receive filter

[0042] like Figure 1 As shown, the second receiving filter 5 is provided in a second receiving path R2 (transmission path) for receiving a second receiving signal (communication signal) from the antenna 9 through FDD. The second receiving path R2 is a path connecting the communication terminal 23 and the selection terminal 623 described later and is a path for transmitting the second receiving signal through the antenna terminal 2 through FDD. The second receiving filter 5 allows the second receiving signal of the second communication band (second frequency band) to pass. The second communication band is, for example, Band 3 (receiving frequency band: 1805MHz-1880MHz) of the LTE standard (including the LTE-Advanced standard). The second receiving filter 5 allows the second receiving signal transmitted through the antenna terminal 2 through FDD to pass.

[0043] In addition, the second receiving filter 5 can also be used in the case where the second transmission signal is passed through FDD, that is, the second receiving filter 5 is used to transmit the second transmission path of the second transmission signal of the second communication band via the antenna terminal 2. In this case, the second communication band is, for example, Band 3 (transmission band: 1710MHz-1785MHz) of the LTE standard (including the LTE-Advanced standard). In addition, the second communication band can also replace Band 3 and adopt Band 25 (reception band: 1930MHz-1995MHz) of the LTE standard (including the LTE-Advanced standard).

[0044] (2.5) Switch

[0045] like Figure 1 As shown, the switch 6 has a common terminal 61 and a plurality of (six in the example shown) selection terminals 621 to 626. The switch 6 selects at least one of the plurality of selection terminals 621 to 623 as a connection destination of the common terminal 61. That is, the switch 6 selectively connects the transmission filter 3, the first reception filter 4, and the second reception filter 5 to the antenna 9.

[0046] The common terminal 61 is connected to the antenna terminal 2. That is, the common terminal 61 is electrically connected to the antenna 9 via the antenna terminal 2. In addition, the common terminal 61 is not limited to being directly connected to the antenna 9. A filter or a coupler may be provided between the common terminal 61 and the antenna 9.

[0047] The selection terminal 621 (first selection terminal) is electrically connected to the transmission filter 3. The selection terminal 622 (second selection terminal) is electrically connected to the first reception filter 4. The selection terminal 623 (third selection terminal) is electrically connected to the second reception filter 5. The selection terminal 624 is electrically connected to the reactance circuit 15. The selection terminal 625 is electrically connected to the inductor 16. The selection terminal 626 is electrically connected to the capacitor 17.

[0048] The switch 6 switches the connection destination of the antenna 9 to either the transmission filter 3 or the first reception filter 4 while the second reception filter 5 is electrically connected to the antenna 9. In other words, the switch 6 switches the connection destination of the antenna terminal 2 to either the transmission filter 3 or the first reception filter 4 while the second reception filter 5 is electrically connected to the antenna terminal 2. In other words, the switch 6 is a switch that can be connected to the antenna terminal 2 and the transmission filter 3 or the first reception filter 4 and the second reception filter 5 at the same time.

[0049] When only TDD signal communication is performed, the switch 6 switches the transmission filter 3 and the first reception filter 4 to be electrically connected to the antenna 9. Specifically, when only TDD signal communication is performed, the switch 6 connects the selection terminal 621 and the selection terminal 622 to the common terminal 61.

[0050] When only FDD signal communication is performed, the switch 6 electrically connects the second reception filter 5 to the antenna 9. Specifically, when only FDD signal communication is performed, the switch 6 connects the selection terminal 623 to the common terminal 61.

[0051] In the case of carrier aggregation in which a TDD signal and an FDD signal are communicated simultaneously, the switch 6 always connects the second receiving filter 5 to the antenna 9. Moreover, the switch 6 alternately switches the transmission filter 3 and the first receiving filter 4 according to time and electrically connects them to the antenna 9. Specifically, in the case of carrier aggregation, the switch 6 alternately switches the selection terminal 621 and the selection terminal 622 to connect them to the common terminal 61 while always connecting the selection terminal 623 to the common terminal 61. The switch 6 electrically connects the transmission filter 3 to the antenna 9 in the transmission time period, and electrically connects the first receiving filter 4 to the antenna 9 in the reception time period. As time passes, the transmission time period and the reception time period are alternately allocated. Here, carrier aggregation refers to communication using radio waves of multiple frequency bands at the same time.

[0052] (2.6) Phase adjustment circuit

[0053] like Figure 1 As shown, the phase adjustment circuit 7 is disposed in at least one of the transmission path T1 , the first reception path R1 and the second reception path R2 .

[0054] Next, refer to Figure 1 The position of the phase adjustment circuit 7 on the circuit will be described.

[0055] As a first example, the phase adjustment circuit 7 is provided between at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 and the switch 6. In the first example, the phase adjustment circuit 7 and the switch 6 constitute the switch module 18. That is, the phase adjustment circuit 7 and the switch 6 are integrally formed. Specifically, the phase adjustment circuit 7 is located Figure 1 At least one position of the plurality of (three in the illustrated example) positions P11 to P13 shown.

[0056] In the first example, the phase adjustment circuit 7 and the switch 6 constitute the switch module 18. This can achieve a smaller size than when the phase adjustment circuit 7 and the switch 6 are separate bodies.

[0057] Next, as a second example, the phase adjustment circuit 7 can also be provided between at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 and the switch 6. In the second example, the phase adjustment circuit 7 is separate from the switch 6. Specifically, the phase adjustment circuit 7 is located Figure 1 At least one position among the plurality of (three in the illustrated example) positions P21 to P23 shown.

[0058] In the second example, the phase adjustment circuit 7 is separate from the switch 6. Thus, a circuit having a large reactance can be easily formed as the phase adjustment circuit 7.

[0059] As a third example, the phase adjustment circuit 7 may also be provided between at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 and the amplifier 11. Specifically, the phase adjustment circuit 7 is located Figure 1 At least one position among the plurality of (three in the illustrated example) positions P31 to P33 shown.

[0060] In the third example, a phase adjustment circuit 7 is provided between at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 and the amplifier 11. Thus, each of the transmission path T1, the first reception path R1, and the second reception path R2 can be optimized, thereby improving the insertion loss in the other paths.

[0061] As a fourth example, the phase adjustment circuit 7 is provided on the opposite side of at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 with respect to the amplifier 11 in at least one of the transmission path T1, the first reception path R1, and the second reception path R2. That is, the phase adjustment circuit 7 is provided between the filter (the transmission filter 3, the first reception filter 4, and the second reception filter 5) and the RF signal processing circuit 82 (see Figure 2 Specifically, the phase adjustment circuit 7 is located between Figure 1 At least one position of the plurality of (three in the illustrated example) positions P41 to P43 shown.

[0062] In the fourth example, in at least one of the transmission path T1, the first reception path R1, and the second reception path R2, a phase adjustment circuit 7 is provided on the opposite side of at least one of the transmission filter 3, the first reception filter 4, and the second reception filter 5 with respect to the amplifier 11. Thus, the noise figure (Noise Figure: NF) can be improved.

[0063] In addition, Figure 1In the example of , the phase adjustment circuit 7 is located at the position P11, but the present invention is not limited to this position. In particular, it is preferable that the phase adjustment circuit 7 is located at any one of the positions P11 to P13 and P43.

[0064] The high frequency front end circuit 1 may include two or more phase adjustment circuits 7. In this case, the two or more phase adjustment circuits 7 are located at two or more positions among the plurality of positions P11 to P13, P21 to P23, P31 to P33, and P41 to P43.

[0065] In addition, when the transmission characteristics of the transmission signal passing through the transmission path T1 are emphasized, the phase adjustment circuit 7 is preferably provided in at least one of the first reception path R1 and the second reception path R2. That is, the phase adjustment circuit 7 is preferably located at at least one of the positions P12, P13, P22, P23, P32, P33, P42, and P43.

[0066] On the other hand, when the reception characteristics of the first reception signal passing through the first reception path R1 are emphasized, the phase adjustment circuit 7 is preferably provided in at least one of the transmission path T1 and the second reception path R2. That is, the phase adjustment circuit 7 is preferably located at at least one of the positions P11, P13, P21, P23, P31, P33, P41, and P43. When the reception characteristics of the second reception signal passing through the second reception path R2 are emphasized, the phase adjustment circuit 7 is preferably provided in at least one of the transmission path T1 and the first reception path R1. That is, the phase adjustment circuit 7 is preferably located at at least one of the positions P11, P12, P21, P22, P31, P32, P41, and P42.

[0067] Next, refer to Figure 3 A~ Figure 3 D. Figure 4 A~ Figure 4 D and Figure 5 The circuit configuration of the phase adjustment circuit 7 will be described.

[0068] like Figure 3 A~ Figure 3 D. Figure 4 A~ Figure 4 D and Figure 5 As shown, the phase adjustment circuit 7 includes a first reactance element 71 and a second reactance element 72. The first reactance element 71 is inserted in series into the path. The second reactance element 72 is provided between a first end of the first reactance element 71 and the ground.

[0069] Figure 3 A~ Figure 3The phase adjustment circuit 7 shown in D includes a first reactance element 71, a second reactance element 72, and a third reactance element 73. The third reactance element 73 is provided between the second end of the first reactance element 71 and the ground. That is, Figure 3 A~ Figure 3 The phase adjustment circuit 7 shown in D is a π-type circuit. Figure 3 In the phase adjustment circuit 7 shown in FIG. 1A , a capacitor C11 is included as a first reactance element 71, an inductor L21 is included as a second reactance element 72, and an inductor L31 is included as a third reactance element 73. Figure 3 In the phase adjustment circuit 7 shown in FIG. 1B , a capacitor C12 is included as a first reactance element 71, an inductor L22 is included as a second reactance element 72, and a capacitor C32 is included as a third reactance element 73. Figure 3 In the phase adjustment circuit 7 shown in FIG. 1 , the first reactance element 71 includes an inductor L13, the second reactance element 72 includes a capacitor C23, and the third reactance element 73 includes a capacitor C33. Figure 3 In the phase adjustment circuit 7 shown in FIG. 1 , the first reactance element 71 includes an inductor L18 , the second reactance element 72 includes an inductor L28 , and the third reactance element 73 includes a capacitor C38 .

[0070] Figure 4 A~ Figure 4 The phase adjustment circuit 7 shown in D includes a first reactance element 71 and a second reactance element 72. Figure 4 In the phase adjustment circuit 7 shown in A of FIG. 1 , a capacitor C14 is included as a first reactance element 71, and a capacitor C24 is included as a second reactance element 72. Figure 4 In the phase adjustment circuit 7 shown in FIG. 1B , a capacitor C15 is included as a first reactance element 71, and an inductor L25 is included as a second reactance element 72. Figure 4 In the phase adjustment circuit 7 shown in FIG. 1 , the first reactance element 71 includes an inductor L16, and the second reactance element 72 includes a capacitor C26. Figure 4 In the phase adjustment circuit 7 shown in FIG. 1 , the inductor L17 is included as the first reactance element 71 , and the inductor L27 is included as the second reactance element 72 .

[0071] In addition, if Figure 5As shown, the phase adjustment circuit 7 may further include a switching unit 75, which switches between a path passing through the reactance circuit 74 and a path not passing through the reactance circuit 74. The reactance circuit 74 is composed of at least one of the first reactance element 71, the second reactance element 72, and the third reactance element 73. In other words, the reactance circuit 74 may also be composed of any one of the first reactance element 71, the second reactance element 72, and the third reactance element 73. Alternatively, the reactance circuit 74 may also be composed of any two of the first reactance element 71, the second reactance element 72, and the third reactance element 73. Alternatively, the reactance circuit 74 may also be composed of the first reactance element 71, the second reactance element 72, and the third reactance element 73. Even in the reactance circuit 74, each of the first reactance element 71, the second reactance element 72, and the third reactance element 73 is a capacitor or an inductor.

[0072] Furthermore, the reactance of each of the first reactance element 71 , the second reactance element 72 , and the third reactance element 73 may also be variable.

[0073] In addition, when the phase adjustment circuit 7 is provided in the switch module 18 as in the first example, it is preferable that the phase adjustment circuit 7 is composed of a capacitor rather than a combination of a capacitor and an inductor. Figure 1 In the case of the positions P11 to P13 shown, it is preferable to form a capacitor.

[0074] Furthermore, when the phase adjustment circuit 7 is separated from the switch 6 as in the second example, it is preferable that the phase adjustment circuit 7 is composed of a combination of a capacitor and an inductor rather than a case where the phase adjustment circuit 7 is composed of a capacitor. Figure 1 In the case of the positions P21 to P23 shown, it is preferable to form a combination of a capacitor and an inductor. This can increase the degree of freedom in designing the reactance in the phase adjustment circuit 7.

[0075] In addition, as in the fourth example, the phase adjustment circuit 7 is provided between the filter (transmission filter 3, first reception filter 4, second reception filter 5) and the RF signal processing circuit 82 (see Figure 2 ), the phase adjustment circuit 7 may be separated from the filter. That is, the phase adjustment circuit 7 may not constitute a module with the filter.

[0076] Furthermore, when the phase adjustment circuit 7 is provided in the second reception path R2 which is the reception path of FDD, it is preferable that the phase adjustment circuit 7 includes a variable reactance circuit capable of changing reactance.

[0077] In addition, the phase adjustment circuit 7 may be configured to include only one reactance element. For example, the phase adjustment circuit 7 may be configured to include only a variable capacitor inserted in series in the path. In this case, a desired phase can be obtained by adjusting the capacitance of the variable capacitor.

[0078] The phase adjustment circuit 7 may be a part of the transmission line. In this case, a desired phase can be obtained by setting the length and pattern of the transmission line that becomes the phase adjustment circuit 7.

[0079] (3) Operation of high-frequency front-end circuit

[0080] Below, refer to Figure 1 The operation of the high-frequency front-end circuit 1 according to the present embodiment will be described.

[0081] First, the case where only TDD signal communication is performed is described. In this case, the switch 6 selects the selection terminal 621 and the selection terminal 622 as the connection destination of the common terminal 61. That is, the transmission filter 3 and the first reception filter 4 are electrically connected to the antenna 9. The high-frequency front-end circuit 1 outputs the transmission signal to the antenna 9 via the phase adjustment circuit 7 and the switch 6, or via the switch 6. Moreover, the transmission signal is radiated from the antenna 9 as a wireless signal. On the other hand, the reception signal received by the antenna 9 is input to the first reception filter 4 via the switch 6 and the phase adjustment circuit 7, or via the switch 6.

[0082] Next, the case where only FDD signal communication is performed is described. In this case, the switch 6 selects the selection terminal 623 as the connection destination of the common terminal 61. That is, the second reception filter 5 is electrically connected to the antenna 9. The reception signal received by the antenna 9 is input to the second reception filter 5 via the switch 6 and the phase adjustment circuit 7, or via the switch 6.

[0083] Next, the case of carrier aggregation in which a TDD signal and an FDD signal are communicated simultaneously is described. In this case, the switch 6 selects the selection terminal 623 and the selection terminal 621 or the selection terminal 622 as the connection destination of the common terminal 61. In a state where the second reception filter 5 and the antenna 9 are always connected, the transmission filter 3 and the first reception filter 4 are alternately connected.

[0084] The FDD reception signal received by the antenna 9 is transmitted to the RF signal processing circuit 82 (see FIG. 1 ) described later via the second reception filter 5 and the phase adjustment circuit 7 in the FDD reception path, i.e., the second reception path R2. Figure 2) output. The TDD transmission signal is output to the antenna 9 via the transmission filter 3 and the phase adjustment circuit 7 or via the transmission filter 3 in the TDD transmission path, that is, the transmission path T1. The TDD reception signal is output to the RF signal processing circuit 82 via the first reception filter 4 and the phase adjustment circuit 7 or via the first reception filter 4 in the TDD reception path, that is, the first reception path R1.

[0085] (4) Relationship between phase difference and characteristics

[0086] Next, the relationship between the phase difference and the bit error rate in the high frequency front end circuit 1 of the present embodiment will be described with reference to the accompanying drawings. Here, the phase difference refers to the phase difference between the FDD reception signal when the transmission path T1 and the second reception path R2 are connected simultaneously and the FDD reception signal when the first reception path R1 and the second reception path R2 are connected simultaneously.

[0087] Since the phase difference is preferably smaller, as described above, the high frequency front end circuit 1 uses the phase adjustment circuit 7 to adjust the phase so that the phase difference becomes smaller. Here, the bit error rate when the phase difference is 30°, 10°, 4°, and 1° is described.

[0088] First, when the phase difference is 30°, Figure 6 As shown in A, the bit error rate before applying error correction is above 0.1. Figure 6 As shown in B, the bit error rate after applying error correction is also above 0.03.

[0089] On the other hand, when the phase difference is 10°, Figure 7 As shown in A of FIG. 1 , the bit error rate before applying error correction is smaller than that in the case where the phase difference is 30°, but it is not sufficiently smaller. Figure 7 As shown in B, unlike the case where the phase difference is 30°, the bit error rate after applying the error correction is sufficiently small.

[0090] When the phase difference is 4°, Figure 8 As shown in A, the bit error rate before applying error correction becomes smaller than when the phase difference is 10°. Figure 8 As shown in B, similarly to the case where the phase difference is 10°, the bit error rate after applying the error correction is sufficiently small.

[0091] When the phase difference is 1°, Fig. 9 As shown in A of FIG. 1 , the bit error rate before applying error correction is sufficiently small. Therefore, Fig. 9 As shown in B, the bit error rate after applying error correction is also sufficiently small.

[0092] Since error correction is applied in actual use, even if the bit error rate before the error correction is applied is large, the bit error rate after the error correction is applied only needs to be sufficiently small.

[0093] In summary, when the phase difference is 10° or less, the bit error rate after error correction is applied becomes small, and good characteristics can be obtained.

[0094] (5)Communication device

[0095] like Figure 2 As shown, the communication device 8 includes a high frequency front end circuit 1, a baseband signal processing circuit 81, and an RF signal processing circuit 82. The baseband signal processing circuit 81 and the RF signal processing circuit 82 constitute a signal processing circuit for processing a transmission signal, a first reception signal, and a second reception signal.

[0096] (5.1) Baseband signal processing circuit

[0097] like Figure 2 As shown, the baseband signal processing circuit 81 is, for example, a BBIC (Baseband Integrated Circuit), and is electrically connected to the RF signal processing circuit 82. The baseband signal processing circuit 81 generates an I-phase signal and a Q-phase signal based on the baseband signal. The baseband signal processing circuit 81 performs IQ modulation processing by synthesizing the I-phase signal and the Q-phase signal, and outputs a transmission signal. At this time, the transmission signal is generated as a modulated signal that amplitude modulates a carrier wave signal of a predetermined frequency with a period longer than the period of the carrier wave signal.

[0098] (5.2) RF signal processing circuit

[0099] like Figure 2 As shown, the RF signal processing circuit 82 is, for example, an RFIC (Radio Frequency Integrated Circuit), and is disposed between the high-frequency front-end circuit 1 and the baseband signal processing circuit 81. The RF signal processing circuit 82 has a function of performing signal processing on a transmission signal from the baseband signal processing circuit 81, and a function of performing signal processing on a reception signal received by the antenna 9. The RF signal processing circuit 82 is a processing circuit corresponding to multiple frequency bands, and can generate and amplify transmission signals of multiple communication bands.

[0100] (6) Effect

[0101] In the high frequency front end circuit 1 of the present embodiment, when performing simultaneous communication using a plurality of frequency bands, that is, when performing TDD transmission by adopting communication using carrier aggregation of TDD signals and FDD signals, a phase adjustment circuit 7 is provided in at least one of the transmission path T1, the first reception path R1, and the second reception path R2. Thus, in communication using carrier aggregation of TDD signals and FDD signals, it is possible to suppress degradation of communication quality in FDD-based reception.

[0102] (7) Modification

[0103] Hereinafter, modified examples of the present embodiment will be described.

[0104] (7.1) Modification 1

[0105] The high-frequency front-end circuit 1 of this embodiment corresponds to the simultaneous use of TDD signals and FDD signals, but as a variation 1 of this embodiment, the high-frequency front-end circuit 1 can also correspond to the simultaneous use of 4G standard signals and 5G standard signals (dual connectivity).

[0106] The 4G standard system and the 5G standard system are independent systems. Therefore, in the case of dual connectivity of communication based on the 4G standard and communication based on the 5G standard, the transmit and receive timing of the TDD of the 4G standard and the transmit and receive timing of the TDD of the 5G standard may be asynchronous with each other. That is, the transmit and receive timing of the TDD of the 4G standard and the transmit and receive timing of the TDD of the 5G standard may be different from each other. Therefore, in the communication based on one of the 4G standard and the 5G standard, that is, the first standard, if the transmission and reception are switched, the phase may change in the reception based on the other of the 4G standard and the 5G standard, that is, the second standard.

[0107] The high frequency front end circuit 1 of this modification example includes an antenna terminal 2 , a transmission filter 3 , a first reception filter 4 , a second reception filter 5 , a switch 6 , and a phase adjustment circuit 7 , similarly to the high frequency front end circuit 1 of this embodiment.

[0108] In this variation, the transmission filter 3 is provided in a transmission path for transmitting a transmission signal based on the first standard, which is one of the 4G standard and the 5G standard, to the antenna 9, and allows the transmission signal to pass. The first reception filter 4 is provided in a first reception path for receiving a first reception signal based on the first standard from the antenna 9, and allows the first reception signal to pass. The second reception filter 5 is provided in a second reception path for receiving a second reception signal based on the second standard, which is the other of the 4G standard and the 5G standard, from the antenna 9, and allows the second reception signal to pass.

[0109] Here, it is preferred that the first standard is the 5G standard and the second standard is the 4G standard. In this case, Figure 1 The transmission path T1 shown is a path for sending a transmission signal based on the 5G standard to the antenna 9. Figure 1 The first receiving path R1 shown is a path for receiving a first receiving signal based on the 5G standard from the antenna 9 . Figure 1 The second reception path R2 shown is a path for receiving a second reception signal based on the 4G standard from the antenna 9 .

[0110] In this modification, the transmission filter 3 allows a transmission signal based on the 5G standard to pass through, the first reception filter 4 allows a first reception signal based on the 5G standard to pass through, and the second reception filter 5 allows a second reception signal based on the 5G standard to pass through.

[0111] In this modification, similarly to the present embodiment, the switch 6 switches the connection destination of the antenna 9 to either the transmission filter 3 or the first reception filter 4 while the second reception filter 5 and the antenna 9 are electrically connected.

[0112] In this modification, similarly to the present embodiment, the phase adjustment circuit 7 is provided in at least one of the transmission path T1 , the first reception path R1 , and the second reception path R2 .

[0113] In the high frequency front end circuit 1 of the present modification, when simultaneous communication using a plurality of frequency bands is performed, that is, when communication based on the simultaneous use of the first standard and the second standard is performed, at least one of the transmission path T1 of the first standard, the first reception path R1 of the first standard, and the second reception path R2 of the second standard is provided with a phase adjustment circuit 7. Thus, in the communication based on the simultaneous use of the first standard and the second standard, it is possible to suppress the degradation of the communication quality in the reception based on the second standard.

[0114] In addition, in the high-frequency front-end circuit 1 of this variant, the first standard is the 5G standard, and the second standard is the 4G standard. Compared with the 4G standard, the requirements of the 5G standard are strict, so in the 5G standard, different filters are used in transmission and reception. Thus, in the communication based on the dual connectivity of the 4G standard and the 5G standard, the communication quality of transmission and reception based on the 5G standard can be improved, and the degradation of the communication quality in reception based on the 4G standard can be suppressed.

[0115] In addition, the high-frequency front-end circuit 1 of this variation is not limited to the case where the first standard is the 5G standard and the second standard is the 4G standard. The first standard may be the 4G standard and the second standard may be the 5G standard. Alternatively, both the first standard and the second standard may be the 4G standard, and both the first standard and the second standard may be the 5G standard.

[0116] In the case where both the first standard and the second standard are 5G standards, for example, the first communication band is n41 (2496MHz-2690MHz) in the 5G standard, and the second communication band is n40 (2300MHz-2400MHz) in the 5G standard. Thus, in the communication of the 5G standard using two TDD-based communications at the same time, the degradation of communication quality can be suppressed. In addition, the first communication band may be n41 in the 5G standard, and the second communication band may be n1 (transmission band: 1920MHz-1980MHz, reception band: 2110MHz-2170MHz), n3 (transmission band: 1710MHz-1785MHz, reception band: 1805MHz-1880MHz), or n75 (reception band: 1432MHz-1517MHz) in the 5G standard. Thus, in the communication of the 5G standard using TDD-based communication and FDD-based communication at the same time, the degradation of communication quality can be suppressed. In addition, n1, n3 and n75 used for simultaneous communication with n41 in the 5G standard are an example, and the frequency band used for simultaneous communication with n41 in the 5G standard may also be a frequency band different from the above-mentioned frequency bands (n1, n3, n75).

[0117] In addition, the second received signal may also be transmitted by TDD that is not synchronized with the first transmitted signal and the first received signal. That is, the first transmitted signal and the first received signal may also be transmitted by TDD, and the second received signal may also be transmitted by TDD. In the case where both the first standard and the second standard are 4G standards, for example, the first communication band may be Band 41 and the second communication band may be Band 40 (2300MHz-2400MHz). Thus, in communications using two TDD-based communications at the same time, degradation of communication quality can be suppressed.

[0118] (7.2) Modification 2

[0119] In addition, as a second variation of this embodiment, Fig.10 As shown, the high frequency front end circuit 1 has a plurality of (two in the example shown) second reception filters 5, 5a as transmission filters. For example, in the case of FDD, FDD may be provided with not only one band but also multiple bands. In this case, by providing the phase adjustment circuit 7 at the position P43 and the position P44, the phase can be adjusted separately.

[0120] (7.3) Modification 3

[0121] As a third variation of this embodiment, Fig.11 As shown, the high frequency front end circuit 1 includes a plurality of (two in the example shown) switches 6a, 6b, in place of the switch 6 (see Figure 1 ).

[0122] like Fig.11 As shown, the switch 6a has a common terminal 63 and a plurality of (three in the example shown) selection terminals 641 to 643. The switch 6a selects at least one of the plurality of selection terminals 641 to 643 as a connection destination of the common terminal 63. That is, the switch 6a selectively connects the transmission filter 3, the first reception filter 4, and the second reception filter 5 to the common terminal 63.

[0123] The common terminal 63 is connected to the switch 6b via the filter 67. That is, the common terminal 63 is electrically connected to the antenna 9 via the switch 6b.

[0124] The selection terminal 641 (first selection terminal) is electrically connected to the transmission filter 3 . The selection terminal 642 (second selection terminal) is electrically connected to the first reception filter 4 . The selection terminal 643 (third selection terminal) is electrically connected to the second reception filter 5 .

[0125] The switch 6a switches the connection destination of the common terminal 63 to either the transmission filter 3 or the first reception filter 4 while the second reception filter 5 is electrically connected to the common terminal 63. In other words, the switch 6a switches the connection destination of the antenna terminal 2 to either the transmission filter 3 or the first reception filter 4 while the second reception filter 5 is electrically connected to the antenna terminal 2.

[0126] like Fig.11 As shown, the switch 6 b includes a common terminal 65 and a plurality of (six in the example shown) selection terminals 661 to 666. The switch 6 b selects at least one of the plurality of selection terminals 661 to 663 as a connection destination of the common terminal 65.

[0127] The common terminal 65 is connected to the antenna terminal 2. That is, the common terminal 65 is electrically connected to the antenna 9 via the antenna terminal 2. In addition, the common terminal 65 is not limited to being directly connected to the antenna 9.

[0128] The selection terminal 661 is electrically connected to the filter 67. The selection terminal 661 is electrically connected to the common terminal 63 of the switch 6a via the filter 67. The selection terminals 662 and 663 are electrically connected to other filters (not shown). The selection terminal 664 is electrically connected to the reactance circuit 15. The selection terminal 665 is electrically connected to the inductor 16. The selection terminal 666 is electrically connected to the capacitor 17.

[0129] (7.4) Other variations

[0130] As a modification of the present embodiment, the phase adjustment circuit 7 may be integrated with the RF signal processing circuit 82. That is, the RF signal processing circuit 82 may be formed of a single chip integrated with the phase adjustment circuit 7.

[0131] The high-frequency front-end circuit 1 and the communication device 8 of each of the above-described modifications also achieve the same effects as those of the high-frequency front-end circuit 1 and the communication device 8 of the present embodiment.

[0132] The embodiments and modifications described above are only a part of various embodiments and modifications of the present invention. In addition, the embodiments and modifications can be variously modified according to design and the like as long as the purpose of the present invention can be achieved.

[0133] (Way)

[0134] Based on the above-described embodiment and modified examples, the following aspects are disclosed.

[0135] A high frequency front end circuit (1) of the first embodiment comprises: an antenna terminal (2), an input terminal (21), an output terminal (22), a communication terminal (23), a transmission filter (3), a reception filter (a first reception filter 4), a transmission filter (a second reception filter 5), a switch (6; 6a), and a phase adjustment circuit (7). The transmission filter (3) allows a first transmission signal transmitted via the antenna terminal (2) by TDD to pass. The reception filter allows a first reception signal received via the antenna terminal (2) by TDD to pass. The transmission filter allows a second transmission signal or a second reception signal, i.e., a communication signal, transmitted via the antenna terminal (2) by FDD to pass. The switch (6; 6a) can be connected to the antenna terminal (2), the transmission filter (3), or the reception filter and the transmission filter at the same time. The phase adjustment circuit (7) is a circuit for adjusting the phase. The switch (6; 6a) has: a common terminal (61; 63) that can be electrically connected to the antenna terminal (2); a first selection terminal (selection terminal 621; 641) that can be electrically connected to the transmission filter (3); a second selection terminal (selection terminal 622; 642) that can be electrically connected to the reception filter; and a third selection terminal (selection terminal 623; 643) that can be electrically connected to the transmission filter. The transmission filter (3) is provided in the transmission path (T1). The transmission path (T1) is a path that connects the input terminal (21) and the first selection terminal and is a path for transmitting a first transmission signal. The reception filter is provided in the reception path (first reception path R1). The reception path is a path that connects the output terminal (22) and the second selection terminal and is a path for receiving a first reception signal. The transmission filter is provided in the transmission path (second reception path R2). The transmission path is a path that connects the communication terminal (23) and the third selection terminal and is a path for transmitting the above-mentioned communication signal. The phase adjustment circuit (7) is arranged in at least one of the transmission path (T1), the reception path and the transmission and reception path.

[0136] According to the high frequency front end circuit (1) of the first aspect, when performing simultaneous communications using a plurality of frequency bands, that is, when performing communications using carrier aggregation of TDD signals and FDD signals, it is possible to suppress degradation of communication quality in FDD reception.

[0137] In the high frequency front end circuit (1) of the second aspect, according to the first aspect, the first transmission signal and the first reception signal are signals of a first communication band, and the communication signal is a signal of a second communication band different from the first communication band.

[0138] In the third embodiment of the high frequency front end circuit (1), according to the second embodiment, the first communication band is a communication band of the 4G standard or the 5G standard. The second communication band is a communication band different from the first communication band and is a communication band of the 4G standard or the 5G standard.

[0139] In the high frequency front end circuit (1) of the fourth aspect, according to the third aspect, the first communication band is Band 41 and the second communication band is Band 3.

[0140] A fifth embodiment of the high frequency front end circuit (1) comprises: an antenna terminal (2), an input terminal (21), an output terminal (22), a communication terminal (23), a transmission filter (3), a reception filter (first reception filter 4), a transmission filter (second reception filter 5), a switch (6; 6a) and a phase adjustment circuit (7). The transmission filter (3) allows a first transmission signal transmitted via the antenna terminal (2) based on the 4G standard or the 5G standard, i.e., the first standard, to pass. The reception filter allows a first reception signal received via the antenna terminal (2) based on the first standard to pass. The transmission filter allows a second transmission signal or a second reception signal, i.e., a communication signal (second reception signal), transmitted via the antenna terminal (2) based on the 4G standard or the 5G standard, i.e., the second standard, to pass. The switch (6; 6a) can be connected to the antenna terminal (2), the transmission filter (3) or the reception filter and the transmission filter at the same time. The phase adjustment circuit (7) is a circuit for adjusting the phase. The switch (6; 6a) has: a common terminal (61; 63) that can be electrically connected to the antenna terminal (2); a first selection terminal (selection terminal 621; 641) that can be electrically connected to the transmission filter (3); a second selection terminal (selection terminal 622; 642) that can be electrically connected to the reception filter; and a third selection terminal (selection terminal 623; 643) that can be electrically connected to the transmission filter. The transmission filter (3) is provided in the transmission path (T1). The transmission path (T1) is a path that connects the input terminal (21) and the first selection terminal and is a path for transmitting a first transmission signal. The reception filter is provided in the reception path (first reception path R1). The reception path is a path that connects the output terminal (22) and the second selection terminal and is a path for receiving a first reception signal. The transmission filter is provided in the transmission path (second reception path R2). The transmission path is a path that connects the communication terminal (23) and the third selection terminal and is a path for transmitting the above-mentioned communication signal. The phase adjustment circuit (7) is arranged in at least one of the transmission path (T1), the reception path and the transmission and reception path.

[0141] According to the high frequency front end circuit (1) of the fifth aspect, when performing simultaneous communications using a plurality of frequency bands, that is, when performing communications based on the simultaneous use of the first standard and the second standard, it is possible to suppress degradation of communication quality in reception based on the second standard.

[0142] In the high frequency front end circuit (1) of the sixth aspect, according to the fifth aspect, the first standard is the 5G standard and the second standard is the 4G standard.

[0143] According to the sixth mode of the high frequency front end circuit (1), in dual connectivity communications based on the 4G standard and the 5G standard, it is possible to improve the communication quality of transmission and reception based on the 5G standard and suppress the degradation of the communication quality in reception based on the 4G standard.

[0144] In the high frequency front end circuit (1) of the seventh aspect, according to the fifth aspect, the first transmission signal and the first reception signal are transmitted by TDD, and the communication signal (the second transmission signal or the second reception signal) is transmitted by TDD asynchronously with the first transmission signal and the first reception signal.

[0145] In the high frequency front end circuit (1) of the eighth aspect, according to any one of the first to seventh aspects, the phase adjustment circuit (7) is provided between at least one of the transmission filter (3), the reception filter (first reception filter 4), and the transmission filter (second reception filter 5) and the switch (6; 6a). The phase adjustment circuit (7) and the switch (6; 6a) constitute a module.

[0146] According to the eighth aspect, the high-frequency front end circuit (1) can be made smaller than when the phase adjustment circuit (7) and the switch (6; 6a) are separate bodies.

[0147] In a high frequency front end circuit (1) of a ninth aspect, according to any one of the first to seventh aspects, a phase adjustment circuit (7) is provided between at least one of a transmission filter (3), a reception filter (first reception filter 4) and a transmission filter (second reception filter 5) and a switch (6; 6a). The phase adjustment circuit (7) is separate from the switch (6; 6a).

[0148] According to the high-frequency front end circuit (1) of the ninth aspect, a circuit having a large reactance can be easily formed as the phase adjustment circuit (7).

[0149] According to any one of the first to seventh aspects, the high frequency front end circuit (1) of the tenth aspect further comprises an amplifier (11). The amplifier (11) amplifies a signal. The phase adjustment circuit (7) is provided between at least one of the transmission filter (3), the reception filter (first reception filter 4) and the transmission filter (second reception filter 5) and the amplifier (11).

[0150] According to the high frequency front end circuit (1) of the tenth aspect, each of the transmission path (T1), the reception path (first reception path R1) and the transmission and reception path (second reception path R2) can be optimized, thereby improving the insertion loss in other paths.

[0151] According to any one of the first to seventh aspects, the high frequency front end circuit (1) of the eleventh aspect further comprises an amplifier (11). The amplifier (11) amplifies a signal. The phase adjustment circuit (7) is provided at least one between the amplifier (11) and the input terminal (21) in the transmission path (T1), between the amplifier (11) and the output terminal (22) in the reception path (first reception path R1), and between the amplifier (11) and the communication terminal (23) in the transmission path (second reception path R2).

[0152] According to the high-frequency front end circuit (1) of the eleventh aspect, the noise figure (Noise Figure: NF) can be improved.

[0153] In the high-frequency front-end circuit (1) of the twelfth embodiment, according to any one of the first to eleventh embodiments, the phase adjustment circuit (7) includes at least one reactance element (first reactance element 71; second reactance element 72) inserted in series into the above-mentioned path or inserted between the above-mentioned path and ground.

[0154] In the high-frequency front-end circuit (1) of the thirteenth aspect, according to the twelfth aspect, the phase adjustment circuit (7) includes a first reactance element (71) and a second reactance element (72) as reactance elements. The first reactance element (71) is inserted in series into the path. The second reactance element (72) is provided between a first end of the first reactance element (71) and ground.

[0155] In the high-frequency front-end circuit (1) of the fourteenth aspect, according to the thirteenth aspect, the first reactance element (71) and the second reactance element (72) are capacitors (C14, C24).

[0156] In the high-frequency front-end circuit (1) of the fifteenth aspect, according to the thirteenth aspect, the first reactance element (71) is a capacitor (C15), and the second reactance element (72) is an inductor (L25).

[0157] In the high-frequency front-end circuit (1) of the sixteenth aspect, according to the thirteenth aspect, the first reactance element (71) is an inductor (L16), and the second reactance element (72) is a capacitor (C26).

[0158] In the high-frequency front end circuit (1) of the seventeenth aspect, according to the thirteenth aspect, the first reactance element (71) and the second reactance element (72) are inductors (L17, L27).

[0159] In the high-frequency front end circuit (1) of the eighteenth aspect, according to the twelfth aspect or the thirteenth aspect, the reactance element is a wiring portion constituting a part of the path.

[0160] In the high-frequency front end circuit (1) of the nineteenth aspect, according to any one of the twelfth to eighteenth aspects, the reactance of the reactance element (the first reactance element 71; the second reactance element 72) is variable.

[0161] In the high-frequency front-end circuit (1) of the twentieth aspect, according to any one of the thirteenth to seventeenth aspects, the phase adjustment circuit (7) further includes a third reactance element (73). The third reactance element (73) is provided between the second end of the first reactance element (71) and the ground.

[0162] In a high-frequency front-end circuit (1) of a twenty-first aspect, according to any one of the thirteenth to seventeenth aspects and the twentieth aspect, the phase adjustment circuit (7) further includes a switching unit (75). The switching unit (75) switches between a path passing through a reactance circuit (74) and a path not passing through the reactance circuit (74), wherein the reactance circuit (74) includes at least one of a first reactance element (71) and a second reactance element (72).

[0163] In the high-frequency front end circuit (1) of the twenty-second aspect, according to any one of the first to twenty-first aspects, the phase adjustment circuit (7) is a circuit for adjusting the phase so that the phase difference is less than 10 degrees.

[0164] The communication device (8) of the twenty-third embodiment comprises: any one of the high-frequency front-end circuits (1) of the first to twenty-second embodiments; and a signal processing circuit (baseband signal processing circuit 81, RF signal processing circuit 82). The signal processing circuit processes the first transmission signal, the first reception signal and the communication signal (second reception signal).

[0165] According to the communication device (8) of the twenty-third mode, by using the high-frequency front-end circuit (1), it is possible to suppress the degradation of communication quality in communications in which a plurality of mutually different communication methods are used simultaneously.

[0166] Description of Reference Numerals

[0167] 1…high frequency front end circuit; 11…amplifier; 12…power amplifier; 13…first low noise amplifier; 14…second low noise amplifier; 15…reactance circuit; 16…inductor; 17…capacitor; 18…switch module; 2…antenna terminal; 21…input terminal; 22…output terminal; 23…communication terminal; 3…transmit filter; 4…first receive filter (receive filter); 5, 5a…second receive filter (transmit filter); 6, 6a…switch; 61, 63…common terminal; 621, 641…selection terminal (first selection terminal); 622, 642…selection terminal (second selection terminal); 623, 643…selection terminal (third selection terminal); 624-626…selection terminal; 65…common terminal; 661-666…selection terminal; 67 …filter; 7…phase adjustment circuit; 71…first reactance element; 72…second reactance element; 73…third reactance element; 74…reactance circuit; 75…switching unit; 8…communication device; 81…baseband signal processing circuit (signal processing circuit); 82…RF signal processing circuit (signal processing circuit); 9…antenna; C11, C12, C14, C15, C23, C24, C26, C32, C33, C38…capacitor; L13, L16, L17, L18, L21, L22, L25, L27, L28, L31…inductor; T1…transmission path; R1…first reception path (reception path); R2…second reception path (transmission path); P11~P13, P21~P23, P31~P34, P41~P44…position.

Claims

1. A high frequency front end circuit, wherein: have: Antenna terminal; A first filter configured to pass a transmission signal in a time division duplex (TDD) frequency band; A second filter configured to pass the received signal in the TDD frequency band; a third filter configured to pass a high frequency signal in a frequency division duplex (FDD) frequency band; a switch for switching the connection between the antenna terminal and the first filter, the connection between the antenna terminal and the second filter, and the connection between the antenna terminal and the third filter, and for simultaneously performing the connection between the antenna terminal and the first filter and the connection between the antenna terminal and the third filter, and for simultaneously performing the connection between the antenna terminal and the second filter and the connection between the antenna terminal and the third filter; as well as A phase adjustment circuit adjusts the difference between the phase of the high-frequency signal passing through the third filter when the antenna terminal is connected to the first filter and the antenna terminal is connected to the third filter at the same time, and the phase of the high-frequency signal passing through the third filter when the antenna terminal is connected to the second filter and the antenna terminal is connected to the third filter at the same time.

2. The high frequency front end circuit according to claim 1, wherein: Also available: Input terminal; output terminals; and communication terminal, The above-mentioned phase adjustment circuit is connected to at least one of the first signal transmission path between the above-mentioned antenna terminal and the above-mentioned input terminal, the second signal transmission path between the above-mentioned antenna terminal and the above-mentioned output terminal, and the third signal transmission path between the above-mentioned antenna terminal and the above-mentioned communication terminal, or is connected between at least one of the above-mentioned first signal transmission path, the above-mentioned second signal transmission path, and the above-mentioned third signal transmission path and the ground wire.

3. The high frequency front end circuit according to claim 2, wherein: The phase adjustment circuit is connected between the first signal transmission path between the switch and the first filter and the ground, or between the second signal transmission path between the switch and the second filter and the ground, or between the third signal transmission path between the switch and the third filter and the ground.

4. The high frequency front end circuit according to claim 3, wherein: The phase adjustment circuit is an inductor.

5. The high frequency front end circuit according to claim 4, wherein: The above-mentioned TDD frequency band is a frequency band different from the above-mentioned FDD frequency band.

6. The high frequency front end circuit according to claim 5, wherein: The above-mentioned TDD frequency band and the above-mentioned FDD frequency band are communication frequency bands of 4G standard or 5G standard.

7. The high frequency front end circuit according to claim 5, wherein: The above TDD frequency band is Band41. The above-mentioned FDD frequency band is Band 3.

8. The high frequency front end circuit according to claim 2, wherein: An amplifier is provided which is connected to the first signal path and between the input terminal and the first filter. The phase adjustment circuit is connected between the first signal transmission path between the amplifier and the first filter and a ground line.

9. The high frequency front end circuit according to claim 2, wherein: An amplifier is provided which is connected to the second signal path and between the output terminal and the second filter. The phase adjustment circuit is connected between the second signal path between the amplifier and the second filter and a ground line.

10. A high frequency front end circuit, wherein: have: Antenna terminal; A transmission filter configured to pass a transmission signal in a TDD frequency band; A receiving filter configured to pass a receiving signal in the TDD frequency band; A filter configured to pass a high frequency signal in an FDD frequency band; a switch for switching the connection between the antenna terminal and the transmission filter, the connection between the antenna terminal and the reception filter, and the connection between the antenna terminal and the filter, and for connecting the antenna terminal to the transmission filter and the filter at the same time, and for connecting the antenna terminal to the reception filter and the filter at the same time; as well as The phase circuit is configured so that the difference between the phase of the high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the transmitting filter and the switch of the filter and the phase of the high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the receiving filter and the switch of the filter is less than 10°.

11. The high frequency front end circuit according to claim 11, wherein: The phase circuit is configured such that the phase difference between a high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the transmitting filter and the switch of the filter and a high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the receiving filter and the switch of the filter is less than 4°.

12. The high frequency front end circuit according to claim 11, wherein: The phase circuit is configured such that the phase difference between a high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the transmitting filter and the switch of the filter and a high-frequency signal in the FDD band that responds to the simultaneous connection of the antenna terminal with the receiving filter and the switch of the filter is less than 1°.

13. The high frequency front end circuit according to claim 10, wherein: Also available: Input terminal; output terminals; and communication terminal, The above-mentioned phase circuit is connected to at least one of the first signal transmission path between the above-mentioned antenna terminal and the above-mentioned input terminal, the second signal transmission path between the above-mentioned antenna terminal and the above-mentioned output terminal, and the third signal transmission path between the above-mentioned antenna terminal and the above-mentioned communication terminal, or is connected between at least one of the above-mentioned first signal transmission path, the above-mentioned second signal transmission path, and the above-mentioned third signal transmission path and the ground wire.

14. The high frequency front end circuit according to claim 13, wherein: The phase circuit is connected between the first signal transmission path between the switch and the transmitting filter and the ground, or between the second signal transmission path between the switch and the receiving filter and the ground, or between the third signal transmission path between the switch and the filter and the ground.

15. The high frequency front end circuit according to claim 14, wherein: The above-mentioned phase circuit is an inductor.

16. The high frequency front end circuit according to claim 15, wherein: The above-mentioned TDD frequency band is a frequency band different from the above-mentioned FDD frequency band.

17. The high frequency front end circuit according to claim 16, wherein: The above-mentioned TDD frequency band and the above-mentioned FDD frequency band are communication frequency bands of 4G standard or 5G standard.

18. The high frequency front end circuit according to claim 16, wherein: The TDD frequency band is Band 41 and the FDD frequency band is Band 3.

Images