Method for improving performance of integrated station and user equipment thereof

Abstract

The invention belongs to the technical field of 5G communication transmission, and provides a method for improving the performance of an integrated station and user equipment thereof, which are used for optimizing GTPU message transmission among an NGC, a CU and a DU. The method comprises the following steps: firstly, defining a shared memory area, dividing the area into a plurality of buffer memory pools with 2048 bytes, and distributing an index number for each buffer; in the communication process, data are not directly transmitted, but index values of the buffers are transmitted. In order to improve the efficiency, a batch processing mechanism is adopted, that is, only when 16 buffers are accumulated, system calling sending is carried out once, or when 16 buffers are not accumulated in a certain time, sending is carried out, so that data timeout is prevented. In the downlink process, after the NGC fills the message, the index is transmitted to the CU through the FIFO, the index is transmitted to the DU after being processed by the CU, and finally the memory is released by the DU. The uplink process starts from the DU, passes through the CU and is finally processed by the NGC, and the memory is released. According to the invention, the system calling frequency is reduced, the data replication overhead is reduced, and the communication efficiency is improved.

Description

Technical Field

[0001] The present application belongs to the field of 5G communication transmission technology, and in particular to a method for improving the performance of an integrated station and its user equipment. Background Art

[0002] In the existing technology, the 5G base station (NR) and the core network (NGC) are deployed together in an integrated station. When the user terminal accesses the 5G base station, the core network is located locally, and both can provide voice services, data transmission, etc. Since the integrated station needs to deploy the base station and the core network at the same time, its resources are usually tight, such as CPU resources, memory resources, memory bandwidth, etc. Tight resources will cause the flow of the entire system to fail to meet the standards, or the flow will fluctuate.

[0003] like Figure 1 As shown in the figure, the specifications supported by NR are system bandwidth 100MHz, 2 cells (2T2R), cell downlink peak rate 750Mbps, and uplink peak rate 375Mbps. NGC needs to support the specifications of the base station accordingly. As can be seen from the figure, the downlink peak rate of 2 cells of the NG-U link between NGC and NR is 1.5Gbps, and the uplink is 750Mbps. The downlink peak rate between F1-U of CU and DU in NR is also 1.5Gbps, and the uplink is 750Mbps.

[0004] According to the implementation of NGC and NR of 3GPP standards, NG-U uses UDP communication, port is 2152, and F1-U also uses UDP communication, using port 2152. When using socket communication, the sender and receiver each need to perform a memory copy, so the total number of memory copies is calculated as follows Figure 2 As shown, DL: 1.5G*4 = 6G, UL: 750M*4 = 3G

[0005] That is, at peak times, 9Gbit of data needs to be copied per second, which is a relatively large overhead for the CPU, memory capacity, and memory bandwidth. Then, socket communication is used between NGC and CU, and between CU and DU. Each message will cause a system call. Even if the length of each message is 1500 bytes, the number of system calls caused is calculated as follows: 9Gbit / 8 / 1500byte=800000 times. Frequent system calls lead to high CPU usage. Summary of the invention

[0006] The present invention aims at the technical problems raised by the background technology and proposes a method for improving the performance of an integrated station and a user equipment thereof.

[0007] In a first aspect, the present application provides a method for improving the performance of an integrated station, including NR and NGC, where NR includes CU, DU and RU, and the specific steps are as follows:

[0008] Step 1: Define shared memory

[0009] NGC, CU and DU define a shared memory area.

[0010] The shared memory is divided into buffer memory pools of the same size. The size of each buffer memory pool is 2048 bytes, which is used to store GTPU messages.

[0011] Assign an index number to each buffer memory pool, ranging from 1 to N;

[0012] Step 2: Using FIFO for Communication

[0013] Communication between NGC, CU and DU is achieved through FIFO;

[0014] The communication payload is the index value of each buffer in the shared memory;

[0015] When a process needs to obtain data, it receives the index value through FIFO and then obtains the data from the shared memory according to the index value;

[0016] Step 3: Batch Mechanism

[0017] When sending data, each buffer memory pool uses a caching mechanism.

[0018] When 16 buffers are accumulated, they are sent to the peer at once to reduce the number of system calls;

[0019] If 16 buffers are not accumulated within a certain period of time, the currently accumulated buffers need to be sent to avoid data packet timeout;

[0020] Step 4: Downstream Process

[0021] NGC applies for a buffer and fills it with GTPU messages.

[0022] NGC passes the buffer index to CU through FIFO.

[0023] CU obtains the buffer from the shared memory according to the index value. After processing, it passes the index value to DU through FIFO. DU obtains the buffer from the shared memory according to the index value. After processing, it releases the buffer back to the memory pool.

[0024] Step 5: Upstream Process

[0025] DU applies for a buffer and fills it with messages.

[0026] DU passes the buffer index to CU through FIFO.

[0027] CU obtains the buffer from the shared memory according to the index value, and after processing, passes the index value to NGC through FIFO. NGC obtains the buffer from the shared memory according to the index value, and releases the buffer back to the memory pool after processing.

[0028] Preferably, in step 4, when downlinking, the NGC applies for a buffer from the shared memory pool, fills the gtpu message, and passes the index of the buffer to the CU through the FIFO. The CU obtains the shared memory buffer according to the index value. After processing, the index value is passed to the DU through the FIFO. The DU obtains the shared memory buffer according to the index value. After processing, the shared memory is released to the memory pool.

[0029] Preferably, in step 5, when going uplink, DU applies for a buffer from the shared memory pool, fills the message, passes the index of the buffer to CU through FIFO, CU obtains the shared memory buffer according to the index value, and after processing, passes the index value to NGC through FIFO, NGC obtains the shared memory buffer according to the index value, and releases the shared memory to the memory pool after processing.

[0030] In a second aspect, the present application further provides a user equipment, comprising the method described in the first aspect.

[0031] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0032] 1) All downlink and uplink gtpu data copies are no longer needed and are optimized, reducing CPU single core by more than 50% and reducing memory bandwidth by 9Gbit. Because of the shared memory pool, the memory capacity is reduced by more than 500Mbyte. 2) Using the batch receiving and sending mechanism, according to actual measurements, an average of 10 messages can be accumulated, system calls are reduced by more than 80%, and CPU single core is increased by more than 30%. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0034] Figure 1 is a block diagram of a device system provided in an embodiment of the present application;

[0035] Figure 2It is a flow chart of the TCP / IP protocol stack provided in the embodiment of the present application;

[0036] Figure 3 This is a flow chart of uplink data transmission provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0038] Glossary:

[0039] NR is a 5G base station.

[0040] NGC is the core network.

[0041] Example 1

[0042] like Figure 1 As shown, the device structure is the specification supported by NR, with a system bandwidth of 100MHz, 2 cells (2T2R), a cell downlink peak rate of 750Mbps, and an uplink peak rate of 375Mbps. NGC needs to support the specifications of the base station accordingly. As can be seen from the figure, the NG-U link between NGC and NR has a downlink peak rate of 1.5Gbps for 2 cells and an uplink rate of 750Mbps. The downlink peak rate between F1-U of CU and DU inside NR is also 1.5Gbps and the uplink rate is 750Mbps.

[0043] According to the implementation of NGC and NR of 3GPP standards, NG-U uses UDP communication, port is 2152, and F1-U also uses UDP communication, using port 2152. When using socket communication, the sender and receiver each need to perform a memory copy, so the total number of memory copies is calculated as follows Figure 2 shown.

[0044] DL: 1.5G*4=6G

[0045] UL:750M*4=3G

[0046] That is to say, at peak times, 9Gbit of data needs to be copied per second, which places a relatively large overhead on the CPU, memory capacity, and memory bandwidth.

[0047] Then, socket communication is adopted between NGC and CU, and between CU and DU. Each message will cause a system call. Even if the length of each message is 1500 bytes, the number of system calls is calculated as follows: 9Gbit / 8 / 1500byte=800000 times. The frequent system calls lead to high CPU usage.

[0048] In this embodiment, the CPU usage, memory capacity, and memory bandwidth are reduced by reducing the number of memory copies and the number of system calls from the data plane.

[0049] Because the CU and DU of NGC and NR are deployed in the same system, it is not necessary to use sockets to implement communication. Instead, a custom communication mechanism can be used. The implementation steps are as follows:

[0050] (1) A shared memory is allocated for both upstream and downstream, which can be accessed by NGC, CU, and DU. The shared memory is divided into buffer memory pools of the same size, each buffer is 2048 bytes in size, ensuring that it can store a gtpu message. Then each buffer is numbered with an index from 1 to N.

[0051] (2) Use named pipe FIFO to implement communication between NGC, CU and DU. The communication payload transmits the index value of each buffer in the shared memory.

[0052] When the other end receives the notification to fetch the packet, it obtains the index value of the shared memory and then goes to the corresponding shared memory to get the data.

[0053] (3) When sending data, a batch mechanism is used. Instead of sending each buffer to the other end, a cache mechanism is used. When 16 packets are accumulated, they are sent to the other end at once. In this way, 16 packets trigger a system call. Of course, if there are no 16 packets within a certain period of time, the currently accumulated packets need to be sent to the other end to prevent the data packet from timing out.

[0054] (4) During downlink, NGC applies for a buffer from the shared memory pool, fills the gtpu message, and passes the buffer index to CU through FIFO. CU obtains the shared memory buffer based on the index value. After processing, it passes the index value to DU through FIFO. DU obtains the shared memory buffer based on the index value. After processing, it releases the shared memory to the memory pool. Figure 3 shown.

[0055] (5) During uplink, the DU applies for a buffer from the shared memory pool, fills it with messages, and passes the buffer index to the CU through the FIFO. The CU obtains the shared memory buffer based on the index value. After processing, the CU passes the index value to the NGC through the FIFO. The NGC obtains the shared memory buffer based on the index value and releases the shared memory to the memory pool after processing.

[0056] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0057] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for improving the performance of an integrated station, characterized in that: The specific steps include: Step 1: Define shared memory NGC, CU and DU define a shared memory area. The shared memory is divided into buffer memory pools of the same size. The size of each buffer memory pool is 2048 bytes, which is used to store GTPU messages. Assign an index number to each buffer memory pool, ranging from 1 to N; Step 2: Using FIFO for Communication Communication between NGC, CU and DU is achieved through named pipe FIFO; The communication payload is the index value of each buffer in the shared memory; When a process needs to obtain data, it receives the index value through FIFO and then obtains the data from the shared memory according to the index value; Step 3: Batch Mechanism When sending data, each buffer memory pool uses a caching mechanism. When 16 buffers are accumulated, they are sent to the peer at once to reduce the number of system calls; If 16 buffers are not accumulated within a certain period of time, the currently accumulated buffers need to be sent to avoid data packet timeout; Step 4: Downstream Process NGC applies for a buffer and fills it with GTPU messages. NGC passes the buffer index to CU through FIFO. CU obtains the buffer from the shared memory according to the index value. After processing, it passes the index value to DU through FIFO. DU obtains the buffer from the shared memory according to the index value. After processing, it releases the buffer back to the memory pool. Step 5: Upstream Process DU applies for a buffer and fills it with messages. DU passes the buffer index to CU through FIFO. CU obtains the buffer from the shared memory according to the index value, and after processing, passes the index value to NGC through FIFO. NGC obtains the buffer from the shared memory according to the index value, and releases the buffer back to the memory pool after processing.

2. The method for improving the performance of an integrated station according to claim 1, characterized in that: In step 4, when downlinking, NGC applies for a buffer from the shared memory pool, fills the gtpu message, and passes the buffer index to CU through FIFO. CU obtains the shared memory buffer according to the index value. After processing, it passes the index value to DU through FIFO. DU obtains the shared memory buffer according to the index value and releases the shared memory to the memory pool after processing.

3. The method for improving the performance of an integrated station according to claim 1, characterized in that: In step 5, when going up, DU applies for a buffer from the shared memory pool, fills the message, passes the buffer index to CU through FIFO, CU obtains the shared memory buffer according to the index value, and after processing, passes the index value to NGC through FIFO. NGC obtains the shared memory buffer according to the index value and releases the shared memory to the memory pool after processing.

4. A user equipment, characterized in that It includes a method for improving the performance of an integrated station as described in claim 1.

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