Low-noise amplifier, radio frequency front-end module and electronic equipment

By connecting the capacitor circuit between the first signal input end of the low noise amplifier and the third end of the amplifier circuit, the problem of noise deterioration caused by low input matching inductance Q value in the prior art is solved, and the low noise performance is improved and Reduced costs.

CN119420292APending Publication Date: 2025-02-11RADROCK (SHENZHEN) SEMICONDUCTOR LTD
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Patent Information

Application Number
CN202411772850.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-04
Publication Date
2025-02-11

AI Technical Summary

Technical Problem

The input matching inductor Q value of existing low noise amplifiers is low, resulting in noise deterioration and cannot meet the needs of low noise.

Method used

By connecting the capacitor circuit between the first signal input terminal of the low noise amplifier and the third terminal of the amplifier circuit, the inductance required for the input matching inductor is reduced to have a high Q value, thereby preventing deterioration of noise.

Benefits of technology

The low noise performance improvement of the low-noise amplifier is achieved to prevent noise deterioration, while reducing the inductance of the input matching inductor and reducing costs.

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Abstract

The embodiment of the invention provides a low-noise amplifier, a radio frequency front-end module and electronic equipment. The low-noise amplifier comprises a first signal input end, a second signal input end, a signal output end, an amplifying circuit and a capacitive circuit, the first end of the amplifying circuit is connected with the first signal input end and the second signal input end, the second end of the amplifying circuit is connected with the signal output end, and the third end of the amplifying circuit is grounded; one end of the capacitor circuit is connected to the first signal input end, and the other end is connected to the third end of the amplification circuit. Compared with the signal input end which is not connected with the capacitance circuit, the capacitance circuit is connected between the first signal input end of the low-noise amplifier and the third end of the amplifying circuit, so that the inductance value required by an input matching inductor of the first signal input end can be reduced; the input matching inductor of the first signal input end can adopt an inductor with a smaller inductance value, so that the input matching inductor has a higher Q value, and noise deterioration can be prevented.
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Description

Technical Field

[0001] The present application relates to the field of radio frequency technology, and in particular to a low noise amplifier, a radio frequency front-end module and an electronic device. Background Art

[0002] Low Noise Amplifier (LNA) is an important component in RF chips such as RF front-end modules. It can be used to receive RF signals transmitted from the antenna and amplify the received RF signals. The input end of the low noise amplifier is correspondingly provided with an input matching inductor to optimize the performance of receiving RF signals in the corresponding frequency band. In the related art, the Q value of the input matching inductor is low, which easily leads to the deterioration of noise and is not conducive to meeting the low noise requirements. Summary of the invention

[0003] The present application provides a low noise amplifier, a radio frequency front-end module and an electronic device, which can improve the low noise performance of the low noise amplifier.

[0004] In a first aspect, an embodiment of the present application provides a low noise amplifier, the low noise amplifier comprising a first signal input terminal, a second signal input terminal, a signal output terminal and:

[0005] an amplifier circuit, wherein a first end of the amplifier circuit is respectively connected to the first signal input end and the second signal input end, a second end of the amplifier circuit is connected to the signal output end, and a third end of the amplifier circuit is used for grounding;

[0006] A capacitor circuit has one end connected to the first signal input end and the other end connected to the third end of the amplifier circuit.

[0007] In a second aspect, an embodiment of the present application provides a radio frequency front-end module, wherein the radio frequency front-end module includes the aforementioned low noise amplifier.

[0008] In a third aspect, an embodiment of the present application provides an electronic device, which includes the aforementioned low-noise amplifier; or includes the aforementioned radio frequency front-end module.

[0009] The low noise amplifier, RF front-end module and electronic device provided by the embodiment of the present application, the low noise amplifier includes a first signal input terminal, a second signal input terminal, a signal output terminal, an amplifier circuit and a capacitor circuit; the first end of the amplifier circuit is respectively connected to the first signal input terminal and the second signal input terminal, the second end of the amplifier circuit is connected to the signal output terminal, and the third end of the amplifier circuit is used for grounding; one end of the capacitor circuit is connected to the first signal input terminal, and the other end is connected to the third end of the amplifier circuit. Compared with the signal input terminal not connected to the capacitor circuit, by connecting the capacitor circuit between the first signal input terminal of the low noise amplifier and the third end of the amplifier circuit, the inductance required for the input matching inductor of the first signal input terminal can be reduced, and the input matching inductor of the first signal input terminal can adopt an inductor with a smaller inductance, which can make the input matching inductor have a higher Q value and prevent the deterioration of noise.

[0010] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory and cannot limit the disclosure of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0012] Figure 1 is a schematic block diagram of a low noise amplifier provided in an embodiment of the present application;

[0013] Figure 2 is a schematic diagram of a low noise amplifier connected to an input matching inductor in some embodiments of the present application;

[0014] Figure 3a to Figure 3c is a schematic diagram of a low noise amplifier in some embodiments of the present application;

[0015] Figures 4a to 4c is a schematic diagram of a capacitor circuit in some embodiments of the present application;

[0016] Figure 5 and Figure 6 is a schematic diagram of a low noise amplifier in some other implementation modes of the present application;

[0017] Figure 7a and Figure 7b is a schematic diagram of a regulating circuit in some embodiments of the present application;

[0018] Figure 8is a schematic block diagram of a radio frequency front-end module provided in an embodiment of the present application;

[0019] Fig. 9 is a schematic block diagram of a radio frequency front-end module in one embodiment of the present application;

[0020] Fig.10 It is a schematic block diagram of an electronic device provided in an embodiment of the present application.

[0021] Description of reference numerals:

[0022] 101, signal input terminal; 101a, first signal input terminal; 101b, second signal input terminal; 102, signal output terminal;

[0023] 103, amplifier circuit; 1301, amplifier branch; 1031, first amplifier branch; 1032, second amplifier branch; 1033, first switch branch; 1034, second switch branch; 104, capacitor circuit; 1041, first capacitor circuit; 1042, second capacitor circuit; 1043, third capacitor circuit; T1, first transistor; T2, second transistor; 106, adjustment circuit; K1, first switch; L1, first inductor;

[0024] Lg, input matching inductor; 10, substrate; 11, external signal input port; 12, antenna port; 13, filter. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0026] It should be understood that the present application can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0027] In order to thoroughly understand the present application, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by the present application. The preferred embodiments of the present application are described in detail below, but in addition to these detailed descriptions, the present application may also have other implementation methods.

[0028] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0029] See also Figure 1 , Figure 1 1 is a schematic block diagram of a low noise amplifier provided in an embodiment of the present application. In some implementations, the low noise amplifier can be applied to a radio frequency front-end module.

[0030] The RF front-end module is a component that integrates one or more discrete devices such as RF switches, low-noise amplifiers, filters, duplexers, power amplifiers, etc. into an independent module, thereby improving the integration and hardware performance, and miniaturizing the volume. Specifically, the RF front-end module can be applied to communication equipment, wherein the communication equipment may include electronic devices such as smart phones, tablet computers, smart watches, and may also include communication equipment such as base stations and NFC (Near Field Communication) devices. The RF front-end module can receive or transmit RF signals through the antenna in the communication device, and the low-noise amplifier is used to amplify the received RF signal. In some embodiments, the RF front-end module can support carrier aggregation (Carrier Aggregation) and dual connectivity (Dual connectivity) and multiple input and multiple output (MIMO).

[0031] like Figure 1 As shown, the low noise amplifier includes a plurality of signal input terminals 101 and a signal output terminal 102, an amplifying circuit 103 and a capacitor circuit 104. The plurality of signal input terminals 101 include at least a first signal input terminal 101a and a second signal input terminal 101b. Optionally, the number of the first signal input terminals 101a is one or more, and the number of the second signal input terminals 101b is one or more. The signal input terminals 101 of the optional low noise amplifier may also include other signal input terminals 101 in addition to the first signal input terminal 101a and the second signal input terminal 101b, such as Figure 2 The figure also includes a third signal input terminal 101x.

[0032] like Figure 1 As shown, the first end of the amplifier circuit 103 is respectively connected to the first signal input terminal 101a and the second signal input terminal 101b, the second end of the amplifier circuit 103 is connected to the signal output terminal 102, and the third end of the amplifier circuit 103 is used for grounding. Optionally, the third end of the amplifier circuit 103 can be directly grounded without passing through other components, or can be indirectly grounded through components such as inductors and resistors or impedance matching networks, gain adjustment networks, etc.

[0033] In one embodiment, if Figure 3a to Figure 3cAs shown, the second end of the amplifier circuit 103 is also connected to the power supply terminal Vdd, and the power supply terminal Vdd is used to supply power to the amplifier circuit 103.

[0034] like Figure 3a to Figure 3c As shown, the amplifier circuit 103 includes one or more amplifier branches 1301 , and a first end of each amplifier branch 1301 can be connected to one or more signal input terminals 101 .

[0035] Each amplifying branch 1301 includes one or more transistors. For example, the transistor in the amplifying branch 1301 may be a metal-oxide semiconductor field effect transistor (MOSFET). Of course, the transistor may also be other types of transistors, for example, the transistor may be a bipolar junction transistor (BJT), a complementary metal-oxide semiconductor transistor (CMOS), a transistor based on a silicon-on-insulator (SOI) process, or a high electron mobility transistor (HEMT), etc. The embodiment of the present application does not limit the type of transistor in the amplifying branch 1301. For ease of description, the following mainly takes a metal-oxide semiconductor field effect transistor as an example for description.

[0036] In some embodiments, the amplifier circuit 103 may adopt a common source and common gate architecture. For example, in some embodiments, Figure 3a or Figure 3b As shown, the amplification branch 1301 includes a first transistor T1 and a second transistor T2, the gate of the first transistor T1 is connected to the first end of the amplification circuit 103; the drain of the first transistor T1 is connected to the source of the second transistor T2, the drain of the second transistor T2 is connected to the second end of the amplification circuit 103, and the source of the first transistor T1 is connected to the third end of the amplification circuit 103; the gate of the first transistor T1 is also used to receive the first bias signal, and the gate of the second transistor T2 is also used to receive the second bias signal. Optionally, the source and drain of the first transistor T1 and the second transistor T2 can be interchanged.

[0037] Optional, such as Figure 3aAs shown, the amplifier circuit 103 includes a plurality of amplifier branches 1301, wherein at least two amplifier branches 1301 share the second transistor T2, so as to reduce the number of transistors required for the amplifier circuit 103, which is conducive to the miniaturization design of the low noise amplifier. Of course, in other implementations, all or part of the amplifier branches 1301 may not share the second transistor T2 with other amplifier branches, and the present application does not limit this.

[0038] In some other implementations, the amplifier circuit 103 may adopt a common source architecture, for example, Figure 3c As shown, the amplifying branch 1301 includes a first transistor T1, the gate of the first transistor T1 is connected to the first end of the amplifying circuit 103, the drain of the first transistor T1 is connected to the second end of the amplifying circuit 103, and the source of the first transistor T1 is connected to the third end of the amplifying branch 1301; wherein the gate of the first transistor T1 is also used to receive a first bias signal. Figure 3c The amplification branch 1301 in Figure 3a or Figure 3b The difference between the amplifying branch 1301 and the amplifying branch 1301 is that the amplifying branch 1301 may not include the second transistor T2.

[0039] It should be noted that, based on the above architecture, the amplifier circuit 103 may also include other circuit elements, for example, at least one feedback element may be set between any two ends of the first transistor T1; and / or, one or more bypass elements, feedback elements, etc. may be set between the second end of the second transistor T2 and the first end of the first transistor T1; and / or, a source degeneration inductor / source degeneration resistor may be connected in series at the third end of the first transistor T1.

[0040] In addition, the amplifier circuit 103 of the embodiment of the present application may not be limited to the common source architecture or the common source and common gate architecture. In some other implementations, the amplifier circuit 103 may also adopt a common gate architecture, a distributed amplifier architecture or other circuit architecture, and the present application does not impose any restrictions on this.

[0041] In some embodiments, Figure 3aAs shown, the amplifier circuit 103 includes a plurality of amplifier branches 1301, and the plurality of amplifier branches 1301 include a first amplifier branch 1031 and a second amplifier branch 1032; the first end of the amplifier circuit 103 includes an input end of the first amplifier branch 1031 and an input end of the second amplifier branch 1032, wherein the input end of the first amplifier branch 1031 is connected to the first signal input end 101a, and the input end of the second amplifier branch 1032 is connected to the second signal input end 101b. Optionally, the input end of at least one amplifier branch 1301 is connected to the corresponding signal input end 101 through a switch circuit, and when the switch circuit corresponding to any signal input end 101 is connected, the RF signal input to the signal input end 101 is transmitted to the corresponding amplifier branch 1301 for amplification processing, and the amplified RF signal is output through the second end of the amplifier circuit 103.

[0042] In other embodiments, Figure 3b or Figure 3c As shown, the amplifier circuit 103 includes an amplifier branch 1301 and multiple switch branches, and the multiple switch branches include, for example, a first switch branch 1033 and a second switch branch 1034. The first end of the amplifier circuit 103 includes an input end of the amplifier branch 1301; wherein the first signal input end 101a and the second signal input end 101b are connected to the input end of the amplifier branch 1301 through their respective corresponding switch branches.

[0043] For example, Figure 3b or Figure 3c As shown, the multiple switch branches include a first switch branch 1033 and a second switch branch 1034, the first end of the first switch branch 1033 is connected to the first signal input terminal 101a, the first end of the second switch branch 1034 is connected to the second signal input terminal 101b, and the second end of the first switch branch 1033 and the second end of the second switch branch 1034 are both connected to the input end of the amplification branch 1301. When the switch branch corresponding to any signal input terminal 101 is connected, the RF signal input from the signal input terminal 101 is transmitted to the amplification branch 1301 for amplification processing. The RF signals input from multiple signal input terminals 101 can be amplified by the same amplification branch 1301 to reduce the number of transistors required for the amplification circuit 103, which is conducive to the miniaturization design of the low noise amplifier.

[0044] In some other embodiments, the amplifier circuit 103 includes multiple amplifier branches 1301, some of the multiple amplifier branches 1301 are respectively connected to a signal input terminal 101, and these amplifier branches 1301 have independent first transistors T1 and second transistors T2 that are not shared with other branches; the first end of the remaining at least one amplifier branch 1301 can be connected to multiple signal input terminals 101 through multiple switch branches. The amplifier circuit 103 can support carrier aggregation, for example, it can simultaneously receive radio frequency signals of different frequency bands from multiple signal input terminals 101 for amplification.

[0045] like Figure 2 As shown, the first signal input terminal 101a and the second signal input terminal 101b are respectively used to connect the corresponding input matching inductor Lg. For example, the low noise amplifier is arranged on the substrate 10, and a plurality of input matching inductors Lg are arranged on the substrate 10, and the first signal input terminal 101a and the second signal input terminal 101b of the low noise amplifier are connected to the corresponding input matching inductor Lg. By connecting the input matching inductor Lg to the signal input terminal 101 of the low noise amplifier, impedance matching can be achieved, the transmission efficiency of the input signal can be improved, the loss can be reduced, the signal amplitude can be enhanced, and the noise can be suppressed, thereby improving the performance of the low noise amplifier.

[0046] The input matching inductor Lg is, for example, a SMD (Surface Mount Device) inductor, but is not limited thereto. For example, it may also be a metal coil inductor formed on the substrate 10 .

[0047] As an embodiment, when the low noise amplifier is integrated into a chip and is set on a substrate through a flip-chip packaging process, the first signal input terminal 101a and the second signal input terminal 101b of the low noise amplifier can be connected to the substrate through bumps grown on the chip, and connected to the corresponding input matching inductor Lg through lines on the substrate.

[0048] As an embodiment, when the low noise amplifier is integrated into the chip and set on the substrate through a wire bonding process, the first signal input terminal 101a and the second signal input terminal 101b of the low noise amplifier can be connected to the substrate through bonding wires and connected to the corresponding input matching inductor Lg through the lines on the substrate.

[0049] like Figure 1 As shown, one end of the capacitor circuit 104 is connected to the first signal input terminal 101 a , and the other end is connected to the third end of the amplifier circuit 103 .

[0050] For example, Figure 3aAs shown, when the first signal input terminal 101a is connected to an amplifying branch alone, the first end of the capacitor circuit 104 can be connected to the gate of the first transistor T1 in the first amplifying branch 1031, and connected to the first signal input terminal 101a through a switch branch connected to the gate of the first transistor T1; the second end of the capacitor circuit 104 is connected to the source of the first transistor T1 in the first amplifying branch 1031, that is, connected to the third end of the amplifying circuit 103 through the source of the first transistor T1.

[0051] For example, Figure 3b or Figure 3c As shown, when the first signal input terminal 101a is connected to the same amplifying branch as other signal input terminals, the first end of the capacitor circuit 104 is connected to the first end of the first switch branch 1033, and the second end of the capacitor circuit 104 is connected to the source of the first transistor T1 in the amplifying branch 1301. Thus, through the first switch branch 1033, not only the connection relationship between the corresponding first signal input terminal 101a and the amplifying branch can be controlled, but also the connection relationship between the capacitor circuit 104 corresponding to the first signal input terminal 101a and the amplifying branch can be controlled. This also facilitates setting different capacitor circuits 104 for different first signal input terminals when the first plurality of signal input terminals share the amplifying branch.

[0052] It should be noted that the lower the frequency of the RF signal corresponding to the signal input terminal 101 of the low noise amplifier, the greater the inductance of the corresponding input matching inductor Lg; however, the increase in inductance will reduce the Q value (quality factor) of the input matching inductor Lg, which will lead to the deterioration of noise. The related technology usually uses SMD inductors with the same inductance and higher Q value as the input matching inductor Lg of the low noise amplifier, which is costly; and if multiple inductors with smaller inductance are connected in series as the input matching inductor Lg, the series line will couple noise, resulting in noise deterioration.

[0053] Compared with the signal input terminal 101 not connected with the capacitor circuit 104, the embodiment of the present application connects the capacitor circuit 104 between the first signal input terminal 101a of the low noise amplifier and the third terminal of the amplifier circuit 103, and the capacitor of the capacitor circuit 104 can participate in the input matching of the first signal input terminal 101a, and compensate for a part of the inductance required for the input matching, thereby reducing the inductance required for the input matching inductor Lg of the first signal input terminal 101a. For example, for the signal input terminal 101 not connected with the capacitor circuit 104, an SMD inductor with a larger inductance is required as the input matching inductor Lg to achieve the required impedance matching effect and gain; while the input matching inductor Lg of the first signal input terminal 101a connected with the capacitor circuit 104 can use an SMD inductor with a smaller inductance, that is, the required impedance matching effect and gain can be achieved, and it has a lower noise coefficient. The input matching inductor Lg of the first signal input terminal 101a uses an inductor with a smaller inductance, which can also make the input matching inductor Lg have a higher Q value, and there is no need to connect multiple inductors in series, which can prevent the deterioration of noise.

[0054] For example, by connecting the capacitor circuit 104 to the first signal input terminal 101a of the low-frequency RF signal, the low-noise amplifier can have excellent broadband working characteristics for the low-frequency RF signal without introducing an input matching inductor Lg with a large inductance, thereby ensuring performance requirements and saving costs.

[0055] In some embodiments, the second signal input terminal 101b is not connected to the third terminal of the amplifier circuit 103 through the capacitor circuit 104, that is, the capacitor circuit 104 is not connected between the second signal input terminal 101b of the low noise amplifier and the third terminal of the amplifier circuit 103. Not connecting the capacitor circuit 104 to the second signal input terminal 101b can prevent the real impedance of the second signal input terminal 101b from decreasing, thereby preventing the deterioration of the input return loss.

[0056] By providing a capacitor circuit 104 connected to the third end of the amplifier circuit 103 for some signal input terminals 101 (referred to as the first signal input terminal 101a) of the low noise amplifier, and not providing a capacitor circuit 104 connected to the third end of the amplifier circuit 103 for other signal input terminals 101 (referred to as the second signal input terminal 101b), the low noise amplifier can meet the corresponding performance requirements for the radio frequency signals of different signal input terminals 101. For example, for different signal input terminals 101, according to the working frequency band and substrate environment (such as the wiring length or parasitic impedance of the signal link) corresponding to the signal input terminal 101, some signal input terminals 101 are provided with a capacitor circuit 104, and some signal input terminals 101 are not provided with a capacitor circuit 104.

[0057] In some embodiments, see Figures 4a to 4c The capacitor circuit 104 includes at least one of the following: a first capacitor circuit 1041 , a second capacitor circuit 1042 , and a third capacitor circuit 1043 .

[0058] As an implementation method, Figure 4a As shown, the capacitance value of the first capacitor circuit 1041 is fixed; for example, the first capacitor circuit 1041 includes a capacitor C. Exemplarily, in the first capacitor circuit 1041, a first end of the capacitor C is connected to the gate of the first transistor T1 in the amplifying branch 1301 corresponding to the first signal input terminal 101a, and a second end of the capacitor C is connected to the source of the first transistor T1 in the amplifying branch 1301 corresponding to the first signal input terminal 101a.

[0059] As an implementation method, Figure 4b As shown, the second capacitor circuit 1042 can be switched to a connected state or a disconnected state. For example, the second capacitor circuit 1042 includes a capacitor C and a switching switch K. The capacitor C and the switching switch K are connected in series between the gate of the first transistor T1 and the source of the first transistor T1 in the amplification branch 1301 corresponding to the first signal input terminal 101a. When the switching switch K is closed, that is, the second capacitor circuit 1042 is switched to a connected state, the capacitor C is connected between the gate of the first transistor T1 and the source of the first transistor T1; when the switching switch K is turned off, that is, the second capacitor circuit 1042 is switched to a disconnected state, and the capacitor C is not connected between the gate of the first transistor T1 and the source of the first transistor T1.

[0060] As an implementation method, Figure 4c As shown, the capacitance value of the third capacitor circuit 1043 is adjustable. For example, the third capacitor circuit 1043 includes a plurality of capacitors C and a switching switch K corresponding to each capacitor C, the switching switch K is connected in series with the corresponding capacitor C, and when the switching switch K is turned on, the corresponding capacitor C can be switched to be connected between the first signal input terminal 101a and the third terminal of the amplifier circuit 103. The capacitance value between the gate of the first transistor T1 and the source of the first transistor T1 connected by the third capacitor circuit 1043 can be changed by controlling the on and off of at least one switching switch K. Optionally, the capacitance of the third capacitor circuit 1043 can also be disconnected from the corresponding amplification branch 1301 by controlling all the switching switches K to be turned off, that is, the third capacitor circuit 1043 can also realize the control of whether the capacitance is connected or not.

[0061] Optionally, the capacitor circuits 104 connected to different first signal input terminals 101a may be the same or different. For example, the types of capacitor circuits 104 connected to different first signal input terminals 101a may be determined based on the application scenarios of the first signal input terminals 101a and the characteristics of different types of capacitor circuits 104. Exemplarily, for different signal input terminals 101, the types of capacitor circuits 104 connected to different first signal input terminals 101a are determined based on the operating frequency band and substrate environment (such as the routing length or parasitic impedance of the signal link) corresponding to the signal input terminals 101. Figure 5 As shown, some first signal input terminals 101a of the amplifier circuit 103 are connected to the second capacitor circuit 1042, and some first signal input terminals 101a are connected to the third capacitor circuit 1043. The following describes the types of capacitor circuits 104 connected to different first signal input terminals 101a.

[0062] In some implementations, the capacitor circuit 104 includes a first capacitor circuit 1041 , the number of the first signal input terminals 101 a is one or more, and at least one first signal input terminal 101 a is connected to the first capacitor circuit 1041 .

[0063] Exemplarily, the bandwidth of the working frequency band corresponding to the first signal input terminal 101 a connected to the first capacitor circuit 1041 is less than or equal to 100 MHz.

[0064] Exemplarily, the number of the first signal input terminals 101a is multiple, and some of the first signal input terminals 101a are connected to the first capacitor circuit 1041, and the bandwidth of the working frequency band corresponding to the first signal input terminals 101a connected to the first capacitor circuit 1041 is smaller than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the first capacitor circuit 1041. Among them, the first signal input terminals 101a not connected to the first capacitor circuit 1041 include the first signal input terminals 101a connected to the second capacitor circuit 1042 and / or the first signal input terminals 101a connected to the third capacitor circuit 1043. In other words, among the multiple first signal input terminals 101a, the first signal input terminals 101a corresponding to the smaller bandwidth of the working frequency band can be connected to the first capacitor circuit 1041, and the first signal input terminals 101a corresponding to the larger bandwidth of the working frequency band can be connected to the second capacitor circuit 1042 and / or the third capacitor circuit 1043.

[0065] Exemplarily, there are multiple first signal input terminals 101a, some of the first signal input terminals 101a are connected to the first capacitor circuit 1041, and the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the first capacitor circuit 1041 is smaller than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the first capacitor circuit 1041; and the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the first capacitor circuit 1041 is smaller than or equal to 100 MHz.

[0066] In this embodiment, the capacitance value of the first capacitor circuit 1041 is fixed. Compared with the second capacitor circuit 1042 and the second capacitor circuit 1042, the first capacitor circuit 1041 can be suitable for a working frequency band with a smaller bandwidth (such as a bandwidth less than or equal to 100 MHz). The frequency of the RF signal of the working frequency band with a smaller bandwidth is relatively fixed, and the first capacitor circuit 1041 with a fixed capacitance value can meet the demand. Compared with the use of the second capacitor circuit 1042 and the second capacitor circuit 1042, the number of switching switches K can be reduced, which is conducive to the miniaturization design of the low noise amplifier.

[0067] For example, the capacitance value of the first capacitor circuit 1041 is in the range of 1 femtofarad to 999 femtofarad, that is, the capacitance value of the first capacitor circuit 1041 is in the femtofarad level.

[0068] In some implementations, the capacitor circuit 104 includes a second capacitor circuit 1042 , the number of the first signal input terminals 101 a is one or more, and at least one first signal input terminal 101 a is connected to the second capacitor circuit 1042 .

[0069] Exemplarily, the bandwidth of the working frequency band corresponding to the first signal input terminal 101 a connected to the second capacitor circuit 1042 is greater than or equal to 100 MHz.

[0070] Exemplarily, the number of the first signal input terminals 101a is multiple, and some of the first signal input terminals 101a are connected to the second capacitor circuit 1042, and the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the second capacitor circuit 1042. Among them, the first signal input terminal 101a not connected to the second capacitor circuit 1042 includes the first signal input terminal 101a connected to the first capacitor circuit 1041 and / or the first signal input terminal 101a connected to the third capacitor circuit 1043. In other words, among the multiple first signal input terminals 101a, the first signal input terminal 101a with a larger bandwidth of the corresponding working frequency band can be connected to the second capacitor circuit 1042, and the first signal input terminal 101a with a smaller bandwidth of the corresponding working frequency band can be connected to the first capacitor circuit 1041 and / or the third capacitor circuit 1043.

[0071] Exemplarily, there are multiple first signal input terminals 101a, some of the first signal input terminals 101a are connected to the second capacitor circuit 1042, the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the second capacitor circuit 1042; and the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than or equal to 100 MHz.

[0072] The second capacitor circuit 1042 can be switched to a connected state or a disconnected state, that is, the capacitance value of the second capacitor circuit 1042 connected to the amplifier circuit 103 can be 0 or the capacitance value of the capacitor C. Compared with the first capacitor circuit 1041, the second capacitor circuit 1042 can be suitable for a working frequency band with a larger bandwidth (such as a bandwidth greater than 100 MHz).

[0073] Exemplarily, for the first signal input terminal 101a connected to the second capacitor circuit 1042, the second capacitor circuit 1042 can be switched to a connected state or a disconnected state according to the substrate environment corresponding to the first signal input terminal 101a (such as the routing length or parasitic impedance of the signal link) and / or the frequency of the operating frequency band, so that the state of the second capacitor circuit 1042 can better meet the needs of the first signal input terminal 101a; of course, it is not limited to this. For example, in some sub-bands of the operating frequency band, the second capacitor circuit 1042 is switched to a connected state, and in other sub-bands of the operating frequency band, the second capacitor circuit 1042 is switched to a disconnected state.

[0074] For example, there are multiple first signal input terminals 101 a , the capacitor circuit 104 includes multiple second capacitor circuits 1042 , and the multiple first signal input terminals 101 a are connected to the second capacitor circuits 1042 .

[0075] Optionally, among the multiple first signal input terminals 101a connected to the second capacitor circuit 1042, the second capacitor circuit 1042 corresponding to the first signal input terminal 101a whose parasitic impedance of the signal link is greater than or equal to the second preset impedance is controlled to be in a disconnected state, and the second capacitor circuit 1042 corresponding to the first signal input terminal 101a whose parasitic impedance of the signal link is less than the second preset impedance is controlled to be in a conductive state.

[0076] For example, see Figure 6 , the low noise amplifier is arranged on the substrate 10, and the substrate 10 is also provided with a port for connecting to the RF signal source, and the first signal input terminal 101a is connected to the corresponding port through the corresponding signal link to obtain the RF signal from the RF signal source. For example, the RF signal source includes an antenna, and the port for connecting to the antenna can be called the antenna port 12, and the signal link between the antenna port 12 and the corresponding first signal input terminal 101a can include metal wiring and a filter 13, and can also include at least one switch. For example, the RF signal source can also include other RF circuits, and the corresponding port can be called the external signal input port 11, and the signal link between the external signal input port 11 and the corresponding first signal input terminal 101a includes a metal wiring but does not include the filter 13.

[0077] For the first signal input terminal 101a corresponding to the signal link with a smaller parasitic impedance, the second capacitor circuit 1042 is controlled to be in a connected state to connect the capacitor C to the amplifier circuit 103, which can reduce the inductance required for the input matching inductor Lg of the first signal input terminal 101a, that is, the input matching inductor Lg of the first signal input terminal 101a can use an inductor with a smaller inductance, which can make the input matching inductor Lg have a higher Q value and prevent the deterioration of noise. For the first signal input terminal 101a corresponding to the signal link with a larger parasitic impedance, the second capacitor circuit 1042 is controlled to be in a disconnected state, which can prevent the real impedance of the first signal input terminal 101a from decreasing, thereby preventing the deterioration of the input return loss.

[0078] In some embodiments, the low noise amplifier is disposed on the substrate 10, the capacitor circuit 104 includes a second capacitor circuit 1042, at least one first signal input terminal 101a is connected to the second capacitor circuit 1042, and is used to connect to the first signal port (antenna port 12 and / or external signal input port 11) on the substrate 10 through a first signal link.

[0079] Exemplarily, the parasitic impedance of the first signal link is greater than or equal to the first preset impedance, and / or the parasitic impedance of the first signal link is greater than the parasitic impedance of at least one second signal link, and the second signal link is a signal link between the first signal input terminal 101a not connected to the second capacitor circuit 1042 and the second signal port on the substrate 10.

[0080] For example, the situation where the parasitic impedance of the first signal link is greater than the parasitic impedance of the second signal link may include: the length of the metal trace of the first signal link is greater than the length of the metal trace of the second signal link; and / or, the first signal link includes a filter 13, and at least one second signal link does not include the filter 13. The filter 13 may be integrated in a duplexer or a multiplexer.

[0081] For example, the frequency of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is less than the frequency of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the second capacitor circuit 1042. As an implementation method, for the first signal input terminal 101a with a higher frequency in the working frequency band, the required input matching inductance is smaller, so when laying out, the low noise amplifier can be preferentially arranged adjacent to the port corresponding to the frequency band on the substrate to avoid the parasitic impedance of the signal link between the first signal input terminal 101a and the port exceeding the required input matching impedance. In contrast, compared with the first signal input terminal 101a with a higher frequency in the working frequency band, the first signal input terminal 101a with a lower frequency in the working frequency band requires a larger input matching inductance, and can also allow a larger parasitic impedance. Therefore, in some implementation methods, the distance between the first signal input terminal 101a with a lower frequency in the working frequency band and the corresponding port on the substrate can be relatively far, the metal routing distance of the corresponding signal link is longer, and the parasitic impedance is relatively large.

[0082] Compared with the first capacitor circuit 1041 and / or the third capacitor circuit 1043, the second capacitor circuit 1042 can be suitable for the first signal input terminal 101a corresponding to the signal link with a larger parasitic impedance. Exemplarily, for the first signal input terminal 101a corresponding to the signal link with a larger parasitic impedance, the second capacitor circuit 1042 can be flexibly determined to switch to a connected state or a disconnected state according to the bandwidth of the working frequency band of the first signal input terminal 101a, so that the state of the second capacitor circuit 1042 can better meet the needs of the first signal input terminal 101a.

[0083] In some implementations, the first signal input terminal 101a corresponding to the signal link operating in a relatively large bandwidth and having a relatively large parasitic impedance is connected to the second capacitor circuit 1042. For such first signal input terminal 101a, it is possible to flexibly determine whether the second capacitor circuit 1042 is switched to a connected state or a disconnected state, so that the state of the second capacitor circuit 1042 can better meet the needs of the first signal input terminal 101a.

[0084] The following describes the first signal input terminal 101a corresponding to the signal link operating in a larger bandwidth and having a larger parasitic impedance. Exemplarily, the bandwidth of the operating frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than or equal to 100 MHz, and the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than or equal to the first preset impedance. Exemplarily, the bandwidth of the operating frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the bandwidth of the operating frequency band corresponding to at least one first signal input terminal 101a not connected to the second capacitor circuit 1042, and the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the parasitic impedance of at least one second signal link, and the second signal link is the signal link corresponding to the first signal input terminal 101a not connected to the second capacitor circuit 1042. Exemplarily, the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than or equal to 100 MHz, and the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the parasitic impedance of at least one second signal link. Exemplarily, the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a not connected to the second capacitor circuit 1042, and the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042 is greater than or equal to the first preset impedance.

[0085] For example, the capacitance of the second capacitor circuit 1042 is in the range of 1 femtofarad to 999 femtofarad, that is, the capacitance of the second capacitor circuit 1042 is in the femtofarad level.

[0086] Optionally, the capacitance value of the second capacitance circuit 1042 connected to at least two first signal input terminals 101a, that is, the capacitance value of the capacitor C in at least two second capacitance circuits 1042 is different; for example, the capacitance value of the second capacitance circuit 1042 connected to the first signal input terminal 101a can be determined according to the substrate environment corresponding to the first signal input terminal 101a (such as the routing length or parasitic impedance of the signal link) to improve the performance of the low noise amplifier in processing the RF signal of the first signal input terminal 101a.

[0087] For example, the capacitance value of the second capacitor circuit 1042 is negatively correlated with the parasitic impedance of the signal link of the first signal input terminal 101a corresponding to the second capacitor circuit 1042. That is, the greater the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a, the smaller the capacitance value of the capacitor C in the second capacitor circuit 1042 connected to the first signal input terminal 101a. When the second capacitor circuit 1042 is switched to the connected state, the inductance required for the input matching inductor Lg of the first signal input terminal 101a can be reduced to prevent the deterioration of noise.

[0088] In some implementations, the capacitor circuit 104 includes a third capacitor circuit 1043 , the number of the first signal input terminals 101 a is one or more, and at least one first signal input terminal 101 a is connected to the third capacitor circuit 1043 .

[0089] For example, the capacitance of the third capacitor circuit 1043 can be adjusted in the range of 1 femtofarad to 2 picofarads, that is, the maximum capacitance of the third capacitor circuit 1043 can be picofarads. The maximum capacitance of the third capacitor circuit 1043 is greater than the maximum capacitance of the second capacitor circuit 1042.

[0090] Exemplarily, the first signal input terminal 101a corresponding to the signal link working in a larger bandwidth and with a smaller parasitic impedance is connected to the third capacitor circuit 1043. For such first signal input terminal 101a, the capacitance value of the third capacitor circuit 1043 connected to the amplifier circuit 103 can be flexibly adjusted so that the third capacitor circuit 1043 can better meet the needs of the first signal input terminal 101a.

[0091] Exemplarily, the bandwidth of the working frequency band corresponding to the first signal input terminal 101 a connected to the third capacitor circuit 1043 is greater than or equal to 100 MHz.

[0092] Exemplarily, the number of first signal input terminals 101a is multiple, some of the first signal input terminals 101a are connected to the third capacitor circuit 1043, and the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the third capacitor circuit 1043 is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal 101a that is not connected to the third capacitor circuit 1043; for example, the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the third capacitor circuit 1043 is greater than the bandwidth of the working frequency band corresponding to the first signal input terminal 101a connected to the first capacitor circuit 1041.

[0093] Exemplarily, the parasitic impedance of the first signal link corresponding to the first signal input terminal 101a connected to the third capacitor circuit 1043 is less than or equal to the first preset impedance, and / or the parasitic impedance of the first signal link connected to the third capacitor circuit 1043 is less than the parasitic impedance of at least one third signal link. The third signal link is a signal link corresponding to the first signal input terminal 101a not connected to the third capacitor circuit 1043. For example, the third signal link may include a signal link corresponding to the first signal input terminal 101a connected to the second capacitor circuit 1042, that is, including the first signal link.

[0094] The capacitance value of the third capacitor circuit 1043 is adjustable, that is, the capacitance value connected to the amplifier circuit 103 by the third capacitor circuit 1043 is adjustable; compared with the second capacitor circuit 1042, the third capacitor circuit 1043 can provide more capacitance value gears for the amplifier circuit 103, and optionally, the third capacitor circuit 1043 can include multiple capacitors, and the upper limit of the capacitance value that can be provided can also be greater than the second capacitor circuit 1042 and the first capacitor circuit 1041. At least compared with the first capacitor circuit 1041, the third capacitor circuit 1043 can be applied to a larger bandwidth working frequency band; the first signal input terminal 101a corresponding to the signal link with a smaller parasitic impedance needs to be connected to a larger capacitance value. For the first signal input terminal 101a corresponding to the signal link with a smaller parasitic impedance, the third capacitor circuit 1043 with a higher upper limit of the capacitance value can be connected, and the capacitance value of the third capacitor circuit 1043 is adjustable, and the capacitance value connected to the amplifier circuit 103 can be adjusted more finely, so that the third capacitor circuit 1043 can better meet the needs of the RF signal input by the first signal input terminal 101a.

[0095] In some embodiments, see Figure 6 The low noise amplifier is arranged on a substrate 10 , and an external signal input port 11 , an antenna port 12 and a filter 13 are also arranged on the substrate 10 .

[0096] Exemplarily, the capacitor circuit 104 includes a third capacitor circuit 1043, the number of the first signal input terminal 101a is one or more, and at least one first signal input terminal 101a is connected to the third capacitor circuit 1043. At least one first signal input terminal 101a connected to the third capacitor circuit 1043 is used to connect to the external signal input port 11; at least one signal input terminal 101 not connected to the third capacitor circuit 1043 is used to connect to the antenna port 12 on the substrate 10 through a filter.

[0097] Compared with the antenna port 12, the frequency of the signal input by the external signal input port 11 is uncertain; the capacitance value of the third capacitor circuit 1043 is adjustable. When applied to the first signal input terminal 101a connected to the external signal input port 11, the capacitance value of the connected amplifier circuit 103 can be more flexibly adjusted according to the frequency of the signal input by the external signal input port 11 to improve the performance of the low-noise amplifier in processing the signal input by the external signal input port 11.

[0098] Optionally, the length of the metal trace between the first signal input terminal 101a and the external signal input port 11 is greater than or equal to 300 microns. In this case, the parasitic impedance of the first signal link corresponding to the external signal input port 11 is small, and the third capacitor circuit 1043 with an adjustable capacitance value is connected, and the capacitance value of the access amplifier circuit 103 can be adjusted more finely, so that the third capacitor circuit 1043 can better meet the input signal requirements of the external signal input port 11.

[0099] In some embodiments, see Figure 3a to Figure 3c or Figure 5 The low noise amplifier further includes a regulating circuit 106, and the third end of the amplifier circuit 103 is grounded through the regulating circuit 106, that is, the third end of the amplifier circuit 103 is connected to the first end of the regulating circuit 106, and the second end of the regulating circuit 106 is grounded.

[0100] Exemplarily, the adjustment circuit 106 is configured to adjust the gain of the amplification circuit 103 .

[0101] Exemplarily, the impedance of the regulating circuit 106 is adjustable. By adjusting the impedance of the regulating circuit 106 , the gain of the low noise amplifier can be adjusted.

[0102] Optional, such as Figure 7a As shown, the regulating circuit 106 includes a plurality of parallel switching branches, wherein at least one switching branch includes a first switch K1 and a first inductor L1 connected in series. By controlling the on and off of the first switch K1 in at least one switching branch, the impedance value connected to the low noise amplifier by the regulating circuit 106 can be changed, thereby adjusting the gain level of the low noise amplifier.

[0103] Optional, such as Figure 7b As shown, the regulating circuit 106 includes a plurality of first inductors L1 connected in series and at least one first switch K1 connected in parallel with the first inductor L1. By controlling the on and off of the first switch K1 connected in parallel with the first inductor L1 in the regulating circuit 106, the impedance value connected to the low noise amplifier by the regulating circuit 106 can be changed, thereby adjusting the gain level of the low noise amplifier. It should be noted that Figure 7b The regulation circuit 106 shown is compared to Figure 7a The regulating circuit 106 shown can be smaller in size, which is beneficial to the miniaturized design of the low noise amplifier.

[0104] Optional, such as Figure 5 As shown, the regulating circuit 106 may further include a resistor connected to the first inductor L1, one end of the resistor may be connected to one end of the first inductor L1 that is grounded, and the other end of the resistor may be grounded. Further, one end of the resistor may also be connected to one end of the first inductor L1 that is grounded through a switch, so that the resistor may be connected or not connected as needed. When the resistor is connected, part of the power may be discharged, so that the low noise amplifier is not prone to gain compression and the output power is not prone to saturation, thereby improving the linearity of the low noise amplifier.

[0105] In the implementation mode of the present application, by connecting the adjustment circuit 106 to the third end of the amplifier circuit 103, the adjustment circuit 106 can adjust the gain level of the low noise amplifier, and can also adjust the input power of the low noise amplifier input to the first end of the amplifier circuit 103 at different gain levels, so that the output power is not easily saturated, and the low noise amplifier is prevented from generating gain compression, thereby optimizing the third-order intermodulation distortion (IIP3) of the low noise amplifier and improving the 1 dB compressed output power (P1dB) of the low noise amplifier, and further improving the linearity of the low noise amplifier at multiple different gain levels when gain switching is performed.

[0106] The low noise amplifier provided in the embodiment of the present application includes a first signal input terminal, a second signal input terminal, a signal output terminal, an amplifier circuit, and a capacitor circuit; the first end of the amplifier circuit is respectively connected to the first signal input terminal and the second signal input terminal, the second end of the amplifier circuit is connected to the signal output terminal, and the third end of the amplifier circuit is used for grounding; one end of the capacitor circuit is connected to the first signal input terminal, and the other end is connected to the third end of the amplifier circuit. Compared with the signal input terminal not connected to the capacitor circuit, by connecting the capacitor circuit between the first signal input terminal of the low noise amplifier and the third end of the amplifier circuit, the inductance required for the input matching inductor of the first signal input terminal can be reduced, and the input matching inductor of the first signal input terminal can adopt an inductor with a smaller inductance, which can make the input matching inductor have a higher Q value and prevent the deterioration of noise.

[0107] Please refer to the above examples. Figure 8 ,like Figure 8 Shown is a schematic block diagram of a radio frequency front-end module provided in an embodiment of the present application; the radio frequency front-end module includes the aforementioned low-noise amplifier.

[0108] In some embodiments, the RF front-end module may also include at least one of an RF switch, an RF power amplifier, a filter, a duplexer, etc., which may be integrated into one module to improve integration and performance and miniaturize the size.

[0109] In some embodiments, Fig. 9 As shown, the RF front-end module includes a substrate and a RF front-end circuit arranged on the substrate. The RF front-end circuit may include a switching circuit, a filter, a RF power amplifier chip and a low-noise amplifier between the RF receiving port RX, the RF transmitting port TX and the antenna port, and a RF signal transmission path is formed through the above-mentioned RF devices.

[0110] The RF front-end circuit can choose to send RF signals to the antenna port or receive RF signals from the antenna port to achieve amplification, filtering and other processing of the RF analog signal.

[0111] As an implementation method, the RF front-end module may include multiple chips, and the multiple chips include at least a low noise amplifier chip integrated with the above-mentioned low noise amplifier 100. Furthermore, the RF front-end module may also include at least one other chip such as a power amplifier chip, a control chip, a switch chip, and a filter chip.

[0112] Exemplarily, different chips may adopt different processes. For example, the low noise amplifier chip and the control chip may adopt at least one of the silicon on insulator (SOI) process, the high electron mobility transistor (HEMT) process, and the pseudomorphic high electron mobility transistor (PHEMT) process; the power amplifier chip may adopt the HBT (heterojunction bipolar transistor) process, also known as the HBT chip, and the control chip may adopt the CMOS process, also known as the CMOS chip.

[0113] Exemplarily, the RF front-end module may further include a filter chip, in which one or more filters 230 may be integrated, which may constitute a single filter, a duplexer or a multiplexer for filtering RF signals.

[0114] The specific principles and implementation methods of the RF front-end module provided in the embodiment of the present application are similar to those of the low-noise amplifier in the aforementioned embodiment, and will not be repeated here.

[0115] Please refer to the above examples. Fig.10 ,like Fig.10 The figure is a schematic block diagram of an electronic device provided by another embodiment of the present application. The electronic device includes the aforementioned low noise amplifier; or includes the aforementioned radio frequency front-end module.

[0116] The electronic device may be a communication device such as a mobile phone, a tablet computer, a vehicle-mounted terminal, or of course, may also be other communication devices with communication functions. The embodiments of the present application do not limit the specific type of the electronic device.

[0117] The specific principles and implementation methods of the electronic device provided in the embodiments of the present application are similar to those of the low-noise amplifier or RF front-end module in the aforementioned embodiments, and will not be repeated here.

[0118] It should be understood that the terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0119] It should be understood that "multiple" refers to two or more than two, unless the context clearly indicates another way. When an element or layer is referred to as "on ... ", "adjacent to ... ", "connected to " or "coupled to" other elements or layers, it can be directly on other elements or layers, adjacent to it, connected or coupled to other elements or layers, or there can be an intermediate element or layer. On the contrary, when an element is referred to as "directly on ... ", "directly adjacent to ... ", "directly connected to " or "directly coupled to" other elements or layers, there is no intermediate element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish an element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teaching of the present application, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part.

[0120] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0121] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0122] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A low noise amplifier, characterized in that: The low noise amplifier comprises a first signal input terminal, a second signal input terminal, a signal output terminal and: an amplifier circuit, wherein a first end of the amplifier circuit is respectively connected to the first signal input end and the second signal input end, a second end of the amplifier circuit is connected to the signal output end, and a third end of the amplifier circuit is used for grounding; A capacitor circuit has one end connected to the first signal input end and the other end connected to the third end of the amplifier circuit.

2. The low noise amplifier according to claim 1, characterized in that: The first signal input terminal and the second signal input terminal are respectively used to connect corresponding input matching inductors.

3. The low noise amplifier according to claim 1, characterized in that: The amplifier circuit includes multiple amplifier branches, and the multiple amplifier branches include a first amplifier branch and a second amplifier branch; the first end of the amplifier circuit includes an input end of the first amplifier branch and an input end of the second amplifier branch, wherein the input end of the first amplifier branch is connected to the first signal input end, and the input end of the second amplifier branch is connected to the second signal input end.

4. The low noise amplifier according to claim 1, characterized in that: The amplifier circuit includes an amplifier branch and multiple switch branches, and the first end of the amplifier circuit includes the input end of the amplifier branch; wherein the first signal input end and the second signal input end are connected to the input end of the amplifier branch through their respective corresponding switch branches.

5. The low noise amplifier according to claim 3 or 4, characterized in that: The amplifying branch comprises a first transistor, a gate of the first transistor is connected to a first end of the amplifying circuit, a drain of the first transistor is connected to a second end of the amplifying circuit, and a source of the first transistor is connected to a third end of the amplifying branch; The gate of the first transistor is also used to receive a first bias signal.

6. The low noise amplifier according to claim 3 or 4, characterized in that: The amplifying branch includes a first transistor and a second transistor, the gate of the first transistor is connected to the first end of the amplifying circuit, the drain of the first transistor is connected to the source of the second transistor, the drain of the second transistor is connected to the second end of the amplifying circuit, and the source of the first transistor is connected to the third end of the amplifying circuit; the gate of the first transistor is also used to receive a first bias signal, and the gate of the second transistor is also used to receive a second bias signal.

7. The low noise amplifier according to claim 6, characterized in that: The amplifying circuit includes a plurality of amplifying branches, wherein at least two amplifying branches share the second transistor.

8. The low noise amplifier according to claim 3, characterized in that: The first end of the capacitor circuit is connected to the gate of the first transistor in the first amplifying branch, and the second end of the capacitor circuit is connected to the source of the first transistor in the first amplifying branch.

9. The low noise amplifier according to claim 4, characterized in that: The plurality of switch branches include a first switch branch and a second switch branch, wherein a first end of the first switch branch is connected to the first signal input end, a first end of the second switch branch is connected to the second signal input end, and a second end of the first switch branch and a second end of the second switch branch are both connected to an input end of the amplifying branch; The first end of the capacitor circuit is connected to the first end of the first switch branch, and the second end of the capacitor circuit is connected to the source of the first transistor in the amplifying branch.

10. The low noise amplifier according to any one of claims 1 to 4, characterized in that: The capacitive circuit includes at least one of the following: A first capacitor circuit, wherein the capacitance value of the first capacitor circuit is fixed; a second capacitive circuit, the second capacitive circuit being switchable to a connected state or a disconnected state; A third capacitor circuit, wherein the capacitance value of the third capacitor circuit is adjustable.

11. The low noise amplifier according to claim 10, characterized in that: The capacitor circuit includes the first capacitor circuit, the number of the first signal input terminals is one or more, and at least one of the first signal input terminals is connected to the first capacitor circuit; wherein: The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the first capacitor circuit is less than or equal to 100 MHz; and / or, There are multiple first signal input terminals, some of which are connected to the first capacitor circuit, and the bandwidth of the working frequency band corresponding to the first signal input terminal connected to the first capacitor circuit is smaller than the bandwidth of the working frequency band corresponding to at least one first signal input terminal not connected to the first capacitor circuit.

12. The low noise amplifier according to claim 10, characterized in that: The capacitance value of the first capacitance circuit is 1 femtofarad to 999 femtofarad.

13. The low noise amplifier according to claim 10, characterized in that: The capacitor circuit includes the second capacitor circuit, the number of the first signal input terminals is one or more, and at least one of the first signal input terminals is connected to the second capacitor circuit; wherein: The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the second capacitor circuit is greater than or equal to 100 MHz; and / or, There are multiple first signal input terminals, some of which are connected to the second capacitor circuit, and the bandwidth of the working frequency band corresponding to the first signal input terminals connected to the second capacitor circuit is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal that is not connected to the second capacitor circuit.

14. The low noise amplifier according to claim 10, characterized in that: The low noise amplifier is arranged on the substrate, the capacitor circuit includes the second capacitor circuit, at least one of the first signal input terminals is connected to the second capacitor circuit, and is used to be connected to the first signal port on the substrate through a first signal link; Wherein, the parasitic impedance of the first signal link is greater than or equal to a first preset impedance, and / or The parasitic impedance of the first signal link is greater than the parasitic impedance of at least one second signal link, and the second signal link is a signal link between the first signal input terminal not connected to the second capacitive circuit and a second signal port on the substrate.

15. The low noise amplifier according to claim 14, characterized in that: The length of the metal routing line of the first signal link is greater than the length of the metal routing line of the second signal link; and / or The first signal chain comprises a filter and at least one of the second signal chains does not comprise a filter.

16. The low noise amplifier according to claim 14, characterized in that: A frequency of an operating frequency band corresponding to the first signal input terminal connected to the second capacitor circuit is lower than a frequency of an operating frequency band corresponding to at least one first signal input terminal not connected to the second capacitor circuit.

17. The low noise amplifier according to claim 10, characterized in that: The capacitor circuit includes the second capacitor circuit, the number of the first signal input terminals is one or more, and at least one of the first signal input terminals is connected to the second capacitor circuit; wherein, The bandwidth of the working frequency band corresponding to the first signal input end connected to the second capacitor circuit is greater than or equal to 100 MHz, and the parasitic impedance of the first signal link corresponding to the first signal input end connected to the second capacitor circuit is greater than or equal to a first preset impedance; or The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the second capacitor circuit is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal not connected to the second capacitor circuit, and the parasitic impedance of the first signal link corresponding to the first signal input terminal connected to the second capacitor circuit is greater than the parasitic impedance of at least one second signal link, and the second signal link is the signal link corresponding to the first signal input terminal not connected to the second capacitor circuit; or The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the second capacitor circuit is greater than or equal to 100 MHz, and the parasitic impedance of the first signal link corresponding to the first signal input terminal connected to the second capacitor circuit is greater than the parasitic impedance of at least one second signal link; or The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the second capacitor circuit is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal not connected to the second capacitor circuit, and the parasitic impedance of the first signal link corresponding to the first signal input terminal connected to the second capacitor circuit is greater than or equal to the first preset impedance.

18. The low noise amplifier according to claim 13, characterized in that: The number of the first signal input terminals is multiple, the capacitor circuit includes multiple second capacitor circuits, and some of the first signal input terminals are connected to the second capacitor circuits; The capacitance value of the second capacitance circuit is negatively correlated with the parasitic impedance of the signal link of the first signal input end corresponding to the second capacitance circuit; or Among the multiple first signal input terminals connected to the second capacitor circuit, the second capacitor circuit corresponding to the first signal input terminal whose parasitic impedance of the signal link is greater than or equal to the second preset impedance is controlled to be in a disconnected state, and the second capacitor circuit corresponding to the first signal input terminal whose parasitic impedance of the signal link is less than the second preset impedance is controlled to be in a conductive state.

19. The low noise amplifier according to claim 10, characterized in that: The capacitance value of the second capacitance circuit is 1 femtofarad to 999 femtofarad.

20. The low noise amplifier according to claim 10, characterized in that: The third capacitor circuit includes multiple capacitors and switching switches corresponding to each of the capacitors. The switching switches are connected in series with the corresponding capacitors, and when the switching switches are turned on, the corresponding capacitors can be switched to be connected between the first signal input terminal and the third terminal of the amplifier circuit.

21. The low noise amplifier according to claim 10, characterized in that: The capacitor circuit includes the third capacitor circuit, the number of the first signal input terminals is one or more, and at least one of the first signal input terminals is connected to the third capacitor circuit; wherein: The bandwidth of the working frequency band corresponding to the first signal input terminal connected to the third capacitor circuit is greater than or equal to 100 MHz, and / or there are multiple first signal input terminals, some of the first signal input terminals are connected to the third capacitor circuit, and the bandwidth of the working frequency band corresponding to the first signal input terminal connected to the third capacitor circuit is greater than the bandwidth of the working frequency band corresponding to at least one first signal input terminal not connected to the first capacitor circuit; and The parasitic impedance of the first signal link corresponding to the first signal input end connected to the third capacitor circuit is less than or equal to the first preset impedance, and / or the parasitic impedance of the first signal link connected to the third capacitor circuit is less than the parasitic impedance of at least one third signal link, and the third signal link is a signal link corresponding to the first signal input end that is not connected to the third capacitor circuit.

22. The low noise amplifier according to claim 10, characterized in that: The capacitance value of the third capacitance circuit is adjusted in the range of 1 femtofarad to 2 picofarads.

23. The low noise amplifier according to claim 10, characterized in that: The low noise amplifier is arranged on a substrate, and an external signal input port, an antenna port and a filter are also arranged on the substrate. The capacitor circuit includes the third capacitor circuit, the number of the first signal input terminals is one or more, and at least one of the first signal input terminals is connected to the third capacitor circuit; wherein: At least one of the first signal input terminals connected to the third capacitor circuit is used to connect to an external signal input port; At least one signal input terminal not connected to the third capacitor circuit is used to connect to the antenna port on the substrate through the filter.

24. The low noise amplifier according to claim 23, characterized in that: The length of the metal wiring between the first signal input terminal and the external signal input port is greater than or equal to 300 micrometers.

25. The low noise amplifier according to any one of claims 1 to 4, characterized in that: The low noise amplifier further comprises a regulating circuit, and the third terminal of the amplifying circuit is grounded through the regulating circuit.

26. The low noise amplifier according to claim 25, characterized in that: The adjustment circuit is configured to adjust the gain of the amplification circuit.

27. A radio frequency front-end module, characterized in that: The radio frequency front-end module includes a plurality of input matching inductors and a low noise amplifier as described in any one of claims 1 to 26.

28. An electronic device, characterized in that: The electronic device comprises a low noise amplifier as described in any one of claims 1 to 26; or comprises a radio frequency front-end module as described in claim 27.