Semiconductor test structures

Abstract

The present application provides a semiconductor test structure, wherein the first conductive structure includes a first comb handle and at least one first comb tooth portion, and the second conductive structure includes a second comb handle and at least one second comb tooth portion; the extension structure includes a first extension structure disposed on the first comb tooth portion and a second extension structure disposed on the second comb tooth portion, the first extension structure includes at least a first extension portion and a second extension portion intersecting with the first comb tooth portion and extending in the first direction and arranged at intervals in the second direction, and the second extension structure includes at least a third extension portion and a fourth extension portion intersecting with the second comb tooth portion and extending in the first direction and arranged at intervals in the second direction; the first extension portion and the fourth extension portion have an overlapping area in the first direction or the second extension portion and the third extension portion have an overlapping area in the first direction. The present application can more accurately simulate a real complex environment, and the test is more accurate.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor test structure. Background Art

[0002] In the large-scale integrated circuit manufacturing process, as the stacking levels of the front end of line (FEOL) and back end of line (BEOL) increase, the line width and the size of the contact hole (Contact / Via) are getting smaller and smaller, and the interconnection pattern is becoming more and more complex, which poses serious challenges to both the optical proximity correction (OPC) and the manufacturing process. Short circuit (Bridge) failure or open circuit (open) failure often occurs during the device preparation process. In order to monitor the process stability, some test structures (Test keys) will be designed. By conducting electrical tests on the test structures and analyzing the test data, problems can be discovered and solved in a targeted manner.

[0003] In order to effectively monitor the isolation and contact conditions of contact holes, two classic test structures are widely used. One of the test structures has two comb-shaped conductive structures that are alternately interspersed. This test structure can be used to monitor the breakdown between active areas (AA), between gate electrode layers (GATE) or between metal lines (Metal), so as to determine the isolation condition, process limit (Window) or process abnormality (for example, it can determine whether there is photoresist stripping, whether there is an abnormality in etching, whether there are defects falling into the gap, etc.), and reflect the minimum spacing under the current design rules; however, this test structure has certain limitations. It only considers the breakdown of the side to side (Line to Line, LTL) and head to side (Head to Line, HTL) of adjacent wires, and ignores the breakdown of the head to head (Head to Head, HTH), which is somewhat different from the actual situation. Another test structure is the contact hole test structure, which is used to test the resistance of the contact holes. All the contact holes are connected in series through the metal layer, and the resistance obtained by the test is divided by the total number of contact holes to get the resistance value of a single contact hole. However, there are no other structures around the contact holes of this test structure. In actual situations, there are other structures around the contact holes (such as metal layers, etc., which may be located on the same layer as the contact holes or on different layers). These structures will also affect the morphology of the contact holes and thus affect the resistance of the contact holes. Therefore, a single contact hole test structure cannot simulate the actual situation, nor can it monitor the OPC and process loading effects of adjacent structures on the contact holes. Summary of the invention

[0004] The purpose of the present application is to provide a semiconductor test structure to solve the problem that the existing semiconductor test structure cannot monitor the end-to-end breakdown of adjacent wires.

[0005] In order to achieve the above-mentioned object, the present application provides a semiconductor test structure, including a first conductive structure and a second conductive structure;

[0006] The first conductive structure includes a first comb handle and at least one first comb tooth portion, the second conductive structure includes a second comb handle and at least one second comb tooth portion, the first comb handle and the second comb tooth portion both extend along a first direction, the first comb tooth portion and the second comb tooth portion both extend along a second direction and are alternately arranged in the first direction;

[0007] At least one group of adjacent first comb-tooth portions and second comb-tooth portions has at least one extension structure, the extension structure includes a first extension structure provided on the first comb-tooth portion and a second extension structure provided on the second comb-tooth portion, the first extension structure at least includes a first extension portion and a second extension portion intersecting with the first comb-tooth portion and extending along the first direction and arranged at intervals along the second direction, the second extension structure at least includes a third extension portion and a fourth extension portion intersecting with the second comb-tooth portion and extending along the first direction and arranged at intervals along the second direction; and,

[0008] The first extension portion is aligned with the third extension portion in the first direction, the second extension portion is aligned with the fourth extension portion in the first direction, the first extension portion and the fourth extension portion have an overlapping area in the first direction, or the second extension portion and the third extension portion have an overlapping area in the first direction.

[0009] Optionally, in the same extension structure, the first extension portion and the third extension portion are spaced apart by a minimum spacing in the first direction under current design rules, and the second extension portion and the fourth extension portion are spaced apart by a minimum spacing in the first direction under current design rules; and

[0010] The first extension portion and the fourth extension portion are spaced apart by a minimum distance in the second direction under current design rules, and the second extension portion and the third extension portion are spaced apart by a minimum distance in the second direction under current design rules.

[0011] Optionally, the first extension portion and the fourth extension portion have the same length in the first direction, and the second extension portion and the third extension portion have the same length in the first direction.

[0012] Optionally, each group of adjacent first comb-tooth portions and second comb-tooth portions has the extension structure.

[0013] Optionally, a plurality of the first extension structures are provided on the first comb tooth portion, and the first extension structures are arranged at equal intervals along the second direction; a plurality of the second extension structures corresponding one-to-one to the first extension structures are provided on the second comb tooth portion, and the second extension structures are arranged at equal intervals along the second direction.

[0014] Optionally, the end of the first comb handle has a first test pad, and the end of the second comb handle has a second test pad, and different voltages are applied to the first test pad and the second test pad to test the breakdown voltage between the first conductive structure and the second conductive structure and / or obtain the breakdown condition between the first conductive structure and the second conductive structure at a predetermined voltage.

[0015] Optionally, the semiconductor test structure also includes a third conductive structure, which is located between at least one group of adjacent first comb-tooth portions and second comb-tooth portions, and the third conductive structure includes at least one strip portion extending along the first direction, and the strip portion includes a conductive layer extending along the first direction and contact holes located at both ends of the conductive layer, and the two contact holes are electrically connected through the conductive layer.

[0016] Optionally, the third conductive structure is disposed between two adjacent extension structures in the second direction.

[0017] Optionally, the third conductive structure includes at least two strip-shaped portions, and the two strip-shaped portions are spaced apart from the adjacent extension structure by the minimum spacing under the current design rules in the second direction, and the two adjacent strip-shaped portions are spaced apart from each other by the minimum spacing under the current design rules in the second direction.

[0018] Optionally, all the contact holes are connected in series through a metal layer to form a test circuit.

[0019] Optionally, the contact holes are divided into a plurality of groups, and all the contact holes in each group are connected in series through a metal layer to form at least two independent test circuits.

[0020] Optionally, at least the contact holes belonging to the same column in the first direction are grouped together.

[0021] Optionally, the contact holes in a corresponding column in the third conductive structures belonging to the same column in the first direction are grouped into one group.

[0022] Optionally, a third test pad and a fourth test pad are respectively provided at two ends of the test circuit.

[0023] Optionally, the first conductive structure, the second conductive structure and the conductive layer are an nth metal wiring layer, the metal layer is an n+1th metal wiring layer, and n is greater than or equal to 1;

[0024] Alternatively, the first conductive structure, the second conductive structure and the conductive layer are active areas, and the metal layer is a first metal wiring layer;

[0025] Alternatively, the first conductive structure, the second conductive structure and the conductive layer are gate electrode layers, and the metal layer is a first metal wiring layer.

[0026] Optionally, the first conductive structure, the second conductive structure and the conductive layer in part of the test circuits are active areas, the conductive layer in another part of the test circuits is a gate electrode layer, and the metal layer is a first metal wiring layer;

[0027] Alternatively, the first conductive structure, the second conductive structure and the conductive layer in a part of the test circuit are gate electrode layers, the conductive layer in another part of the test circuit is an active area, and the metal layer is a first metal wiring layer.

[0028] In the semiconductor test structure provided in the present application, a first conductive structure and a second conductive structure are included; the first conductive structure includes a first comb handle portion and at least one first comb tooth portion, the second conductive structure includes a second comb handle portion and at least one second comb tooth portion, the first comb handle portion and the second comb handle portion both extend along a first direction, the first comb tooth portion and the second comb tooth portion both extend along a second direction and are alternately arranged in the first direction; at least one group of adjacent first comb tooth portions and second comb tooth portions has an extension structure, the extension structure includes a first extension structure arranged on the first comb tooth portion and a second extension structure arranged on the second comb tooth portion, the first comb tooth portion and the second comb tooth portion are both extended in a second direction and arranged alternately in the first direction. An extension structure at least includes a first extension part and a second extension part intersecting with the first comb-tooth part and extending along the first direction and arranged at intervals along the second direction, and the second extension structure at least includes a third extension part and a fourth extension part intersecting with the second comb-tooth part and extending along the first direction and arranged at intervals along the second direction; and the first extension part is aligned with the third extension part in the first direction, the second extension part is aligned with the fourth extension part in the first direction, the first extension part and the fourth extension part have an overlapping area in the first direction or the second extension part and the third extension part have an overlapping area in the first direction. The semiconductor test structure in the present application can monitor the breakdown of the side to side (Line to Line, LTL), head to side (Head to Line, HTL) and head to head (Head to Head, HTH) of the adjacent wires, and can more accurately simulate the real complex environment, and the test is more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of the structure of a semiconductor test structure provided in an embodiment of the present application;

[0030] Figure 2 A schematic diagram of another semiconductor test structure provided in an embodiment of the present application;

[0031] Figure 3 A first schematic diagram of a semiconductor test structure provided by an embodiment of the present application during testing;

[0032] Figure 4 A second schematic diagram of the semiconductor test structure provided by an embodiment of the present application during testing;

[0033] Figure 5 A third schematic diagram of the semiconductor test structure provided by an embodiment of the present application during testing;

[0034] Figure 6 A fourth schematic diagram of the semiconductor test structure provided by an embodiment of the present application during testing;

[0035] Wherein, the accompanying drawings are marked as follows:

[0036] 101-first comb handle; 102-first comb tooth; 201-second comb handle; 202-second comb tooth; 300-extension structure; 301-first extension; 302-second extension; 303-third extension; 304-fourth extension; 401-first test pad; 402-second test pad; 500-third conductive structure; 501-conductive layer; 502-contact hole; 601-third test pad; 602-fourth test pad; 700-metal layer; x-first direction, y-second direction. DETAILED DESCRIPTION

[0037] The specific implementation of the present application will be described in more detail below in conjunction with the schematic diagram. Based on the following description, the advantages and features of the present application will become clearer. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present application.

[0038] Figure 1 The schematic diagram of the semiconductor test structure provided in this embodiment. Figure 1 As shown, the semiconductor test structure includes a first conductive structure and a second conductive structure, the first conductive structure and the second conductive structure are both comb-shaped, and the first conductive structure and the second conductive structure are interlaced with each other, and the first conductive structure and the second conductive structure can correspond to an active area, a gate electrode layer or a metal line. Specifically, the first conductive structure includes a first comb handle portion 101 and at least one first comb tooth portion 102, and the second conductive structure includes a second comb handle portion 201 and at least one second comb tooth portion 202. The first comb handle portion 101 and the second comb handle portion 201 both extend along a first direction x, and the first comb tooth portion 102 and the second comb tooth portion 202 both extend along a second direction y and are alternately arranged in the first direction x. Figure 1 It is shown in the figure that the first conductive structure includes three first comb-tooth portions 102 , the second conductive structure includes three second comb-tooth portions 202 , and the three first comb-tooth portions 102 and the three second comb-tooth portions 202 are interlaced with each other, but the present invention should not be limited thereto.

[0039] Further, at least one group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202 has an extension structure 300. In this embodiment, each group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202 has an extension structure 300. In this way, the semiconductor test structure is more symmetrical and symmetrical, and increasing the number of the extension structures 300 can also improve the test accuracy. However, it should be understood that each group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202 is not limited to having the extension structure 300, and a part of the adjacent first comb-tooth portions 102 and second comb-tooth portions 202 may have the extension structure 300, and another part of the adjacent first comb-tooth portions 102 and second comb-tooth portions 202 may not have the extension structure 300.

[0040] Please continue reading Figure 1 The extension structure 300 includes a first extension structure disposed on the first comb-tooth portion 102 and a second extension structure disposed on the second comb-tooth portion 202. The first extension structure at least includes a first extension portion 301 and a second extension portion 302 intersecting the first comb-tooth portion 102. The first extension portion 301 and the second extension portion 302 extend along the first direction x and are arranged at intervals along the second direction y. The second extension structure at least includes a third extension portion 303 and a fourth extension portion 304 intersecting the second comb-tooth portion 202. The third extension portion 303 and the fourth extension portion 304 extend along the first direction x and are arranged at intervals along the second direction y. In addition, the first extension portion 301 is aligned with the third extension portion 303 in the first direction x, and the second extension portion 302 is aligned with the fourth extension portion 304 in the first direction x. In this embodiment, the length of the first extension portion 301 in the first direction x is greater than the length of the third extension portion 303 in the first direction x, the length of the fourth extension portion 304 in the first direction x is greater than the length of the second extension portion 302 in the first direction x, and the length of the first extension portion 301 in the first direction x is equal to the length of the fourth extension portion 304 in the first direction x, and the length of the second extension portion 302 in the first direction x is equal to the length of the third extension portion 303 in the first direction x. That is, the length of the first extension portion 301 in the first direction x is complementary to the length of the third extension portion 303 in the first direction x, and the length of the second extension portion 302 in the first direction x is also complementary to the length of the fourth extension portion 304 in the first direction x, so that the first extension portion 301 and the fourth extension portion 304 have an overlapping area in the first direction x, that is, the first extension portion 301 and the fourth extension portion 304 have areas opposite to each other in the first direction x.

[0041] In some embodiments, the length of the first extension portion 301 in the first direction x may be smaller than the length of the third extension portion 303 in the first direction x, and the length of the fourth extension portion 304 in the first direction x may be smaller than the length of the second extension portion 302 in the first direction x, and the length of the first extension portion 301 in the first direction x is equal to the length of the fourth extension portion 304 in the first direction x, and the length of the second extension portion 302 in the first direction x is equal to the length of the third extension portion 303 in the first direction x. That is, the length of the first extension portion 301 in the first direction x is complementary to the length of the third extension portion 303 in the first direction x, and the length of the second extension portion 302 in the first direction x is also complementary to the length of the fourth extension portion 304 in the first direction x, so that the second extension portion 302 and the third extension portion 303 may have an overlapping area in the first direction x, that is, the second extension portion 302 and the third extension portion 303 have areas opposite to each other in the first direction x.

[0042] Of course, in some embodiments, the lengths of the first extension portion 301 and the fourth extension portion 304 in the first direction x may not be equal, and the lengths of the second extension portion 302 and the third extension portion 303 in the first direction x may not be equal, as long as the first extension portion 301 and the fourth extension portion 304 have an overlapping area in the first direction x or the second extension portion 302 and the third extension portion 303 have an overlapping area in the first direction x.

[0043] It can be understood that the first extension structure and the second extension structure may also have other extension parts, and the lengths of the other extension parts of the first extension structure and the second extension structure in the first direction x may also be complementary.

[0044] Please continue reading Figure 1 In this embodiment, the first comb-tooth portion 102 is provided with a plurality of the first extension structures, which are arranged at equal intervals along the second direction y; the second comb-tooth portion 202 is provided with a plurality of the second extension structures corresponding to the first extension structures, which are arranged at equal intervals along the second direction y. However, this should not be limited to the above, and the first comb-tooth portion 102 may also be provided with only one first extension structure, and in this case, the second comb-tooth portion 202 may also be provided with only one second extension structure.

[0045] Further, the first extension portion 301 and the third extension portion 303 are spaced apart by the minimum spacing under the current design rule in the first direction x, and the second extension portion 302 and the fourth extension portion 304 are spaced apart by the minimum spacing under the current design rule in the first direction x. The first extension portion 301 and the fourth extension portion 304 are spaced apart by the minimum spacing under the current design rule in the second direction y, and the second extension portion 302 and the third extension portion 303 are spaced apart by the minimum spacing under the current design rule in the second direction y. The end of the first comb handle portion 101 has a first test pad 401, and the end of the second comb handle portion 201 has a second test pad 402.

[0046] Please continue reading Figure 1 The semiconductor test structure further includes a third conductive structure 500, and the third conductive structure 500 is located between at least one group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202. The third conductive structure 500 includes at least one strip-shaped portion extending along the first direction x, and the strip-shaped portion includes a conductive layer 501 extending along the first direction x and contact holes 502 located at both ends of the conductive layer 501, and the two contact holes 502 are electrically connected through the conductive layer 501. The conductive layer 501 can be a metal line or an active area, and the contact hole 502 can be located above the conductive layer 501.

[0047] In this embodiment, the third conductive structure 500 is provided between each group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202. In this way, the semiconductor test structure is more symmetrical and symmetrical, and increasing the number of the third conductive structures 500 can also improve the test accuracy. However, it should be understood that each group of adjacent first comb-tooth portions 102 and second comb-tooth portions 202 is not limited to having the third conductive structure 500, and a portion of the adjacent first comb-tooth portions 102 and second comb-tooth portions 202 may have the third conductive structure 500, and another portion of the adjacent first comb-tooth portions 102 and second comb-tooth portions 202 may not have the third conductive structure 500.

[0048] Furthermore, the third conductive structure 500 is disposed between two adjacent extension structures 300 in the second direction y, thereby further increasing the number of the third conductive structures 500 , but the present invention should not be limited thereto.

[0049] In some embodiments, each of the third conductive structures 500 may include at least two strip-shaped portions, and the two strip-shaped portions and the adjacent extension structures 300 are spaced apart in the second direction y by the minimum spacing under the current design rules, and the two adjacent strip-shaped portions are spaced apart in the second direction y by the minimum spacing under the current design rules. Figure 1 In the embodiment, the leftmost strip portion of each of the third conductive structures 500 and the edges of the second extension portion 302 and the fourth extension portion 304 of the adjacent extension structure 300 are spaced apart by the minimum spacing under the current design rules in the second direction y, and the rightmost strip portion of each of the third conductive structures 500 and the edges of the first extension portion 301 and the third extension portion 303 of the adjacent extension structure 300 are spaced apart by the minimum spacing under the current design rules in the second direction y.

[0050] In some embodiments, each of the third conductive structures 500 may also include only one strip-shaped portion. In this case, the strip-shaped portion may be spaced apart from the adjacent extension structure 300 on its left side in the second direction y by the minimum spacing under the current design rules, or may be spaced apart from the adjacent extension structure 300 on its right side in the second direction y by the minimum spacing under the current design rules; or, when the distance between two adjacent extension structures 300 in the second direction y is small, the strip-shaped portion may be spaced apart from the adjacent extension structures 300 on its left and right sides in the second direction y by the minimum spacing under the current design rules.

[0051] Further, each column of the contact holes 502 in each column of the third conductive structures 500 in the first direction x is connected in series through the metal layer 700 and then connected in series with the contact holes 502 in the corresponding column of the third conductive structures 500 in other columns through the metal layer 700 to form at least one test circuit. Specifically, in this embodiment, there are 4 columns of the third conductive structures 500 in the first direction x, and each column of the third conductive structures 500 has three columns of contact holes 502. Each column of the contact holes 502 in each column of the third conductive structures 500 is connected in series through the metal layer 700 and then connected in series with one column of the contact holes 502 in the other three columns of the third conductive structures 500, so that three independent test circuits can be formed. The third test pad 601 and the fourth test pad 602 are respectively provided at both ends of each of the test circuits.

[0052] Figure 2 FIG. 1 is a schematic diagram of another semiconductor test structure provided in this embodiment. Figure 2As shown, no matter how many strip-shaped portions are in the third conductive structure 500 or how many third conductive structures 500 are in the semiconductor test structure, in some embodiments, all the contact holes 502 can be connected in series through the metal layer 700 to form a test circuit.

[0053] In summary, the third conductive structure 500 can be used in the semiconductor test structure to form one or more test circuits. When multiple test circuits are formed, when one test circuit cannot be used, other test circuits can continue to be tested to provide margin for the test. Multiple test circuits can also be used to perform the same or different types of tests at the same time, thereby improving test efficiency or test diversity.

[0054] In some embodiments, the first conductive structure, the second conductive structure and the conductive layer 501 may be an nth metal wiring layer, and the metal layer 700 may be an n+1th metal wiring layer, where n is greater than or equal to 1.

[0055] In some embodiments, the first conductive structure, the second conductive structure and the conductive layer 501 may be active regions, and the metal layer 700 may be a first metal wiring layer.

[0056] In some embodiments, the first conductive structure, the second conductive structure and the conductive layer 501 may be gate electrode layers, and the metal layer 700 may be a first metal wiring layer.

[0057] In some embodiments, the first conductive structure, the second conductive structure and the conductive layer 501 in part of the test circuit may be an active area, the conductive layer 501 in another part of the test circuit may be a gate electrode layer, and the metal layer 700 may be a first metal wiring layer. In this case, the test circuit should have at least two.

[0058] In some embodiments, the first conductive structure, the second conductive structure and the conductive layer 501 in part of the test circuit may be a gate electrode layer, the conductive layer 501 in another part of the test circuit may be an active area, and the metal layer 700 may be a first metal wiring layer. In this case, the test circuit should have at least two.

[0059] Next, an example will be given to explain how the semiconductor test structure in this embodiment performs a test.

[0060] Figure 3 The first schematic diagram of the semiconductor test structure provided in this embodiment during testing. Figure 3As shown, the first conductive structure and the second conductive structure may be, for example, a metal wiring layer, an active region or a gate electrode layer of the same layer. When the semiconductor test structure is tested, all of the third test pads 601 and the fourth test pads 602 may be floated, and then different voltages may be applied to the first test pads 401 and the second test pads 402 (for example, a high voltage may be applied to the first test pads 401 and a low voltage may be applied to the second test pads 402) to test the breakdown voltage ( Figure 3 The blue and yellow parts in the middle are adjacent wires). At this time, the semiconductor test structure can monitor the breakdown of the adjacent wires from side to side (Line to Line, LTL), head to side (Head to Line, HTL) and head to head (Head to Head, HTH), and comprehensively considers the impact of the breakdown of the adjacent wires from side to side (Line to Line, LTL), head to side (Head to Line, HTL) and head to head (Head to Head, HTH) on OPC and process, and can more accurately reflect the real complex environment of the device during the preparation process, and the test is more accurate; at the same time, the semiconductor test structure can also test the breakdown voltage between the first conductive structure and the second conductive structure, so as to determine whether the isolation layer between the metal wiring layers, between the active areas or between the gate electrode layers of the same layer is normal. Generally speaking, if the actual breakdown voltage is less than or equal to 4Vop (Vop is the preset breakdown voltage), it means that there is a short circuit problem between the metal wiring layers, between the active areas or between the gate electrode layers of the same layer.

[0061] Figure 4 This is a second schematic diagram of the semiconductor test structure provided in this embodiment when performing a test. Figure 4 As shown, the first conductive structure, the second conductive structure and the conductive layer 501 can be, for example, a first metal wiring layer, and the metal layer 700 is a second metal wiring layer. When the semiconductor test structure is tested, a high voltage can be applied to the first test pad 401 and the second test pad 402, and two test lines (the test lines close to the first conductive structure and the second conductive structure, i.e. Figure 4The third test pad 601 and the fourth test pad 602 at both ends of the red and green test lines in the middle are applied with low voltage, and the third test pad 601 and the fourth test pad 602 at both ends of the remaining test line are floating. At this time, the semiconductor test structure can monitor the breakdown between the conductive layer 501 with the contact hole 502 and the first conductive structure and the second conductive structure. For example, if the breakdown voltage between the first conductive structure and the second conductive structure is normal (by Figure 3 ), but the breakdown voltage between the conductive layer 501 with the contact hole 502 and the first conductive structure and the second conductive structure is less than or equal to 4Vop, it is necessary to improve the process of forming the conductive layer 501; at the same time, the test structure can also monitor online and discover the weak point of the breakdown voltage between the conductive layer 501 with the contact hole 502 and the first conductive structure and the second conductive structure in advance.

[0062] Since this embodiment has three test circuits, even if two test circuits are damaged when testing the breakdown between the conductive layer 501 with the contact hole 502 and the first conductive structure and the second conductive structure, there will still be one test circuit left that can be used normally, and other types of tests can be performed.

[0063] Figure 5 This is a third schematic diagram of the semiconductor test structure provided in this embodiment when performing a test. Figure 5 As shown, the first conductive structure, the second conductive structure and the conductive layer 501 may be, for example, a first metal wiring layer, the metal layer 700 is a second metal wiring layer, and the semiconductor test structure may be tested on any test line ( Figure 5 Different voltages are applied to the third test pad 601 and the fourth test pad 602 at both ends of the test circuit (the blue test circuit in the middle) (for example, a high voltage can be applied to one of the third test pads 601, and a low voltage can be applied to the other fourth test pad 602), and the first test pad 401, the second test pad 402 and the other third test pads 601 and the fourth test pad 602 are floating. At this time, the resistance of the contact hole 502 can be tested, and there are other structures around the contact hole 502 that affect the morphology of the contact hole 502 (such as the first conductive structure and the second conductive structure), and the OPC and process load effects of the adjacent structures on the contact hole 502 can be monitored to achieve better process window monitoring. In addition, the semiconductor test structure integrates the two existing test structures, which can save area and improve monitoring efficiency ( Figure 3 , Figure 4 , Figure 5 The testing method can be performed simultaneously).

[0064] Figure 6 This is a fourth schematic diagram of the semiconductor test structure provided in this embodiment when performing a test. Figure 6 As shown, the first conductive structure, the second conductive structure and the conductive layer 501 may be, for example, a first metal wiring layer, the metal layer 700 is a second metal wiring layer, and the semiconductor test structure may be tested on multiple test lines ( Figure 6 Different voltages are applied to the third test pad 601 and the fourth test pad 602 at both ends of the test circuit (red, yellow and green test circuits in the middle) (for example, a high voltage can be applied to one of the third test pads 601, and a low voltage can be applied to the other fourth test pad 602), the first test pad 401 and the second test pad 402 (floating). At this time, the resistances of the contact hole 502 obtained by testing multiple test circuits can be compared to examine the local density effect of the contact hole 502.

[0065] It should be noted that the semiconductor test structure is not only applicable to Cu process technology nodes (such as 65nm, 55nm, 40nm, 28nm and other process technology nodes), but can also be used for Al process technology nodes (such as 0.18um, 0.11um and other process technology nodes), and is not limited to semiconductor IC process platforms such as GaAs and GaN.

[0066] In summary, the semiconductor test structure provided in the embodiment of the present application includes a first conductive structure and a second conductive structure; the first conductive structure includes a first comb handle portion 101 and at least one first comb tooth portion 102, the second conductive structure includes a second comb handle portion 201 and at least one second comb tooth portion 202, the first comb handle portion 101 and the second comb handle portion 201 both extend along a first direction x, the first comb tooth portion 102 and the second comb tooth portion 202 both extend along a second direction y and are alternately arranged in the first direction x; at least one group of adjacent first comb tooth portions 102 and second comb tooth portions 202 has an extension structure 300, the extension structure 300 includes a first extension structure provided on the first comb tooth portion 102 and a second extension structure provided on the second comb tooth portion 202, the The first extension structure at least includes a first extension portion 301 and a second extension portion 302 which intersect with the first comb-tooth portion 102, extend along the first direction x, and are arranged at intervals along the second direction y; the second extension structure at least includes a third extension portion 303 and a fourth extension portion 304 which intersect with the second comb-tooth portion 202, extend along the first direction x, and are arranged at intervals along the second direction y; and, the first extension portion 301 is aligned with the third extension portion 303 in the first direction x, the second extension portion 302 is aligned with the fourth extension portion 304 in the first direction x, the first extension portion 301 and the fourth extension portion 304 have an overlapping area in the first direction x, or the second extension portion 302 and the third extension portion 303 have an overlapping area in the first direction x. The semiconductor test structure in the present application can monitor the breakdown conditions of the side-to-side (Line to Line, LTL), head to line (Head to Line, HTL) and head to head (Head to Head, HTH) of adjacent wires, and can more accurately simulate the real complex environment, making the test more accurate.

[0067] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0068] It should also be noted that, although the present application has been disclosed as above with preferred embodiments, the above embodiments are not intended to limit the present application. For any technician familiar with the art, without departing from the scope of the technical solution of the present application, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present application, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still falls within the scope of protection of the technical solution of the present application.

[0069] It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are merely used to distinguish between the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0070] It should also be recognized that the terms described herein are only used to describe specific embodiments and are not used to limit the scope of the present application. It should be noted that the singular forms "one" and "a kind" used herein and in the appended claims include plural references unless the context clearly indicates the opposite meaning. For example, a reference to "a step" or "a device" means a reference to one or more steps or devices, and may include secondary steps and secondary devices. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have a definition of logical "or", rather than a definition of logical "exclusive or", unless the context clearly indicates the opposite meaning. In addition, the implementation of the method and / or device in the embodiment of the present application may include performing the selected task manually, automatically, or in combination.

Claims

1. A semiconductor test structure, characterized in that: comprising a first conductive structure and a second conductive structure; The first conductive structure includes a first comb handle and at least one first comb tooth portion, the second conductive structure includes a second comb handle and at least one second comb tooth portion, the first comb handle and the second comb handle both extend along a first direction, the first comb tooth portion and the second comb tooth portion both extend along a second direction and are alternately arranged in the first direction; At least one group of adjacent first comb-tooth portions and second comb-tooth portions has at least one extension structure, the extension structure includes a first extension structure provided on the first comb-tooth portion and a second extension structure provided on the second comb-tooth portion, the first extension structure at least includes a first extension portion and a second extension portion intersecting with the first comb-tooth portion and extending along the first direction and arranged at intervals along the second direction, the second extension structure at least includes a third extension portion and a fourth extension portion intersecting with the second comb-tooth portion and extending along the first direction and arranged at intervals along the second direction; and, The first extension portion is aligned with the third extension portion in the first direction, the second extension portion is aligned with the fourth extension portion in the first direction, the first extension portion and the fourth extension portion have an overlapping area in the first direction, or the second extension portion and the third extension portion have an overlapping area in the first direction.

2. The semiconductor test structure according to claim 1, wherein: In the same extension structure, the first extension portion and the third extension portion are spaced apart by a minimum spacing in the first direction under current design rules, and the second extension portion and the fourth extension portion are spaced apart by a minimum spacing in the first direction under current design rules; as well as, The first extension portion and the fourth extension portion are spaced apart by a minimum distance in the second direction under current design rules, and the second extension portion and the third extension portion are spaced apart by a minimum distance in the second direction under current design rules.

3. The semiconductor test structure according to claim 1, wherein: The first extension portion and the fourth extension portion have the same length in the first direction, and the second extension portion and the third extension portion have the same length in the first direction.

4. The semiconductor test structure according to claim 1, wherein: Each group of adjacent first comb-tooth portions and second comb-tooth portions has the extension structure.

5. The semiconductor test structure according to claim 1, wherein: The first comb-tooth portion is provided with a plurality of the first extension structures, which are arranged at equal intervals along the second direction; the second comb-tooth portion is provided with a plurality of the second extension structures corresponding one by one to the first extension structures, which are arranged at equal intervals along the second direction.

6. The semiconductor test structure according to any one of claims 1 to 5, characterized in that: The end of the first comb handle has a first test pad, and the end of the second comb handle has a second test pad. Different voltages are applied to the first test pad and the second test pad to test the breakdown voltage between the first conductive structure and the second conductive structure and / or obtain the breakdown condition between the first conductive structure and the second conductive structure at a predetermined voltage.

7. The semiconductor test structure according to claim 1, wherein: The semiconductor test structure also includes a third conductive structure, which is located between at least one group of adjacent first comb-tooth portions and second comb-tooth portions, and includes at least one strip-shaped portion extending along the first direction, and the strip-shaped portion includes a conductive layer extending along the first direction and contact holes located at both ends of the conductive layer, and the two contact holes are electrically connected through the conductive layer.

8. The semiconductor test structure according to claim 7, wherein: The third conductive structure is disposed between two adjacent extending structures in the second direction.

9. The semiconductor test structure according to claim 8, characterized in that: The third conductive structure includes at least two strip-shaped portions, the two strip-shaped portions and the adjacent extension structure are spaced apart in the second direction by a minimum spacing under current design rules, and two adjacent strip-shaped portions are spaced apart in the second direction by a minimum spacing under current design rules.

10. The semiconductor test structure according to claim 7, characterized in that: All the contact holes are connected in series through the metal layer to form a test circuit.

11. The semiconductor test structure according to claim 7, characterized in that: The contact holes are divided into multiple groups, and all the contact holes in each group are connected in series through a metal layer to form at least two independent test circuits.

12. The semiconductor test structure according to claim 11, wherein: At least the contact holes belonging to the same column in the first direction are grouped into one group.

13. The semiconductor test structure according to claim 12, wherein: The contact holes in a corresponding column in the third conductive structures belonging to the same column in the first direction are grouped into one group.

14. The semiconductor test structure according to any one of claims 10 to 13, characterized in that: The two ends of the test circuit are respectively provided with a third test pad and a fourth test pad.

15. The semiconductor test structure according to claim 10 or 11, characterized in that: The first conductive structure, the second conductive structure and the conductive layer are an nth metal wiring layer, the metal layer is an n+1th metal wiring layer, and n is greater than or equal to 1; Alternatively, the first conductive structure, the second conductive structure and the conductive layer are active areas, and the metal layer is a first metal wiring layer; Alternatively, the first conductive structure, the second conductive structure and the conductive layer are gate electrode layers, and the metal layer is a first metal wiring layer.

16. The semiconductor test structure according to claim 11, wherein: The first conductive structure, the second conductive structure and the conductive layer in a part of the test circuit are active areas, the conductive layer in another part of the test circuit is a gate electrode layer, and the metal layer is a first metal wiring layer; Alternatively, the first conductive structure, the second conductive structure and the conductive layer in a part of the test circuit are gate electrode layers, the conductive layer in another part of the test circuit is an active area, and the metal layer is a first metal wiring layer.

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