Signal processing apparatus and control method

Abstract

A retimer (10) (signal processing device) is provided with: a reception unit (110) for receiving a signal; a transmission unit (120) that transmits the signal received by the reception unit (110); and a control unit (100). The receiving unit (110) has an equalizer circuit that compensates for attenuation of a received signal. The transmission unit (120) has a noise cancellation circuit that suppresses noise included in the signal processed by the reception unit (110). The control unit (100) detects a threshold voltage of a transistor included in the retimer (10). When the detected threshold voltage is equal to or less than a predetermined voltage value, the current of the equalizer circuit is set to be equal to or less than a predetermined current value, and the noise cancelling circuit is deactivated; when the detected threshold voltage is larger than a predetermined voltage value, the current of the equalizer circuit is set to be larger than a predetermined current value, and the noise cancelling circuit is activated.

Description

Technical Field

[0001] The present invention relates to a signal processing device that performs signal processing on a received signal and transmits the signal, and a control method of the signal processing device. Background Art

[0002] Patent Document 1 discloses a noise canceling circuit including a first parallel-serial conversion circuit and a first driver, and a second parallel-serial conversion circuit and a second driver that are similar in order to suppress power supply noise caused by a data pattern.

[0003] Patent Document 2 discloses the use of an equalizer circuit to restore an attenuated waveform.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent No. 6837549

[0007] Patent Document 2: U.S. Patent No. 9806915 Summary of the invention

[0008] Problems to be solved by the invention

[0009] When a signal processing device such as a retimer is mounted on a cable, low power consumption is required to suppress heat generation and fire. However, in the technology disclosed in Patent Document 1, since the same circuit is used, the power consumption is increased accordingly. In addition, in the technology disclosed in Patent Document 2, a fixed current is consumed to restore the attenuated waveform.

[0010] Therefore, the present disclosure provides a signal processing device and the like capable of suppressing power consumption.

[0011] Means used to solve problems

[0012] The signal processing device disclosed in the present invention comprises: a receiving unit for receiving a signal; a transmitting unit for transmitting the signal received by the receiving unit; and a control unit; the receiving unit comprises an equalizer circuit for compensating for the attenuation of the received signal; the transmitting unit comprises a noise elimination circuit for suppressing the noise contained in the signal processed by the receiving unit; the control unit detects the threshold voltage of the transistor contained in the signal processing device; when the detected threshold voltage is below a prescribed voltage value, the current of the equalizer circuit is set to below a prescribed current value, and the noise elimination circuit is deactivated; when the detected threshold voltage is greater than the prescribed voltage value, the current of the equalizer circuit is set to be greater than the prescribed current value, and the noise elimination circuit is activated.

[0013] The control method disclosed in the present invention is a control method for a signal processing device, wherein the signal processing device comprises: a receiving unit for receiving a signal; and a transmitting unit for transmitting the signal received by the receiving unit; the receiving unit comprises an equalizer circuit for compensating for attenuation of the received signal; the transmitting unit comprises a noise elimination circuit for suppressing noise contained in the signal processed by the receiving unit; the control method comprises: a step of determining whether a threshold voltage of a transistor included in the signal processing device is below a prescribed voltage value; if it is determined that the threshold voltage of the transistor included in the signal processing device is below the prescribed voltage value, a step of setting a current of the equalizer circuit to below a prescribed current value and deactivating the noise elimination circuit; if it is determined that the threshold voltage of the transistor included in the signal processing device is greater than the prescribed voltage value, a step of setting a current of the equalizer circuit to greater than a prescribed current value and activating the noise elimination circuit.

[0014] Furthermore, these inclusive or specific aspects may be implemented by systems, methods, integrated circuits, computer programs, or computer-readable recording media such as CD-ROMs, or by any combination of systems, methods, integrated circuits, computer programs, and recording media.

[0015] Effects of the Invention

[0016] According to a signal processing device and the like according to one aspect of the present disclosure, power consumption can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural diagram showing an example of a retimer according to the embodiment.

[0018] Figure 2 It is a structural diagram showing an example of an equalizer circuit according to the embodiment.

[0019] Figure 3 1 is a diagram showing a configuration of an example of a noise cancelling circuit according to an embodiment.

[0020] Figure 4 It is a diagram for explaining the effect of suppressing power consumption.

[0021] Figure 5 It is a structural diagram showing an example of a control unit according to the embodiment.

[0022] Figure 6 This is a circuit diagram showing an example of a process detection circuit according to an embodiment.

[0023] Figure 7 It is a structural diagram showing another example of the control unit according to the embodiment.

[0024] Figure 8 This is a flowchart showing an example of a control method according to another embodiment. DETAILED DESCRIPTION

[0025] A signal processing device according to a technical solution of the present disclosure comprises: a receiving unit for receiving a signal; a transmitting unit for transmitting the signal received by the receiving unit; and a control unit; the receiving unit comprises an equalizer circuit for compensating for the attenuation of the received signal; the transmitting unit comprises a noise elimination circuit for suppressing the noise contained in the signal processed by the receiving unit; the control unit detects the threshold voltage of a transistor contained in the signal processing device; when the detected threshold voltage is below a specified voltage value, the control unit sets the current of the equalizer circuit to below a specified current value and deactivates the noise elimination circuit; when the detected threshold voltage is greater than the specified voltage value, the control unit sets the current of the equalizer circuit to greater than a specified current value and activates the noise elimination circuit.

[0026] When the threshold voltage of the transistor included in the signal processing device is below a prescribed voltage value (in other words, when the threshold voltage of the transistor is low), the power consumption of the signal processing device increases. On the other hand, in this case, the gain of the equalizer circuit increases, and the delay sensitivity decreases and the jitter decreases. Therefore, corresponding to the increase in the gain of the equalizer circuit, the current of the equalizer circuit can be made below a prescribed current value, and the current consumption of the equalizer circuit is reduced. In addition, since the delay sensitivity decreases and the jitter decreases, it is no longer necessary to operate the noise elimination circuit, and the noise elimination circuit can be deactivated. Therefore, when the threshold voltage of the transistor included in the signal processing device is below a prescribed voltage value, power consumption can be suppressed by setting the current of the equalizer circuit to below a prescribed current value and deactivating the noise elimination circuit.

[0027] For example, the control unit may also have: a detection circuit for detecting a threshold voltage of a transistor included in the signal processing device; a determination circuit for determining whether the detected threshold voltage is below the specified voltage value; and a control circuit for controlling the equalizer circuit and the noise elimination circuit based on the determination result of the determination circuit.

[0028] In this way, the control unit can be constituted by the detection circuit, the determination circuit, and the control circuit.

[0029] For example, the control unit may include: a detection circuit for detecting a threshold voltage of a transistor included in the signal processing device; and a memory circuit; an external tester outside the signal processing device determines whether the detected threshold voltage is below the predetermined voltage value; and the external tester writes data indicating the determination result of the external tester into the memory circuit. For example, the control unit may control the equalizer circuit and the noise elimination circuit based on the data indicating the determination result of the external tester written into the memory circuit.

[0030] In this way, by setting the component that determines whether the threshold voltage of the transistor is below a specified voltage value as a high-precision external tester outside the signal processing device, the deviation in the determination can be suppressed, and thus the deviation in the control of the equalizer circuit and the noise elimination circuit can be suppressed.

[0031] For example, the detection circuit may include: a resistor that can be switched to a pull-up resistor or a pull-down resistor; a first current source that is connected between the resistor and a power supply and includes a p-channel MOSFET; and a second current source that is connected between the resistor and a ground and includes an n-channel MOSFET; detecting a threshold voltage of the p-channel MOSFET and a threshold voltage of the n-channel MOSFET as a threshold voltage of a transistor included in the signal processing device; detecting the threshold voltage of the p-channel MOSFET by turning on the first current source, turning off the second current source, and switching the resistor to a pull-down resistor; and detecting the threshold voltage of the n-channel MOSFET by turning off the first current source, turning on the second current source, and switching the resistor to a pull-up resistor.

[0032] With such a circuit configuration, the threshold voltages of the p-channel MOSFET and the n-channel MOSFET can be detected.

[0033] For example, the resistor may also be a variable resistor.

[0034] This can improve the detection accuracy of the threshold voltages of the p-channel MOSFET and the n-channel MOSFET.

[0035] For example, the predetermined voltage value may be a value corresponding to an allowable value of jitter set according to the specification.

[0036] This makes it possible to suppress power consumption while ensuring good characteristics such that jitter is equal to or less than an allowable value.

[0037] A control method for a technical solution related to the present disclosure is a control method for a signal processing device, wherein the signal processing device comprises: a receiving unit for receiving a signal; and a transmitting unit for transmitting the signal received by the receiving unit; the receiving unit comprises an equalizer circuit for compensating for attenuation of the received signal; the transmitting unit comprises a noise elimination circuit for suppressing noise contained in the signal processed by the receiving unit; the control method comprises: a step of determining whether a threshold voltage of a transistor included in the signal processing device is below a prescribed voltage value; if it is determined that the threshold voltage of the transistor included in the signal processing device is below the prescribed voltage value, a step of setting a current of the equalizer circuit to below a prescribed current value and deactivating the noise elimination circuit; if it is determined that the threshold voltage of the transistor included in the signal processing device is greater than the prescribed voltage value, a step of setting a current of the equalizer circuit to greater than a prescribed current value and activating the noise elimination circuit.

[0038] Thus, it is possible to provide a control method capable of suppressing power consumption of a signal processing device.

[0039] Below, while referring to the attached Figure 1 The implementation modes will be described in detail.

[0040] In addition, the embodiments described below are all inclusive or specific examples. The numerical values, shapes, materials, components, configuration positions and connection forms of components, steps, and the order of steps shown in the following embodiments are examples and are not intended to limit the present disclosure.

[0041] (Implementation Method)

[0042] The signal processing device of the embodiment will be described below. In addition, a retimer will be described below as an example of a signal processing device. In addition, the signal processing device may also be a redriver or a repeater.

[0043] Figure 1 1 is a diagram showing a configuration of an example of the retimer 10 according to the embodiment.

[0044] When a signal is transmitted at a high speed, the waveform is disturbed due to attenuation of the signal amplitude and the influence of noise. However, the retimer 10 compensates for the jitter, and the signal can be transmitted at a high speed while maintaining the waveform.

[0045] The retimer 10 includes a control unit 100 , a receiving unit 110 , and a transmitting unit 120 .

[0046] The receiving unit 110 includes an equalizer unit 111 and a CDR unit 112. The receiving unit 110 receives a signal, and the equalizer unit 111 and the CDR unit 112 perform signal processing on the received signal.

[0047] The equalizer unit 111 is an equalizer that compensates for the attenuation of the received signal, and is, for example, a CTLE (Continuous Time Linear Equalizer). The equalizer unit 111 can restore the waveform of the attenuated signal. The equalizer unit 111 has an equalizer circuit that compensates for the attenuation of the received signal. The equalizer circuit will be described later. Figure 2 is described in.

[0048] The CDR unit 112 has a CDR (Clock Data Recovery) function and performs waveform shaping of a signal.

[0049] The transmission unit 120 includes a parallel-serial unit 121 and a driver unit 122. The transmission unit 120 transmits the signal received by the reception unit 110, and the parallel-serial unit 121 and the driver unit 122 perform signal processing on the signal transmitted by the transmission unit 120.

[0050] The parallel-serial unit 121 converts the parallel signal from the receiving unit 110 into a serial signal.

[0051] The driver unit 122 receives an input serial signal and outputs the input serial signal.

[0052] The parallel serial section 121 and the driver section 122 include a noise canceling circuit for suppressing noise included in the signal processed by the receiving section 110. The noise canceling circuit will be described later. Figure 3 is described in.

[0053] The control unit 100 detects the threshold voltage of the transistor included in the retimer 10, and controls the receiving unit 110 and the transmitting unit 120 (specifically, the equalizer circuit and the noise elimination circuit) according to the detected threshold voltage. The details of the control unit 100 will be described later. When the detected threshold voltage is less than a predetermined voltage value, the control unit 100 makes the current of the equalizer circuit less than a predetermined current value and deactivates the noise elimination circuit. When the detected threshold voltage is greater than the predetermined voltage value, the control unit 100 makes the current of the equalizer circuit greater than the predetermined current value and activates the noise elimination circuit.

[0054] Here, use Figure 2 and Figure 3 The equalizer circuit and the noise canceling circuit are described.

[0055] Figure 2 11 is a diagram showing a configuration of an example of an equalizer circuit 1100 according to an embodiment.

[0056] The equalizer circuit 1100 includes, for example, resistors R1 and R2, transistors Tr1 and Tr2, and a variable current circuit 1100a. For example, the variable current circuit 1100a can be controlled by the control unit 100 to change the current of the equalizer circuit 1100 (specifically, the current flowing through the resistor R1 and the transistor Tr1 and the current flowing through the resistor R2 and the transistor Tr2).

[0057] Figure 3 1 is a diagram showing a configuration of an example of a noise cancelling circuit 1200 according to an embodiment.

[0058] The noise elimination circuit 1200 includes parallel-serial conversion circuits 121 a and 121 b and buffers 122 a and 122 b .

[0059] The parallel-serial conversion circuits 121a and 121b convert input parallel signals into serial signals, respectively. The parallel-serial conversion circuits 121a and 121b are composed of substantially the same circuit. Here, "composed of substantially the same circuit" means having a circuit structure in which substantially the same current consumption flows at the same time, and typically, they are connected to the same power supply and the same ground, and are composed of the same circuit.

[0060] The buffer 122a receives the serial signal converted by the parallel-serial conversion circuit 121a, and the buffer 122b receives the serial signal converted by the parallel-serial conversion circuit 121b. The buffer 122a and the buffer 122b are formed of substantially the same circuit.

[0061] As described in Patent Document 1, by providing a parallel-serial conversion circuit 121 b and a buffer 122 b having substantially the same circuit structure with respect to the parallel-serial conversion circuit 121 a and the buffer 122 a , noise can be suppressed.

[0062] For example, the noise canceller 1200 can be deactivated by the control unit 100. Specifically, the noise canceller 1200 can be controlled by the control unit 100 to operate the parallel-serial converter 121a and the buffer 122a and to deactivate the parallel-serial converter 121b and the buffer 122b.

[0063] As described above, when the detected threshold voltage is below the specified voltage value, the control unit 100 sets the current of the equalizer circuit 1100 to below the specified current value and deactivates the noise elimination circuit 1200. When the detected threshold voltage is greater than the specified voltage value, the control unit 100 sets the current of the equalizer circuit 1100 to greater than the specified current value and activates the noise elimination circuit 1200.

[0064] When the threshold voltage of the transistor included in the retimer 10 is below a prescribed voltage value (in other words, when the threshold voltage of the transistor is low), the power consumption of the retimer 10 increases. On the other hand, in this case, the gain of the equalizer circuit 1100 increases, and further, the delay sensitivity decreases and the jitter decreases. Therefore, corresponding to the increase in the gain of the equalizer circuit 1100, the current of the equalizer circuit 1100 can be made below a prescribed current value, and the current consumption of the equalizer circuit 1100 can be reduced. In addition, the prescribed current value is not particularly limited, but is appropriately set according to the performance of the equalizer circuit 1100, etc. In addition, since the delay sensitivity decreases and the jitter decreases, it is no longer necessary to operate the noise elimination circuit 1200, and the noise elimination circuit 1200 can be deactivated. Therefore, when the threshold voltage of the transistor included in the retimer 10 is below a prescribed voltage value, by setting the current of the equalizer circuit 1100 to below a prescribed current value and deactivating the noise elimination circuit 1200, power consumption can be suppressed. Use Figure 4 The effect of suppressing the power consumption will be described.

[0065] Figure 4 It is a diagram for explaining the effect of suppressing power consumption. Figure 4 The horizontal axis of represents the threshold voltage of the transistor included in the retimer 10 , with the right side representing a low threshold voltage and the left side representing a high threshold voltage. Figure 4 The vertical axis represents the power consumption of the retimer 10 , with the upper side representing large power consumption and the lower side representing small power consumption. Figure 4 The dotted line shows the relationship between the threshold voltage and power consumption when the control unit 100 does not set the current of the equalizer circuit 1100 to a predetermined current value or less and maintains the noise canceling circuit 1200 in an activated state when the detected threshold voltage is equal to or less than a predetermined voltage value. Figure 4 The solid line shows the relationship between the threshold voltage and power consumption when the control unit 100 sets the current of the equalizer circuit 1100 to a predetermined current value or less and deactivates the noise cancelling circuit 1200 when the detected threshold voltage is equal to or less than a predetermined voltage value.

[0066] like Figure 4 As shown by the dotted line, it can be seen that the lower the threshold voltage of the transistor included in the retimer 10, the greater the power consumption of the retimer 10. Figure 4 As indicated by the solid line, it can be seen that the control unit 100, when the detected threshold voltage is below the specified voltage value, sets the current of the equalizer circuit 1100 to below the specified current value and deactivates the noise elimination circuit 1200. This makes it possible to suppress the power consumption of the retimer 10 even when the threshold voltage of the transistor included in the retimer 10 is below the specified voltage value.

[0067] The predetermined voltage value is not particularly limited, and may be, for example, a value corresponding to the permissible value of jitter set in accordance with the specification. By setting such a predetermined voltage value, it is possible to suppress power consumption while ensuring good characteristics such as jitter being below the permissible value.

[0068] Next, the control unit 100 will be described in detail.

[0069] Figure 5 It is a structural diagram showing an example of the control unit 100 according to the embodiment.

[0070] For example, the control unit 100 includes a process detection circuit 101 , a determination circuit 102 , and a control circuit 103 .

[0071] The process detection circuit 101 detects the threshold voltage of the transistor included in the retimer 10. The process detection circuit 101 is an example of a detection circuit. The details of the process detection circuit 101 will be described later.

[0072] The determination circuit 102 determines whether the detected threshold voltage is equal to or less than a predetermined voltage value. The determination circuit 102 is, for example, a comparator, and can make the above determination by comparing the threshold voltage detected by the process detection circuit 101 with a predetermined voltage value.

[0073] The control circuit 103 controls the equalizer circuit 1100 and the noise cancelling circuit 1200 based on the determination result of the determination circuit 102. Specifically, the control circuit 103 adjusts the current of the equalizer circuit 1100 based on the determination result of the determination circuit 102 and activates or deactivates the noise cancelling circuit 1200.

[0074] In this way, the control unit 100 can be constituted by the process detection circuit 101 , the determination circuit 102 , and the control circuit 103 .

[0075] Next, use Figure 6 The circuit configuration of the process detection circuit 101 will be described.

[0076] Figure 6 1 is a circuit diagram showing an example of the process detection circuit 101 according to the embodiment.

[0077] The process detection circuit 101 includes a resistor R11 , a first current source 1010 , and a second current source 1020 .

[0078] The resistor R11 is a resistor that can be switched between a pull-up resistor and a pull-down resistor. The resistor R11 is connected to the power supply to serve as a pull-up resistor when the switch SW1 is on and the switch SW2 is off, and is connected to the ground to serve as a pull-down resistor when the switch SW1 is off and the switch SW2 is on.

[0079] The first current source 1010 is connected between the resistor R11 and the power supply, and includes a p-channel MOSFET 1011. Figure 6 As shown, the source of p-channel MOSFET 1011 is connected to a power supply, and the drain is connected to resistor R11. Although details of the circuit connected to the gate of p-channel MOSFET 1011 are omitted, a circuit for controlling on / off of p-channel MOSFET 1011 is connected to the gate.

[0080] The second current source 1020 is connected between the resistor R11 and the ground, and includes an n-channel MOSFET 1021. Figure 6 As shown, the drain of the n-channel MOSFET 1021 is connected to the resistor R11, and the source is grounded. Although the details of the circuit connected to the gate of the n-channel MOSFET 1021 are omitted, a circuit for controlling the on / off of the n-channel MOSFET 1021 is connected to the gate.

[0081] The process detection circuit 101 detects the threshold voltage of the p-channel MOSFET 1011 and the threshold voltage of the n-channel MOSFET 1021 as the threshold voltage of the transistor included in the retimer 10. The transistors included in the retimer 10 are respectively manufactured in the same manufacturing process, and the p-channel MOSFET 1011 and the n-channel MOSFET 1021 included in the process detection circuit 101 are manufactured by the same manufacturing process as the transistors included in the receiving unit 110 and the transmitting unit 120. Therefore, the threshold voltages of the p-channel MOSFET 1011 and the n-channel MOSFET 1021 included in the process detection circuit 101 are substantially the same as the threshold voltages of the transistors included in the retimer 10. Therefore, by detecting the threshold voltages of the p-channel MOSFET 1011 and the n-channel MOSFET 1021 by the process detection circuit 101, the threshold voltages of the transistors (p-channel MOSFET and n-channel MOSFET) included in the retimer 10 can be detected.

[0082] The process detection circuit 101 detects the threshold voltage of the p-channel MOSFET 1011 by turning on the first current source 1010, turning off the second current source 1020, and switching the resistor R11 to a pull-down resistor. Specifically, the process detection circuit 101 turns on the p-channel MOSFET 1011 included in the first current source 1010, turns off the n-channel MOSFET 1021 included in the second current source 1020, turns off the switch SW1, and turns on the switch SW2. As a result, a voltage corresponding to the threshold voltage of the p-channel MOSFET 1011 is generated at a node between the first current source 1010 and the second current source 1020, and the process detection circuit 101 outputs the voltage generated at the node as the threshold voltage of the p-channel MOSFET 1011.

[0083] For example, when the threshold voltage of the p-channel MOSFET 1011 is high, the current flowing through the p-channel MOSFET 1011 and the resistor R11 is small, so the voltage of the node becomes low. When the threshold voltage of the p-channel MOSFET 1011 is low, the current flowing through the p-channel MOSFET 1011 and the resistor R11 is large, so the voltage of the node becomes high. In this way, since the voltage of the node is related to the threshold voltage of the p-channel MOSFET 1011, the process detection circuit 101 can detect the voltage of the node as the threshold voltage of the p-channel MOSFET 1011.

[0084] The process detection circuit 101 detects the threshold voltage of the n-channel MOSFET 1021 by disconnecting the first current source 1010, connecting the second current source 1020, and switching the resistor R11 to a pull-up resistor. Specifically, the process detection circuit 101 disconnects the p-channel MOSFET 1011 included in the first current source 1010, connects the n-channel MOSFET 1021 included in the second current source 1020, connects the switch SW1, and disconnects the switch SW2. As a result, a voltage corresponding to the threshold voltage of the n-channel MOSFET 1021 is generated at a node between the first current source 1010 and the second current source 1020, and the process detection circuit 101 outputs the voltage generated at the node as the threshold voltage of the n-channel MOSFET 1021.

[0085] For example, when the threshold voltage of the n-channel MOSFET 1021 is high, the voltage of the node becomes high because the current flowing through the resistor R11 and the n-channel MOSFET 1021 is small. When the threshold voltage of the n-channel MOSFET 1021 is low, the voltage of the node becomes low because the current flowing through the resistor R11 and the n-channel MOSFET 1021 is large. In this way, since the voltage of the node is related to the threshold voltage of the n-channel MOSFET 1021, the process detection circuit 101 can detect the voltage of the node as the threshold voltage of the n-channel MOSFET 1021.

[0086] With such a circuit configuration, the threshold voltages of the p-channel MOSFET 1011 and the n-channel MOSFET 1021 can be detected.

[0087] For example, the resistor R11 is a variable resistor. This can improve the detection accuracy of the threshold voltages of the p-channel MOSFET 1011 and the n-channel MOSFET 1021.

[0088] In addition, the control unit 100 may not include the determination circuit 102. Figure 7This is explained.

[0089] Figure 7 1 is a block diagram showing another example of the control unit 100 according to the embodiment. Figure 7 Also shown in FIG. 1 is an external tester 200 disposed outside the retimer 10 .

[0090] like Figure 7 As shown, the control unit 100 has a process detection circuit 101 and a memory circuit 104 for detecting the threshold voltage of the transistor included in the retimer 10. Whether the threshold voltage detected by the process detection circuit 101 is below a specified voltage value can be determined by an external tester 200 outside the retimer 10.

[0091] The external tester 200 writes data indicating the determination result of the external tester 200 into the memory circuit 104. For example, the external tester 200 determines whether the threshold voltage of each of the p-channel MOSFET 1011 and the n-channel MOSFET 1021 is equal to or less than a predetermined voltage value, and writes data indicating the determination result into the memory circuit 104.

[0092] The control unit 100 controls the equalizer circuit 1100 and the noise elimination circuit 1200 based on the data indicating the determination result of the external tester 200 written into the memory circuit 104. That is, when the determination result indicating that the threshold voltage of the transistor is less than or equal to a predetermined voltage value is written into the memory circuit 104, the control unit 100 makes the current of the equalizer circuit 1100 less than or equal to a predetermined current value and deactivates the noise elimination circuit 1200. Furthermore, when the determination result indicating that the threshold voltage of the transistor is greater than a predetermined voltage value is written into the memory circuit 104, the control unit 100 makes the current of the equalizer circuit 1100 greater than a predetermined current value and activates the noise elimination circuit 1200.

[0093] In this way, by setting the component that determines whether the threshold voltage of the transistor is below the specified voltage value to a high-precision external tester 200 outside the retimer 10, the deviation in the determination can be suppressed, and thus the deviation in the control of the equalizer circuit 1100 and the noise elimination circuit 1200 can be suppressed.

[0094] In addition, the receiving unit 110 may have a function of adjusting the current of the equalizer circuit 1100 according to the determination result indicating whether the threshold voltage of the transistor is equal to or lower than a predetermined voltage value. In this case, the control unit 100 may output only the determination result written in the memory circuit 104 to the receiving unit 110. That is, the control unit 100 may not directly control the equalizer circuit 1100, but may indirectly control the equalizer circuit 1100 by notifying the receiving unit 110 of the determination result.

[0095] In addition, the transmitting section 120 may have a function of activating or deactivating the noise elimination circuit 1200 according to the determination result indicating whether the threshold voltage of the transistor is less than or equal to a predetermined voltage value. In this case, the control section 100 may output only the determination result written in the memory circuit 104 to the transmitting section 120. That is, the control section 100 may not directly control the noise elimination circuit 1200, but may indirectly control the noise elimination circuit 1200 by notifying the transmitting section 120 of the determination result.

[0096] For example, the external tester 200 can compare the threshold voltage with a plurality of voltage values. For example, the external tester 200 can determine whether the threshold voltage of the transistor is less than the first voltage value, whether it is greater than the first voltage value and less than the second voltage value, whether it is greater than the second voltage value, etc. Thus, the equalizer circuit 1100 and the noise elimination circuit 1200 can be controlled more finely according to the threshold voltage of the transistor. In particular, the current of the equalizer circuit 1100 can be finely adjusted.

[0097] As described above, when the threshold voltage of the transistor included in the retimer 10 is less than the predetermined voltage value (in other words, when the threshold voltage of the transistor is low), the power consumption of the retimer 10 increases. On the other hand, in this case, the gain of the equalizer circuit 1100 increases, and the delay sensitivity decreases, and the jitter decreases. Therefore, according to the increase in the gain of the equalizer circuit 1100, the current of the equalizer circuit 1100 can be made less than the predetermined current value, and the current consumption of the equalizer circuit 1100 can be reduced. In addition, since the delay sensitivity is reduced and the jitter is reduced, it is no longer necessary to operate the noise elimination circuit 1200, and the noise elimination circuit 1200 can be deactivated. Therefore, when the threshold voltage of the transistor included in the retimer 10 is less than the predetermined voltage value, the current of the equalizer circuit 1100 is set to less than the predetermined current value and the noise elimination circuit 1200 is deactivated, so that the power consumption can be suppressed.

[0098] (Other embodiments)

[0099] The signal processing device (retimer 10) related to one or more technical solutions of the present disclosure is described above based on the embodiments, but the present disclosure is not limited to these embodiments. As long as it does not deviate from the main purpose of the present disclosure, various forms after deformation thought of by those skilled in the art to each embodiment, or forms constructed by combining constituent elements of different embodiments can also be included in the scope of one or more technical solutions of the present disclosure.

[0100] For example, in the above embodiment, an example in which the resistor R11 is a variable resistor is described, but the resistor R11 may not be a variable resistor.

[0101] For example, the present disclosure can be implemented not only as a signal processing device but also as a control method of the signal processing device including steps (processing) performed by components constituting the signal processing device.

[0102] Figure 8 This is a flowchart showing an example of a control method according to another embodiment.

[0103] The control method is a control method of a signal processing device, the signal processing device comprising: a receiving unit for receiving a signal; and a transmitting unit for transmitting the signal received by the receiving unit; the receiving unit comprising an equalizer circuit for compensating for attenuation of the received signal; and the transmitting unit comprising a noise elimination circuit for suppressing noise contained in the signal processed by the receiving unit; the control method is as follows Figure 8 As shown, it includes: a step of determining whether the threshold voltage of the transistor included in the signal processing device is below a specified voltage value (step S11); when it is determined that the threshold voltage of the transistor included in the signal processing device is below the specified voltage value ("yes" in step S11), the step of setting the current of the equalizer circuit to below the specified current value and deactivating the noise elimination circuit (step S12); when it is determined that the threshold voltage of the transistor included in the signal processing device is greater than the specified voltage value ("no" in step S11), the step of setting the current of the equalizer circuit to greater than the specified current value and activating the noise elimination circuit (step S13).

[0104] For example, the present disclosure may be implemented as a program for causing a processor to execute the steps included in the control method. Furthermore, the present disclosure may be implemented as a non-volatile computer-readable recording medium such as a CD-ROM having the program recorded thereon.

[0105] For example, when the present disclosure is implemented by a program (software), each step is performed by executing the program using hardware resources such as a computer's CPU, memory, and input / output circuits. That is, each step is performed by the CPU obtaining data from the memory or input / output circuits and performing calculations or outputting calculation results to the memory or input / output circuits.

[0106] In addition, in the above-mentioned embodiment, each component included in the signal processing device can also be implemented by being constituted by dedicated hardware or executing a software program suitable for each component. Each component can also be implemented by a program execution unit such as a CPU or a processor reading and executing a software program recorded in a recording medium such as a hard disk or a semiconductor memory.

[0107] Part or all of the functions of the signal processing device related to the above-mentioned embodiment are typically implemented as an integrated circuit, i.e., LSI. They can be either individually single-chip or partially or entirely single-chip. In addition, integrated circuitization is not limited to LSI, and can also be implemented by a dedicated circuit or a general-purpose processor. It is also possible to use a FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing or a reconfigurable processor that can reconfigure the connection and setting of the circuit unit inside the LSI.

[0108] Industrial Applicability

[0109] The present disclosure can be applied to a retimer mounted on a cable, and the like.

[0110] Description of symbols

[0111] 10 Retimer

[0112] 100 Control Department

[0113] 101 Process Detection Circuit

[0114] 102 Decision circuit

[0115] 103 Control Circuit

[0116] 104 Memory Circuit

[0117] 110 Receiving Department

[0118] 111 Equalizer

[0119] 112 CDR Department

[0120] 120 Sending Department

[0121] 121 Parallel Serial Unit

[0122] 121a, 121b parallel-serial conversion circuit

[0123] 122 Driver unit

[0124] 122a, 122b cache

[0125] 200 External tester

[0126] 1010 First current source

[0127] 1011p-channel MOSFET

[0128] 1020 Second current source

[0129] 1021n-channel MOSFET

[0130] 1100 Equalizer Circuit

[0131] 1100a Variable current circuit

[0132] 1200 Noise Cancellation Circuit

[0133] R1, R2, R11 resistors

[0134] SW1, SW2 switches

[0135] Tr1, Tr2 transistors

Claims

1. A signal processing device, comprising: A receiving unit, receiving a signal; a sending unit, which sends the signal received by the receiving unit; and Control Department; The receiving unit has an equalizer circuit for compensating for attenuation of a received signal; The transmitting unit has a noise canceling circuit for suppressing noise included in the signal processed by the receiving unit; The control unit detects a threshold voltage of a transistor included in the signal processing device; the control unit sets the current of the equalizer circuit to a predetermined current value or less and deactivates the noise canceling circuit when the detected threshold voltage is a predetermined voltage value or less; The control unit sets the current of the equalizer circuit to be larger than a predetermined current value and activates the noise canceling circuit when the detected threshold voltage is larger than the predetermined voltage value.

2. The signal processing device according to claim 1, wherein: The control unit has: A detection circuit, detecting a threshold voltage of a transistor included in the signal processing device; A determination circuit, determining whether the detected threshold voltage is below the specified voltage value; as well as The control circuit controls the equalizer circuit and the noise canceling circuit based on the determination result of the determination circuit.

3. The signal processing device according to claim 1, wherein: The control unit has: a detection circuit for detecting a threshold voltage of a transistor included in the signal processing device; and Memory circuit; determining, by an external tester outside the signal processing device, whether the detected threshold voltage is below the prescribed voltage value; The external tester writes data indicating a determination result of the external tester into the memory circuit.

4. The signal processing device according to claim 3, wherein: The control section controls the equalizer circuit and the noise canceling circuit based on data indicating a determination result of the external tester written in the memory circuit.

5. The signal processing device according to any one of claims 2 to 4, wherein: The detection circuit has: Resistors, which can be switched to pull-up or pull-down resistors; A first current source, connected between the resistor and a power source, comprising a p-channel MOSFET; as well as a second current source, connected between the resistor and ground, comprising an n-channel MOSFET; detecting a threshold voltage of the p-channel MOSFET and a threshold voltage of the n-channel MOSFET as a threshold voltage of a transistor included in the signal processing device; By turning on the first current source, turning off the second current source, and switching the resistor to a pull-down resistor, a threshold voltage of the p-channel MOSFET is detected; The threshold voltage of the n-channel MOSFET is detected by turning off the first current source, turning on the second current source, and switching the resistor to a pull-up resistor.

6. The signal processing device according to claim 5, wherein: The resistor is a variable resistor.

7. The signal processing device according to any one of claims 1 to 6, wherein: The predetermined voltage value is a value corresponding to an allowable value of jitter set according to the specification.

8. A control method is a control method of a signal processing device, wherein: The signal processing device comprises: a receiving unit that receives a signal; and A sending unit, sending the signal received by the receiving unit; The receiving unit has an equalizer circuit for compensating for attenuation of a received signal; The transmitting unit has a noise canceling circuit for suppressing noise included in the signal processed by the receiving unit; The control method comprises: A step of determining whether a threshold voltage of a transistor included in the signal processing device is below a predetermined voltage value; When it is determined that the threshold voltage of the transistor included in the signal processing device is equal to or lower than the predetermined voltage value, the current of the equalizer circuit is set to be equal to or lower than a predetermined current value and the noise canceling circuit is deactivated; A step of setting the current of the equalizer circuit to be larger than a predetermined current value and activating the noise cancelling circuit when it is determined that the threshold voltage of the transistor included in the signal processing device is larger than the predetermined voltage value.

Images