Manufacturing method of LED chip assembly with vertical structure
By setting a mask layer around the epitaxial layer of the vertical structure LED chip, the poor brightness or short circuit problems caused by metal sputtering back sticking are solved, and higher lighting rate and brightness are achieved, and the reliability of the chip is improved.
Patent Information
- Application Number
- CN202311017679.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-11
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2043-08-11
AI Technical Summary
During the processing of vertical structure LED chips, the bonded metal etching process is difficult, and metal sputtering back to the epitaxial side wall is prone to occur, resulting in the current not passing through the quantum well layer, the chip cannot light up or the brightness is low, and even abnormal situations such as short circuits occur.
A mask layer is provided around the epitaxial layer, and the metal back-bonded after the bonded metal layer will adhere to the mask layer, and then the mask layer is removed to prevent the metal from adhering directly to the epitaxial side wall.
Through the use of the mask layer, poor brightness or short circuit problems caused by metal sputtering back sticking are avoided, and the lighting rate and brightness of the vertical structure LED chip is improved, thereby enhancing the reliability of the chip.
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Figure CN119521864A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of LEDs, and in particular to a method for manufacturing a vertical structure LED chip assembly. Background Art
[0002] A vertical structure LED chip refers to a chip in which two electrodes are distributed on both sides of the epitaxial wafer. When powered on, the current almost entirely flows vertically through the LED epitaxial layer, with very little current flowing horizontally. During the processing of vertical structure chips, the bonding metal etching process is difficult, and metal sputtering is prone to sticking back to the epitaxial sidewalls during the etching process. The metal that sticks back to the epitaxial sidewalls will cause the current to not pass through the quantum well layer in the epitaxial layer, ultimately causing the vertical structure LED chip to fail to light up or have low brightness, or even short circuits and other abnormal situations. Summary of the invention
[0003] The purpose of the present invention is to provide a method for manufacturing a vertical structure LED chip component, by setting a mask layer around the epitaxial layer, the metal that is bonded back after etching the bonding metal layer will adhere to the mask layer, and then the mask layer will be removed to avoid abnormal situations such as poor brightness or short circuit.
[0004] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:
[0005] A method for manufacturing a vertical structure LED chip component, the method comprising: providing a plurality of epitaxial structures, wherein one epitaxial structure corresponds to one vertical structure LED chip; providing a driving substrate; bonding the plurality of epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate, wherein the mask layer is a photoresist and / or a functional layer, and the functional layer expands after absorbing a specific solution; etching the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, wherein the sub-bonding metal layer is an electrode of the vertical structure LED chip; removing the mask layer; and forming another electrode of the vertical structure LED chip on a side of the epitaxial structure away from the driving substrate.
[0006] By setting a mask layer around the epitaxial structure, the metal that sticks back after etching the bonding metal layer will adhere to the mask layer, and then the mask layer is removed to avoid abnormal situations such as poor brightness or short circuit.
[0007] A method for manufacturing a vertical structure LED chip component provided by an embodiment of the present invention comprises: providing a plurality of epitaxial structures, wherein one epitaxial structure corresponds to forming one vertical structure LED chip, and providing a driving substrate; bonding the plurality of epitaxial structures to the driving substrate via a bonding metal layer; further forming a mask layer on a side of the epitaxial structure away from the driving substrate, wherein the mask layer is a photoresist and / or a functional layer, and the functional layer expands after absorbing a specific solution; further etching the bonding metal layer between adjacent epitaxial structures to obtain a sub-bonding metal layer serving as one of the electrodes of the vertical structure LED chip, wherein part of the metal will be sputtered and adhered to the mask layer during the etching process of the bonding metal layer, and after the etching is completed, the mask layer can be removed to simultaneously remove the adhered metal, thereby preventing the metal from directly sputtering and adhering to the epitaxial structure during the etching process, thereby causing brightness problems such as short circuits in the vertical structure LED chip; finally, forming another electrode of the vertical structure LED chip on a side of the epitaxial structure away from the driving substrate.
[0008] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.
[0010] Figure 1 A schematic diagram of metal etching in the prior art is shown.
[0011] Figure 2 A schematic flow chart of a method for manufacturing a vertical structure LED chip provided by an embodiment of the present invention is shown.
[0012] Figure 3 A schematic diagram of a processing technology for a vertical structure LED chip provided by an embodiment of the present invention is shown.
[0013] Figure 4 A schematic structural diagram of a vertical structure LED chip provided by an embodiment of the present invention is shown.
[0014] Diagram:
[0015] 110-epitaxial layer; 120-epitaxial structure; 130-driving substrate; 140-bonding metal layer; 150-mask layer; 151-photoresist layer; 152-functional layer; 141-sub-bonding metal layer; 160-passivation layer; 170-another electrode; 200-vertical structure LED chip assembly; 210-sub-bonding metal layer; 220-epitaxial structure; 230-another electrode; 240-passivation layer. DETAILED DESCRIPTION
[0016] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention.
[0017] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.
[0018] A vertical structure LED chip refers to a chip structure in which two electrodes are distributed on opposite sides of the epitaxial structure, and the current almost entirely flows vertically through the LED epitaxial structure, with very little current flowing laterally. Vertical structure LED chips have significant advantages over horizontal structure LED chips: high anti-static ability, micron-scale processing, and the use of high thermal conductivity substrates (Si, Ge, Cu and other substrates) instead of sapphire substrates, which greatly improves heat dissipation efficiency. In the vertical structure LED chip processing process, the bonding metal etching process is difficult and the etching equipment is demanding. During the etching process, metal sputtering is prone to sticking back to the side walls of the epitaxial structure, such as Figure 1 If the metal sputtered to the side wall of the epitaxial structure forms a current channel with the P-type semiconductor layer on the top of the epitaxial structure, the current will eventually not pass through the quantum well layer, which will cause the chip to fail to light up or have low brightness, short circuit and other abnormalities. It should be noted that the epitaxial structure at least includes an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer stacked in sequence.
[0019] In view of the above problems, the embodiment of the present invention provides a method for manufacturing a vertical structure LED chip assembly, by introducing a mask layer in the processing technology of the vertical structure LED chip, and using the mask layer to remove the metal that adheres back to the side wall of the epitaxial structure during the etching process of the bonding metal layer, so as to avoid the problem of poor brightness or even short circuit caused by metal adhesion to the side wall of the epitaxial structure. Please refer to Figure 2 and Figure 3 The manufacturing method of the vertical structure LED chip assembly includes:
[0020] S110, providing a plurality of epitaxial structures, wherein one epitaxial structure forms one vertical structure LED chip.
[0021] It should be noted that the epitaxial layer 110 is formed on a growth substrate, and the growth substrate may be, but is not limited to, a sapphire substrate, a silicon substrate, etc. In the embodiment of the present invention, the epitaxial layer 110 provided may be a whole layer of epitaxial layer 110, or may be a plurality of independent epitaxial structures 120 that have been cut on the growth substrate. In other words, after the epitaxial layer 110 is formed on the growth substrate, it may be transferred and bonded to the drive substrate 130 as a whole layer and then cut to form a plurality of epitaxial structures 120, or it may be cut into a plurality of epitaxial structures 120 and then transferred to the drive substrate 130.
[0022] One epitaxial structure 120 forms a corresponding vertical structure LED chip, and the epitaxial structure 120 is used for bonding and connecting to the driving substrate 130 .
[0023] S120, providing a driving substrate.
[0024] Specifically, the driving substrate 130 may be a TFT (Thin Film Transistor) circuit board or a CMOS (Complementary Metal Oxide Semiconductor) substrate. The driving substrate 130 is provided with a variety of wirings to provide current for the vertical structure LED chip.
[0025] S130, bonding the plurality of epitaxial structures to the driving substrate via a bonding metal layer.
[0026] Specifically, the entire epitaxial layer 110 can be directly bonded to the driving substrate 130 through the bonding metal layer 140 and then cut, or the epitaxial layer 110 can be cut on the growth substrate to form multiple independent epitaxial structures 120, and then bonded to the driving substrate 130 through the bonding metal layer 140. Further, the bonding metal layer 140 can be first formed on the epitaxial layer 110 and the driving substrate 130 respectively, and then the epitaxial layer 110 and the driving substrate 130 are connected through "gold-gold bonding"; or the bonding metal layer 140 can be first formed only on one side of the epitaxial layer 110 or one of the driving substrates 130, and then the two are bonded. Further, the bonding metal layer 140 is connected to the metal electrode on the driving substrate 130, so as to conduct the current or signal on the driving substrate 130 to the multiple epitaxial structures 120.
[0027] S140, forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate, wherein the mask layer is a photoresist layer and / or a functional layer, and the functional layer expands after absorbing a specific solution.
[0028] Specifically, in the embodiment of the present invention, a mask layer 150 is formed on the side of the epitaxial structure 120 away from the driving substrate 130, which can better protect the outer wall of the epitaxial structure 120, that is, when the bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the mask layer 150, and will not directly adhere to the outer wall of the epitaxial structure 120 as before, so that the bonding metal layer 140 is directly connected to the P-type semiconductor layer or N-type semiconductor layer above the epitaxial structure 120, resulting in a short circuit or poor brightness. After the mask layer 150 is set, when the etching of the bonding metal layer 140 is completed, the mask layer 150 is removed, and the metal adhered to the mask layer 150 can be removed simultaneously, so as to obtain an epitaxial structure 120 with a relatively clean outer wall. After continuing the subsequent chip processing process, the outer wall of the vertical structure LED chip obtained has no metal back-adhesion, the leakage current is small, and the chip yield is also higher.
[0029] Furthermore, the mask layer 150 can be formed as a whole layer on the side of multiple epitaxial structures 120 away from the driving substrate 130. In this case, the mask layer 150 between adjacent epitaxial structures 120 needs to be etched before the bonding metal layer 140 can be further etched; in addition, the mask layer 150 can also be formed separately on the side of each epitaxial structure 120 away from the driving substrate 130. Since the mask layer 150 is independently arranged on the outer side of each epitaxial structure 120 and does not block the bonding metal layer 140 between the epitaxial structures 120, the bonding metal layer 140 can be directly etched at this time without first etching the mask layer 150 between adjacent epitaxial structures 120.
[0030] Furthermore, in an embodiment of the present invention, the mask layer 150 can be a separate photoresist layer 151 or a functional layer 152; or the photoresist layer 151 and the functional layer 152 can be provided at the same time, such as first forming the functional layer 152 on the epitaxial structure 120 and then continuing to form the photoresist layer 151 on the functional layer 152.
[0031] It should be noted that the photoresist layer 151 has photosensitive properties and graphic definition properties, and can be patterned by exposure, development, and etching, and can be removed by dissolving with a degumming solution. The functional layer 152 is a material that will significantly expand in volume after absorbing a specific solvent liquid, such as the functional layer 152 can be, but not limited to, a combination of one or more materials such as polyurethane, polyvinyl fluoride, and polyvinyl alcohol, and the specific solvent liquid can be pure water, etc.; the functional layer 152 will expand in volume after absorbing pure water for a certain period of time, such as 2-30 minutes; the functional layer 152 can be removed by an ultrasonic process of an ultrasonic device.
[0032] In the embodiment of the present invention, the mask layer 150 is formed in an entire layer on a side of the plurality of epitaxial structures 120 away from the driving substrate 130 as an example.
[0033] If the mask layer 150 is a separate photoresist layer 151 , the photoresist layer 151 between the adjacent epitaxial structures 120 is subsequently patterned, such as exposed, developed, and etched, to expose the bonding metal layer 140 between the adjacent epitaxial structures 120 .
[0034] If the mask layer 150 is a separate functional layer 152 , the functional layer 152 between the adjacent epitaxial structures 120 is subsequently etched away to expose the bonding metal layer 140 between the adjacent epitaxial structures 120 .
[0035] If the mask layer 150 is a photoresist layer 151 and a functional layer 152, in the embodiment of the present invention, this solution is taken as an example for detailed description. Figure 3 When the mask layer 150 is a photoresist layer 151 and a functional layer 152, the functional layer 152 is first formed on the epitaxial structure 120, and then the photoresist layer 151 is formed. The photoresist layer 151 between adjacent epitaxial structures 120 is first patterned, such as exposed, developed, and etched, to expose the functional layer 152 between adjacent epitaxial structures 120. The exposed functional layer 152 is then etched to expose the bonding metal layer 140 between adjacent epitaxial structures 120.
[0036] S150, etching the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, wherein the sub-bonding metal layer is an electrode of the vertical structure LED chip.
[0037] That is to say, the bonding metal layer 140 is a whole metal layer, and the bonding metal layer 140 between the two epitaxial structures 120 needs to be etched to form a sub-bonding metal layer 141 corresponding to the epitaxial structure 120 one by one. The sub-bonding metal layer 141 can be used as an electrode of the vertical structure LED chip formed subsequently.
[0038] It should be noted that, during the etching process of the bonding metal layer 140, the metal sputtering will be back-stained on the mask layer 150 to form a "metal fence", which is a connection structure formed by connecting one end of the sputtered metal to the bonding metal layer 140 and partially adhering to the mask layer 150. The thickness and height of the "metal fence" vary with the size of the bonding metal layer 140. For example, the thicker the bonding metal layer 140, the higher the height of the "metal fence" attached to the mask layer 150 and the thicker the thickness. Generally, the thickness of the "metal fence" is 50-200nm. Generally, if the mask layer 150 is not set, the "metal fence" formed by sputtering during the etching process will directly adhere to the outer wall of the epitaxial structure 120, and there will be a direct connection between the bonding metal layer 140 and the upper semiconductor layer of the epitaxial structure 120, resulting in poor brightness. In the embodiment of the present invention, the mask layer 150 is set to prevent the "metal fence" from being directly formed on the outer wall of the epitaxial structure 120, avoiding the problem of poor brightness, and the "metal fence" can be removed by the mask layer 150 to facilitate subsequent chip processing.
[0039] S160, removing the mask layer.
[0040] Specifically, if the mask layer 150 is a separate photoresist layer 151, when the exposed bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the photoresist layer 151. The photoresist layer 151 can be subsequently washed away by means of a debonding solution to remove the attached metal, thereby obtaining an epitaxial structure 120 with a relatively clean outer wall. Since the sputtered metal has been removed, the light output effect will not be affected.
[0041] If the mask layer 150 is a separate functional layer 152, when the exposed bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the functional layer 152, and then the functional layer 152 absorbs a specific solution such as pure water that can make it expand, so that the volume of the functional layer 152 expands. If the sputtered metal forms a "metal fence" structure on the functional layer 152, that is, the sputtered metal is connected to the bonding metal layer 140 and adheres to the functional layer 152, when the functional layer 152 expands, the connection between the "metal fence" and the bonding metal layer 140 will be destroyed, and then the functional layer 152 is removed by ultrasonic technology and the "metal fence" formed by the sputtered metal is removed simultaneously, so as to obtain an epitaxial structure 120 with a relatively clean outer wall. Since the sputtered metal has been removed, its light emission effect will not be affected.
[0042] If the mask layer 150 is a photoresist layer 151 and a functional layer 152, in the embodiment of the present invention, this solution is taken as an example for detailed description. Figure 3 When the exposed bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the photoresist layer 151. At this time, the photoresist layer 151 is first removed by dissolving with a degumming solution. After removing the photoresist layer 151, the "metal fence" still exists and there is a certain gap between it and the functional layer 152. Then the functional layer 152 absorbs a specific solution such as pure water that can make it expand, so that the volume of the functional layer 152 expands. Since there is a certain gap between the functional layer 152 and the "metal fence", when the functional layer 152 expands, it will be easier to damage the connection between the "metal fence" and the bonding metal layer 140. Then the functional layer 152 is removed by an ultrasonic process and the "metal fence" formed by the sputtered metal is removed simultaneously, so as to obtain an epitaxial structure 120 with a relatively clean outer wall. Since the sputtered metal has been removed, its light emission effect will not be affected.
[0043] S170, forming another electrode of the vertical structure LED chip on a side of the epitaxial structure away from the driving substrate.
[0044] Specifically, in the embodiment of the present invention, the sub-bonding metal layer 141 corresponding one-to-one to the epitaxial structure 120 is used as an electrode of the vertical structure LED chip. It is only necessary to form another electrode 170 on the side of the epitaxial structure 120 away from the driving substrate 130, that is, the side opposite to the sub-bonding metal layer 141, to obtain a complete vertical structure LED chip.
[0045] For further information, please refer to Figure 3, a passivation layer 160 is formed around each epitaxial structure 120, and the passivation layer 160 covers the side of the epitaxial structure 120 and the side away from the driving substrate 130; the passivation layer 160 is then etched to expose a portion of the side of the epitaxial structure 120 away from the driving substrate 130; and another electrode 170 of the vertical structure LED chip is formed in the portion. The passivation layer 160 can be made of non-conductive materials such as silicon dioxide, aluminum oxide, epoxy resin, etc., and it mainly protects the sidewalls of the epitaxial structure 120.
[0046] Please refer to Figure 4 , is a schematic diagram of a vertical structure LED chip assembly 200 provided by an embodiment of the present invention, taking a vertical structure LED chip arranged on a driving substrate 130 as an example, in fact, a plurality of vertical structure LED chips may be arranged on the driving substrate 130. It includes:
[0047] A driving substrate 130;
[0048] The sub-bonding metal layer 210 is used as an electrode of the vertical structure LED chip for bonding with the driving substrate 130 .
[0049] The epitaxial structure 220 is arranged in one-to-one correspondence with the sub-bonding metal layer 210. The epitaxial structure 220 is obtained by forming a mask layer 150 on a side of the epitaxial structure 220 away from the driving substrate 130, and removing the mask layer 150 after the sub-bonding metal layer 210 is etched.
[0050] Another electrode 230 is formed on a side of the epitaxial structure 220 away from the sub-bonding metal layer 210 .
[0051] In addition, the vertical structure LED chip assembly 200 further includes a passivation layer 240 , which at least covers the sidewalls of the sub-bonding metal layer 210 , the epitaxial structure 220 and another electrode 230 to protect the outer sidewalls of the vertical structure LED chip.
[0052] The vertical structure LED chip assembly 200 provided by the embodiment of the present invention has a mask layer 150 set on the outer wall of the epitaxial structure 220 to block the "metal fence" formed by etching and sputtering of the bonding metal layer 140, and finally the "metal fence" is removed simultaneously by removing the mask layer 150, so that the epitaxial structure 220 with a clean outer wall can be obtained, thereby avoiding the situation where the "metal fence" conducts the sub-bonding metal layer 210 and the upper semiconductor layer of the epitaxial structure 220, thereby forming a leakage channel, resulting in the problem of low brightness, and improving the yield of the vertical structure LED chip.
[0053] The epitaxial structure 220 and the sub-bonding metal layer 210 of the vertical structure LED chip assembly 200 are formed as follows:
[0054] First, the entire epitaxial layer 110 is directly bonded to the driving substrate 130 through the bonding metal layer 140 and then cut, or the epitaxial layer 110 is cut on the growth substrate to form a plurality of independent epitaxial structures 120 and then bonded to the driving substrate 130 through the bonding metal layer 140 .
[0055] Then, a mask layer 150 is formed on the side of the epitaxial structure 120 away from the driving substrate 130, which can better protect the outer wall of the epitaxial structure 120. That is, when the bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the mask layer 150, and will not directly adhere to the outer wall of the epitaxial structure 120 as before, so that the bonding metal layer 140 is directly connected to the P-type semiconductor layer or N-type semiconductor layer above the epitaxial structure 120, resulting in a short circuit or poor brightness. After the mask layer 150 is set, when the etching of the bonding metal layer 140 is completed, the mask layer 150 is removed, and the metal adhering to the mask layer 150 can be removed simultaneously, so as to obtain an epitaxial structure 120 with a relatively clean outer wall. Furthermore, in an embodiment of the present invention, the mask layer 150 can be a separate photoresist layer 151 or a functional layer 152; or the photoresist layer 151 and the functional layer 152 can be provided at the same time, such as first forming the functional layer 152 on the epitaxial structure 120 and then continuing to form the photoresist layer 151 on the functional layer 152.
[0056] Furthermore, the bonding metal layer 140 between the epitaxial structures 120 is etched to form a sub-bonding metal layer 141 corresponding to the epitaxial structure 120, and the sub-bonding metal layer 141 can be used as an electrode of the vertical structure LED chip formed later. During the etching process of the bonding metal layer 140, the metal sputtering will be back-stained on the mask layer 150 to form a "metal fence", and then the "metal fence" is removed by removing the mask layer 150 to obtain an epitaxial structure 120 with a clean outer wall, so as to facilitate the subsequent chip processing.
[0057] Furthermore, the vertical structure LED chip assembly 200 provided in the embodiment of the present invention can also be installed in a display panel, which can be a direct display panel or a backlight display panel, such as a computer display screen, a mobile phone display screen, a TV display screen, etc. Furthermore, the display panel can further form a display device, such as the display device can be, but not limited to, a display device such as a computer, a mobile phone, and a TV.
[0058] In summary, an embodiment of the present invention provides a method for manufacturing a vertical structure LED chip component, the method comprising: providing multiple epitaxial structures, one epitaxial structure corresponding to forming a vertical structure LED chip, providing a driving substrate, bonding the multiple epitaxial structures to the driving substrate through a bonding metal layer; then forming a mask layer on the side of the epitaxial structure away from the driving substrate, the mask layer being a photoresist and / or a functional layer, the functional layer swells after absorbing a specific solution, and then etching the bonding metal layer between adjacent epitaxial structures to obtain a sub-bonding metal layer serving as one of the electrodes of the vertical structure LED chip, during the etching process of the bonding metal layer, part of the metal will be sputtered and adhered to the mask layer, after the etching is completed, the mask layer can be removed to simultaneously remove the adhered metal, thereby avoiding the direct sputtering and adhesion of the metal to the epitaxial layer during the etching process, resulting in short circuit and other brightness problems in the vertical structure LED chip; finally, forming another electrode of the vertical structure LED chip on the side of the epitaxial structure away from the driving substrate.
[0059] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0060] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention. It should be noted that similar numbers and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.
[0061] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A method for manufacturing a vertical structure LED chip assembly, characterized in that: The method comprises: Providing a plurality of epitaxial structures, wherein one epitaxial structure forms a corresponding vertical structure LED chip; Providing a drive substrate; Bonding the plurality of epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate, wherein the mask layer is a photoresist layer and / or a functional layer, and the functional layer expands after absorbing a specific solution; Etching the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, wherein the sub-bonding metal layer is an electrode of the vertical structure LED chip; removing the mask layer; Another electrode of the vertical structure LED chip is formed on a side of the epitaxial structure away from the driving substrate.
2. The method for manufacturing a vertical structure LED chip assembly according to claim 1, characterized in that: The step of forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate comprises: Forming a whole layer of the photoresist layer or the functional layer on a side of the plurality of epitaxial structures away from the driving substrate, or forming the functional layer first and then forming the photoresist layer; The photoresist layer and / or the functional layer between adjacent epitaxial structures are etched to expose the bonding metal layer.
3. The method for manufacturing a vertical structure LED chip assembly according to claim 1, characterized in that: The step of forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate comprises: The photoresist layer or the functional layer is formed separately on a side of each epitaxial structure away from the driving substrate, or the functional layer is formed first and then the photoresist layer is formed, so as to expose the bonding metal layer between adjacent epitaxial structures.
4. The method for manufacturing a vertical structure LED chip assembly according to claim 1, characterized in that: The step of removing the mask layer comprises: Dissolving and removing the photoresist by a stripping solution; and / or The functional layer absorbs the specific solution to swell, and the swollen functional layer is removed by an ultrasonic process.
5. The method for manufacturing a vertical structure LED chip assembly according to any one of claims 1 to 4, characterized in that: The functional layer includes one of polyurethane, polyvinyl fluoride or polyvinyl alcohol.
6. The method for manufacturing a vertical structure LED chip assembly according to any one of claims 1 to 4, characterized in that: The specific solution includes pure water.
7. The method for manufacturing a vertical structure LED chip assembly according to any one of claims 1 to 4, characterized in that: The functional layer absorbs the specific solution and swells for 2-30 minutes.
8. The method for manufacturing a vertical structure LED chip assembly according to claim 1, characterized in that: After the step of removing the mask layer, the method further includes: forming a passivation layer around each of the epitaxial structures, wherein the passivation layer covers a side surface of the epitaxial structure and a side away from the driving substrate; The passivation layer is etched to expose a partial region of the epitaxial structure on a side away from the driving substrate, so as to form another electrode of the vertical structure LED chip in the partial region.
9. The method for manufacturing a vertical structure LED chip assembly according to claim 8, characterized in that: The passivation layer includes at least one of silicon dioxide, aluminum oxide, and epoxy resin.
10. The method for manufacturing a vertical structure LED chip assembly according to claim 1, characterized in that: Each of the epitaxial structures at least includes an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer which are stacked in sequence.
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