Digital potential card system with communication function

Abstract

The invention discloses a digital potential card system with a communication function, relates to the field of integrated circuits, solves the problem that a resistance value cannot be efficiently and quickly adjusted, and comprises a pin header, a power interface, a resistance output interface, a PCB (Printed Circuit Board) bottom plate, a CAN (Controller Area Network) communication interface, a digital potentiometer array and a main control chip, the pin header is used for burning a program to be burnt into the main control chip through the upper computer; the power interface is used for providing stable power input for the digital potential card; the resistance output interface is used for outputting a real-time resistance value corresponding to the digital potentiometer array; the CAN communication interface is used for providing a communication path between the digital potential card and an upper computer; the digital potentiometer array is used for providing a real-time resistance value; and the main control chip is used for receiving the program to be burnt and the resistance value adjusting signal sent by the upper computer, and adjusting the resistance value corresponding to the digital potentiometer array according to the resistance value adjusting signal.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, in particular to a digital potentiometer card system with a communication function. Background Art

[0002] According to certain tasks, the required devices are connected with wires to form a circuit. The circuit is the main component of the power system, control system, communication system, computer hardware and other electrical systems, and plays the role of generating, transmitting, converting, controlling, processing and storing electric energy and electrical signals. The electronic component that hinders the current in the circuit is the resistor. In the circuit, by adjusting the size of the resistor corresponding to the resistance value, the current control and voltage distribution can be achieved, so the demand for resistors is diverse;

[0003] However, at present, when there is a demand for a specific resistance value, it is usually necessary to customize the production of a specific resistor. At the same time, in the process of welding and replacing the specific resistor, the specific resistor itself will be damaged, resulting in increased costs and waste of resources.

[0004] To this end, the present invention proposes a digital potentiometer card system with communication function. Summary of the invention

[0005] The purpose of the present invention is to provide a digital potentiometer card system with communication function to solve the problem that the resistance value cannot be adjusted efficiently and quickly in the above background technology.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] A digital potentiometer card system with communication function, comprising a digital potentiometer card with a pin header, a power interface, a resistor output interface, a PCB base plate, a CAN communication interface, a digital potentiometer array and a main control chip;

[0008] Pin header, power interface, resistor output interface, CAN communication interface, digital potentiometer array, and main control chip 7 are welded on the PCB base plate according to the circuit schematic diagram;

[0009] The pin header is used to burn the program to be burned into the main control chip through the host computer;

[0010] The power supply interface is used to provide a stable power supply input for the digital potentiometer card;

[0011] The resistance output connection is used to output the real-time resistance value corresponding to the digital potentiometer array;

[0012] The CAN communication interface is used to provide a communication path between the digital potentiometer card and the host computer;

[0013] The digital potentiometer array is used to provide real-time resistance values;

[0014] The main control chip is used to receive the program to be burned and the resistance adjustment signal sent by the host computer, and adjust the resistance value corresponding to the digital potentiometer array according to the resistance adjustment signal.

[0015] Furthermore, the working process of the pin header is specifically as follows:

[0016] Get the corresponding burning method according to the memory type corresponding to the host computer;

[0017] If the memory type in the host computer is Flash memory, SRAM memory or DRAM memory, select serial port burning; if the memory type in the host computer is embedded memory or other types of memory, select SW download burning.

[0018] Furthermore, after the power interface is connected to the power supply, it is ensured that each component of the digital potentiometer card can work normally; the power interface in the digital potentiometer card is equipped with a transient voltage suppressor and a recoverable fuse to improve the anti-interference ability and overcurrent protection ability of the circuit.

[0019] Furthermore, the CAN communication interface provides a communication path between the digital potentiometer card and the host computer. When the host computer and the digital potentiometer card are data connected, the host computer generates a corresponding resistance adjustment signal according to the pre-adjusted resistance value, and inputs the resistance adjustment signal into the main control chip through the CAN communication interface;

[0020] The CAN communication interface is a serial communication protocol commonly used in real-time control systems. The CAN communication interface allows devices to communicate through the CAN bus to achieve functions such as data exchange and control command transmission between devices.

[0021] Furthermore, the digital potentiometer array is composed of four digital potentiometers connected in series, each digital potentiometer is provided with 32 taps, that is, there are 32 gears, and the digital potentiometer array provides a total of 128 gears. The digital potentiometer array controls the resistance value of each digital potentiometer in the digital potentiometer array by receiving the communication signal sent by the main control chip.

[0022] Furthermore, the process of the main control chip calculating the corresponding pre-adjustment gear of the digital potentiometer is specifically as follows:

[0023] Obtain a resistance adjustment signal, read the resistance adjustment signal and obtain a corresponding pre-adjusted resistance value YTJ;

[0024] Compare the pre-adjustment resistance value YTJ with the full-scale resistance MKD corresponding to the digital potentiometer array. If the pre-adjustment resistance value YTJ is greater than the full-scale resistance MKD corresponding to the digital potentiometer array, generate an abnormal signal and terminate subsequent steps.

[0025] If the pre-adjustment resistance value YTJ is less than or equal to the full-scale resistance MKD corresponding to the digital potentiometer array, the pre-adjustment normalization value is obtained by dividing the pre-adjustment resistance value YTJ by the full-scale resistance MKD corresponding to the digital potentiometer array, and the value of the pre-adjustment normalization value is between 0 and 1;

[0026] The array pre-adjustment gear value YTD is obtained by multiplying the pre-adjustment normalization value by the total number of gears and taking the integer. The pre-adjustment gear value is specifically an integer value between zero and the total number of gears. In this embodiment, the total number of gears is 128, so the adjustment gear value is also 0 to 128.

[0027] Furthermore, the process of the main control chip calculating the corresponding pre-adjustment gear of the digital potentiometer is specifically as follows:

[0028] The pre-adjustment gear of each digital potentiometer in the digital potentiometer array is recorded as DW1, DW2, DW3 and DW4 in sequence; initially, DW1 = DW2 = DW3 = DW4 = 0;

[0029] Compare the pre-adjustment position of each digital potentiometer with the corresponding maximum position;

[0030] If the pre-adjustment gear of any digital potentiometer is greater than the corresponding maximum gear, the highest digit of the corresponding pre-adjustment gear of the corresponding digital potentiometer is reduced by one, and the remaining gear is recorded as the array pre-adjustment gear value for redistribution;

[0031] If the pre-adjustment gears of all digital potentiometers are less than or equal to the corresponding maximum gears, it is determined that the pre-adjustment gear allocation is completed.

[0032] Furthermore, the calculation process of the pre-adjustment gear is specifically as follows:

[0033] First calculation: Divide the array pre-adjusted gear value by four to obtain the quotient and remainder, where the remainder ranges from 0 to 3;

[0034] Assign the value of the quotient to DW4 and the value of the remainder to DW1;

[0035] The array pre-adjustment gear value corresponding to the second calculation is obtained by subtracting the quotient and remainder in the first calculation from the array pre-adjustment gear value;

[0036] Divide the array pre-adjustment gear value corresponding to the second calculation by four to obtain the quotient and remainder corresponding to the second calculation; assign the quotient corresponding to the second calculation to DW3, and assign the remainder corresponding to the second calculation to DW2;

[0037] The array pre-adjustment gear value corresponding to the third calculation is obtained by subtracting the quotient and remainder corresponding to the second calculation from the array pre-adjustment gear value corresponding to the second calculation;

[0038] Use the array pre-adjustment gear value corresponding to the third calculation to divide by four to obtain the quotient and remainder corresponding to the third calculation; add the quotient corresponding to the third calculation to the value corresponding to DW2 of the second calculation to obtain the value corresponding to DW2 of the third calculation; add the remainder corresponding to the third calculation to the value corresponding to DW3 of the second calculation to obtain the value corresponding to DW3 of the third calculation;

[0039] And so on, until the array pre-adjustment gear value is zero.

[0040] Furthermore, the working process of the main control chip adjusting the corresponding gear position of the digital potentiometer is specifically as follows:

[0041] The main control chip sends a start signal, and sends the device address corresponding to the digital potentiometer pre-stored in the main control chip to the corresponding digital potentiometer, and then waits for a response signal from the digital potentiometer;

[0042] The digital potentiometer receives the device address sent by the main control chip, and then compares the device address sent by the main control chip with the actual device address of the digital potentiometer. If there is a difference, an abnormal signal is generated;

[0043] If they are consistent, a response signal is generated and fed back to the main control chip;

[0044] After receiving the response signal, the main control chip sends the byte data corresponding to the pre-adjustment gear signal to the digital potentiometer; after sending each byte data, the main control chip waits to receive the byte response signal from the digital potentiometer; if the byte response signal is received, the main control chip will send subsequent byte data to the digital potentiometer.

[0045] Furthermore, the working process of the main control chip adjusting the corresponding gear position of the digital potentiometer also includes:

[0046] The byte response signal is generated by the digital potentiometer after receiving the byte data and sent to the main control chip;

[0047] When all byte data corresponding to the pre-adjustment gear position signal are sent, the main control chip generates a stop signal and sends it to the digital potentiometer;

[0048] After receiving the stop signal, the digital potentiometer obtains the corresponding pre-adjustment gear signal according to the byte data combination, and then adjusts the tap position of the digital potentiometer itself according to the pre-adjustment gear signal to achieve the resistance value adjustment of the digital potentiometer;

[0049] Four digital potentiometers are connected in series to obtain the real-time resistance value of the digital potentiometer array.

[0050] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0051] The invention comprises a digital potentiometer card comprising a pin header, a power interface, a resistance output interface, a PCB bottom plate, a CAN communication interface, a digital potentiometer array and a main control chip. The invention first connects a power supply to the digital power interface, and the digital potentiometer card is data-connected with a host computer through the CAN communication interface. Then, a burning program is burned into the main control chip through the host computer according to the pin header. Then, the main control chip receives the program to be burned and a resistance value adjustment signal sent by the host computer and calculates the pre-adjustment gear corresponding to the digital potentiometer array. At the same time, the main control chip is used to distribute the pre-adjustment gear to the corresponding digital potentiometer according to the communication protocol corresponding to each digital potentiometer in the digital potentiometer array. Finally, the digital potentiometers are connected in series to obtain the real-time resistance value of the digital potentiometer array, and the resistance output interface outputs the real-time resistance value corresponding to the digital potentiometer array. The invention realizes efficient and fast adjustment of the resistance value. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to facilitate understanding by those skilled in the art, the present invention is further described below with reference to the accompanying drawings.

[0053] Figure 1 is the overall system block diagram of the present invention;

[0054] Figure 2 is a physical schematic diagram of the digital potentiometer card in the present invention;

[0055] Figure 3 It is a structural schematic diagram of the digital potentiometer card in the present invention;

[0056] Figure 4 A schematic diagram of data interaction between the main control chip and the digital potentiometer in the present invention;

[0057] Figure 5 It is a schematic diagram of signal interaction between the main control chip and the digital potentiometer in the present invention;

[0058] Figure 6 The present invention is a flow chart of the method. DETAILED DESCRIPTION

[0059] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0060] Embodiment 1:

[0061] See also Figure 1-Figure 5The technical solution provided by the present invention is: a digital potentiometer card system with communication function, wherein the digital potentiometer card is composed of a pin header 1, a power interface 2, a resistor output interface 3, a PCB base plate 4, a CAN communication interface 5, a digital potentiometer array 6 and a main control chip 7;

[0062] The power interface 2 is used to provide a stable power input for the digital potentiometer card. After the power is connected to the power interface 2, it is ensured that the various components of the digital potentiometer card can work normally. The power interface 2 in the digital potentiometer card is also equipped with a TVS (transient voltage suppressor) and a recoverable fuse to further improve the anti-interference ability and overcurrent protection ability of the circuit.

[0063] The digital potentiometer card is installed in the host computer and is connected to the host computer for data. The user sets the program to be burned and the pre-adjusted resistance value in the host computer; the host computer is specifically a computer device with processing and control functions;

[0064] The pin header 1 is used to burn the program to be burned into the main control chip 7 through the host computer; the pin header 1 is provided with two burning modes: SW download burning and serial port burning, and the corresponding burning mode is selected according to the memory type corresponding to the host computer; if the memory type in the host computer is Flash memory, SRAM memory or DRAM memory; then select serial port burning; if the memory type in the host computer is embedded memory or other types of memory, then select SW download burning;

[0065] The CAN communication interface 5 is used to provide a communication path between the digital potentiometer card and the host computer. When the host computer and the digital potentiometer card are connected in data, the host computer generates a corresponding resistance adjustment signal according to the pre-adjusted resistance value, and inputs the resistance adjustment signal into the main control chip 7 through the CAN communication interface 5;

[0066] Among them, the CAN communication interface is a serial communication protocol commonly used in real-time control systems. The CAN communication interface allows devices to communicate through the CAN bus to achieve functions such as data exchange and control command transmission between devices;

[0067] The digital potentiometer array 6 is composed of four digital potentiometers connected in series, each digital potentiometer is provided with 32 taps, that is, there are 32 gears, so the digital potentiometer array 6 can provide a total of 128 gears, and the digital potentiometer array 6 controls the resistance value of each digital potentiometer in the digital potentiometer array 6 by receiving the communication signal sent by the main control chip;

[0068] The main control chip 7 is used to receive the program to be burned and the resistance adjustment signal sent by the host computer, and adjust the resistance value corresponding to the digital potentiometer array 6 according to the resistance adjustment signal. The specific process of the resistance adjustment is as follows:

[0069] Obtain a resistance adjustment signal, read the resistance adjustment signal and obtain a corresponding pre-adjusted resistance value YTJ;

[0070] Compare the pre-adjusted resistance value YTJ with the full-scale resistance MKD corresponding to the digital potentiometer array 6. If the pre-adjusted resistance value YTJ is greater than the full-scale resistance MKD corresponding to the digital potentiometer array 6, generate an abnormal signal and terminate the subsequent steps;

[0071] If the pre-adjustment resistance value YTJ is less than or equal to the full-scale resistance MKD corresponding to the digital potentiometer array 6, the pre-adjustment normalization value is obtained by dividing the pre-adjustment resistance value YTJ by the full-scale resistance MKD corresponding to the digital potentiometer array 6, and the value of the pre-adjustment normalization value is between 0 and 1;

[0072] The array pre-adjustment gear value YTD is obtained by multiplying the pre-adjustment normalization value by the total number of gears and taking an integer. The pre-adjustment gear value is specifically an integer value between zero and the total number of gears. In this embodiment, the total number of gears is 128, so the value of the adjustment gear value is also 0 to 128.

[0073] The pre-adjustment gear of each digital potentiometer in the digital potentiometer array 6 is recorded as DW1, DW2, DW3 and DW4 in sequence; initially, DW1=DW2=DW3=DW4=0;

[0074] The calculation process of the pre-adjustment gear is as follows:

[0075] First calculation: Divide the array pre-adjusted gear value by four to obtain the quotient and remainder, where the remainder ranges from 0 to 3;

[0076] Assign the value of the quotient to DW4 and the value of the remainder to DW1;

[0077] The array pre-adjustment gear value corresponding to the second calculation is obtained by subtracting the quotient and remainder in the first calculation from the array pre-adjustment gear value;

[0078] Divide the array pre-adjustment gear value corresponding to the second calculation by four to obtain the quotient and remainder corresponding to the second calculation; assign the quotient corresponding to the second calculation to DW3, and assign the remainder corresponding to the second calculation to DW2;

[0079] The array pre-adjustment gear value corresponding to the third calculation is obtained by subtracting the quotient and remainder corresponding to the second calculation from the array pre-adjustment gear value corresponding to the second calculation;

[0080] Use the array pre-adjustment gear value corresponding to the third calculation to divide by four to obtain the quotient and remainder corresponding to the third calculation; add the quotient corresponding to the third calculation to the value corresponding to DW2 of the second calculation to obtain the value corresponding to DW2 of the third calculation; add the remainder corresponding to the third calculation to the value corresponding to DW3 of the second calculation to obtain the value corresponding to DW3 of the third calculation;

[0081] And so on, until the array pre-adjustment gear value is 0;

[0082] Compare the pre-adjustment position of each digital potentiometer with the corresponding maximum position;

[0083] If the pre-adjustment gear of any digital potentiometer is greater than the corresponding maximum gear, the highest digit of the corresponding pre-adjustment gear of the corresponding digital potentiometer is reduced by one, and the remaining gear is recorded as the array pre-adjustment gear value for redistribution;

[0084] For example, if the allocated pre-adjustment gear is DW1=20, DW2=30, DW3=20, DW4=40, since 40>32, the pre-adjustment gear of the digital potentiometer corresponding to DW4 is greater than the maximum gear, and the highest digit of DW4 is reduced by one, at this time DW4=30; the extra 10 gears of DW4 are recorded as the array pre-adjustment gear value, and are allocated again to DW1, DW2, DW3 and DW4 until the array pre-adjustment gear value is zero;

[0085] If the pre-adjustment gears of all digital potentiometers are less than or equal to the corresponding maximum gears, it is considered that the pre-adjustment gear allocation is completed;

[0086] The main control chip 7 allocates the pre-adjustment gear to the corresponding digital potentiometer according to the communication protocol corresponding to each digital potentiometer in the digital potentiometer array 6. The allocation process is as follows:

[0087] See also Figure 4-Figure 5 , the communication protocol between the digital potentiometer and the main control chip is IIC communication; in order to realize multi-channel IIC communication at the same time, the present invention adopts GPIO to simulate IIC communication and sends the corresponding required pre-adjustment gear signal to each digital potentiometer;

[0088] like Figure 4 As shown, the main control chip 7 is composed of two bidirectional lines, a serial clock line (SCL) and a serial data line (SDA), and exchanges data with the digital potentiometer based on the serial clock line (SCL) and the serial data line (SDA);

[0089] like Figure 5 As shown, the main control chip sends a start signal, and sends the device address corresponding to the digital potentiometer pre-stored in the main control chip to the corresponding digital potentiometer, and then waits for a response signal from the digital potentiometer;

[0090] The digital potentiometer receives the device address sent by the main control chip, and then compares the device address sent by the main control chip with the actual device address of the digital potentiometer. If there is a difference, an abnormal signal is generated;

[0091] If they are consistent, a response signal is generated and fed back to the main control chip;

[0092] After receiving the response signal, the main control chip sends the byte data corresponding to the pre-adjustment gear signal to the digital potentiometer; after sending each byte data, the main control chip waits to receive the byte response signal from the digital potentiometer; if the byte response signal is received, the main control chip will send the subsequent byte data to the digital potentiometer;

[0093] The byte response signal is generated by the digital potentiometer after receiving the byte data and sent to the main control chip;

[0094] When all byte data corresponding to the pre-adjustment gear position signal are sent, the main control chip generates a stop signal and sends it to the digital potentiometer;

[0095] After receiving the stop signal, the digital potentiometer obtains the corresponding pre-adjustment gear signal according to the byte data combination, and then adjusts the tap position of the digital potentiometer itself according to the pre-adjustment gear signal to achieve the resistance value adjustment of the digital potentiometer;

[0096] Four digital potentiometers are connected in series to obtain the real-time resistance value of the digital potentiometer array 6;

[0097] The resistance output interface 3 outputs the real-time resistance value corresponding to the digital potentiometer array 6;

[0098] In this application, if corresponding calculation formulas appear, the above calculation formulas are all dimensionless and take their numerical calculations. The weight coefficients, proportional coefficients and other coefficients in the formulas are set to a result value obtained by quantifying each parameter. The size of the weight coefficient and the proportional coefficient can be determined as long as it does not affect the proportional relationship between the parameter and the result value.

[0099] Embodiment 2:

[0100] See also Figure 6 As shown, based on another concept of the same invention, a digital potentiometer card management method with communication function is now proposed, comprising the following steps:

[0101] Step S101, the power supply is connected to the digital power supply interface, and the digital potentiometer card is connected to the host computer through the CAN communication interface;

[0102] Step S102, the pin header burns the program to be burned into the main control chip through the host computer;

[0103] Step S103, the main control chip receives the program to be burned and the resistance adjustment signal sent by the host computer and calculates the pre-adjustment gear corresponding to the digital potentiometer array;

[0104] Step S104, the main control chip allocates the pre-adjustment gear to the corresponding digital potentiometer in the digital potentiometer array according to the communication protocol corresponding to each digital potentiometer;

[0105] Step S105 , the digital potentiometers are connected in series to obtain a real-time resistance value of the digital potentiometer array, and the resistance output interface outputs the real-time resistance value corresponding to the digital potentiometer array.

[0106] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to only specific implementation methods. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A digital potentiometer card system with communication function, characterized in that: It comprises a pin row (1), a power interface (2), a resistance output interface (3), a PCB base plate (4), a CAN communication interface (5), a digital potentiometer array (6) and a main control chip (7); The pin header (1), the power interface (2), the resistor output interface (3), the CAN communication interface (5), the digital potentiometer array (6) and the main control chip (7) are welded on the PCB base plate (4) according to the circuit schematic diagram; The pin header (1) is used to burn the program to be burned into the main control chip (7) through the host computer; The power interface (2) is used to provide a stable power input for the digital potentiometer card; The resistance output interface (3) is used to output the real-time resistance value corresponding to the digital potentiometer array (6); The CAN communication interface (5) is used to provide a communication path between the digital potentiometer card and the host computer; The digital potentiometer array (6) is used to provide real-time resistance values; The main control chip (7) is used to receive the program to be burned and the resistance adjustment signal sent by the host computer, and adjust the corresponding resistance value of the digital potentiometer array (6) according to the resistance adjustment signal.

2. A digital potentiometer card system with communication function according to claim 1, characterized in that: The working process of the needle row (1) is specifically as follows: Get the corresponding burning method according to the memory type corresponding to the host computer; If the memory type in the host computer is Flash memory, SRAM memory or DRAM memory, select serial port burning; If the memory type in the host computer is embedded memory or memory other than the above types, select SW download and burn.

3. A digital potentiometer card system with communication function according to claim 1, characterized in that: After the power interface (2) is connected to the power supply, each component of the digital potentiometer card can work normally; The power interface (2) in the digital potentiometer card is equipped with a transient voltage suppressor and a resettable fuse.

4. A digital potentiometer card system with communication function according to claim 1, characterized in that: The CAN communication interface (5) provides a communication path between the digital potentiometer card and the host computer. When the host computer and the digital potentiometer card are data connected, the host computer generates a corresponding resistance adjustment signal according to the pre-adjusted resistance value, and inputs the resistance adjustment signal into the main control chip (7) through the CAN communication interface (5).

5. A digital potentiometer card system with communication function according to claim 1, characterized in that: The digital potentiometer array (6) is composed of four digital potentiometers connected in series, each digital potentiometer is provided with 32 taps, that is, there are 32 gears, and the digital potentiometer array (6) provides a total of 128 gears. The digital potentiometer array (6) controls the resistance value of each digital potentiometer in the digital potentiometer array (6) by receiving a communication signal sent by a main control chip.

6. A digital potentiometer card system with communication function according to claim 5, characterized in that: The process of the main control chip calculating the corresponding pre-adjustment gear of the digital potentiometer is as follows: Obtain a resistance adjustment signal, read the resistance adjustment signal and obtain a corresponding pre-adjusted resistance value YTJ; Comparing the pre-adjusted resistance value YTJ with the full-scale resistance MKD corresponding to the digital potentiometer array (6), if the pre-adjusted resistance value YTJ is greater than the full-scale resistance MKD corresponding to the digital potentiometer array (6), generating an abnormal signal and terminating subsequent steps; If the pre-adjustment resistance value YTJ is less than or equal to the full-scale resistance MKD corresponding to the digital potentiometer array (6), the pre-adjustment normalization value is obtained by dividing the pre-adjustment resistance value YTJ by the full-scale resistance MKD corresponding to the digital potentiometer array (6), and the value of the pre-adjustment normalization value is between 0 and 1; The array pre-adjustment gear value YTD is obtained by multiplying the pre-adjustment normalization value by the total number of gears and taking the integer. The pre-adjustment gear value is specifically an integer value between zero and the total number of gears.

7. A digital potentiometer card system with communication function according to claim 6, characterized in that: The process of the main control chip calculating the corresponding pre-adjustment gear of the digital potentiometer is as follows: The pre-adjustment gear of each digital potentiometer in the digital potentiometer array (6) is recorded as DW1, DW2, DW3 and DW4 in sequence; initially, DW1=DW2=DW3=DW4=0; Compare the pre-adjustment position of each digital potentiometer with the corresponding maximum position; If the pre-adjustment gear of any digital potentiometer is greater than the corresponding maximum gear, the highest digit of the corresponding pre-adjustment gear of the corresponding digital potentiometer is reduced by one, and the remaining gear is recorded as the array pre-adjustment gear value for redistribution; If the pre-adjustment gears of all digital potentiometers are less than or equal to the corresponding maximum gears, it is determined that the pre-adjustment gear allocation is completed.

8. A digital potentiometer card system with communication function according to claim 7, characterized in that: The calculation process of the pre-adjustment gear is specifically as follows: First calculation: Divide the array pre-adjusted gear value by four to obtain the quotient and remainder, where the remainder ranges from 0 to 3; Assign the value of the quotient to DW4 and the value of the remainder to DW1; The array pre-adjustment gear value corresponding to the second calculation is obtained by subtracting the quotient and remainder in the first calculation from the array pre-adjustment gear value; Divide the array pre-adjustment gear value corresponding to the second calculation by four to obtain the quotient and remainder corresponding to the second calculation; The quotient corresponding to the second calculation is assigned to DW3, and the remainder corresponding to the second calculation is assigned to DW2; The array pre-adjustment gear value corresponding to the third calculation is obtained by subtracting the quotient and remainder corresponding to the second calculation from the array pre-adjustment gear value corresponding to the second calculation; Divide the array pre-adjustment gear value corresponding to the third calculation by four to obtain the quotient and remainder corresponding to the third calculation; The quotient corresponding to the third calculation is added to the value corresponding to the second calculation DW2 to obtain the value corresponding to the third calculation DW2; the remainder corresponding to the third calculation is added to the value corresponding to the second calculation DW3 to obtain the value corresponding to the third calculation DW3; And so on, until the array pre-adjustment gear value is zero.

9. A digital potentiometer card system with communication function according to claim 8, characterized in that: The working process of the main control chip adjusting the corresponding gear of the digital potentiometer is specifically as follows: The main control chip sends a start signal, and sends the device address corresponding to the digital potentiometer pre-stored in the main control chip to the corresponding digital potentiometer, and then waits for a response signal from the digital potentiometer; The digital potentiometer receives the device address sent by the main control chip, and then compares the device address sent by the main control chip with the actual device address of the digital potentiometer. If there is a difference, an abnormal signal is generated; If they are consistent, a response signal is generated and fed back to the main control chip; After receiving the response signal, the main control chip sends the byte data corresponding to the pre-adjustment gear signal to the digital potentiometer; after sending each byte data, the main control chip waits to receive the byte response signal from the digital potentiometer; if the byte response signal is received, the main control chip will send subsequent byte data to the digital potentiometer.

10. A digital potentiometer card system with communication function according to claim 9, characterized in that: The working process of the main control chip adjusting the corresponding gear of the digital potentiometer also includes: The byte response signal is generated by the digital potentiometer after receiving the byte data and sent to the main control chip; When all byte data corresponding to the pre-adjustment gear position signal are sent, the main control chip generates a stop signal and sends it to the digital potentiometer; After receiving the stop signal, the digital potentiometer obtains a corresponding pre-adjustment gear signal according to the byte data combination, and then adjusts the tap position of the digital potentiometer itself according to the pre-adjustment gear signal to achieve resistance value adjustment of the digital potentiometer; four digital potentiometers are connected in series to obtain the real-time resistance value of the digital potentiometer array (6).

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