Chip

Abstract

The invention provides a chip. The chip comprises a chip substrate and a connecting layer, the connecting layer is attached to the surface of one side of the chip substrate, the connecting layer is provided with a flow channel penetrating through the connecting layer in the thickness direction, the flow channel is provided with a middle section, a first end and a second end, the first end and the second end are arranged at the two ends of the middle section in the first direction of the chip respectively, and the first end and the second end are arranged at the two ends of the middle section in the second direction of the chip respectively. And the length of the middle section is the maximum value meeting the following formula: (L-l) / 2 is greater than or equal to w. By designing the size of the flow channel in the chip, the length of the middle section is designed to be the maximum value under the condition that the length of a single flow channel meets the use requirement, so that more detection units for detection can be provided in each row in the flow channel, and under the condition that the flux requirement is met, the detection efficiency is improved by increasing the number of the detection units in each row. Therefore, the line number of the detection units can be correspondingly reduced, so that the line feed frequency of the fluorescence detection device during detection is reduced, and the detection efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of gene sequencing, and in particular to a chip. Background Art

[0002] The chip adapted to the sequencing platform is a reaction device that can carry the nucleic acid to be tested and can contain a solution to provide a reaction environment or a detection environment for the nucleic acid to be tested, also known as a flow chamber or a flow cell.

[0003] On a platform (sometimes referred to as a sequencer) that realizes sequencing based on an optical imaging system detection chip, by imaging a specific position of the chip (a position connected to the nucleic acid molecule to be tested, sometimes also referred to as an intermediate section or a fluid channel), the base arrangement order of the nucleic acid molecule to be tested is identified and determined based on the information of these images. For example, specifically, in a sequencing platform that uses labeled nucleotides and performs sequencing based on the principle of sequencing by synthesis, during sequencing, a high-energy laser emitted by a laser in the sequencer is irradiated through a lens to the intermediate section of the chip, and the nucleic acid molecule to be tested in the intermediate section is placed in a reagent solution. The laser irradiates the marker in the reagent solution and excites it to emit an optical signal, and then collects these optical signals, such as taking a picture to obtain an image, and identifies and determines the base arrangement order based on the information on these images to achieve the purpose of sequencing.

[0004] Among them, the channel with a middle section in the chip constitutes the flow channel of the chip. When collecting optical signals, it is limited by the field of view (FOV) of the device collecting the optical signals, and often requires multiple line-switch collections, which greatly limits the detection time. The above problems are technical problems that need to be urgently solved in this field. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a chip.

[0006] According to a first aspect, the present application provides a chip, including: a chip substrate;

[0007] A connection layer is attached to a side surface of the chip substrate, a flow channel is provided on the connection layer and passes through the connection layer in a thickness direction, the flow channel has a middle section, a first end and a second end, the first end and the second end are respectively arranged at two ends of the middle section in a first direction of the chip,

[0008] The length of the middle segment is the maximum value when the following formula is satisfied:

[0009]

[0010] Wherein, L is the length of the chip substrate, l is the length of the middle section, and w is the width of a single flow channel.

[0011] In an optional embodiment, the length of the chip substrate is no more than 2.5 times the width of the chip substrate.

[0012] In an optional embodiment, in the second direction, the distance between the flow channel adjacent to the outer edge of the chip substrate and the outer edge of the chip substrate is not less than 2.5 mm.

[0013] In an optional embodiment, the flow channel further has a blank area, and the blank area is located on both sides of the middle section in the second direction.

[0014] In an optional embodiment, the width of the blank area is 1-0.5 mm.

[0015] In an optional embodiment, a distance between any two adjacent flow channels in the second direction is not less than 1 mm.

[0016] In an optional embodiment, the chip substrate is provided with a first through hole and a second through hole that penetrate the chip substrate in the thickness direction; the first through hole is connected to the first end at one end close to the connecting layer, and the second through hole is connected to the second end at one end close to the connecting layer; the first through hole is connected to the second through hole through the middle section.

[0017] In an optional embodiment, the first end has a first angle on both sides of the first end in the second direction, and the distance between the two sides of the first end in the second direction gradually decreases as it moves away from the middle section.

[0018] In an optional embodiment, the second angle is 35 to 75 degrees.

[0019] In an optional embodiment, the second angle is 65°±5°.

[0020] In an optional embodiment, the middle section has a plurality of preset fields of view, and the length of the middle section is an integer multiple of the length of a single preset field of view.

[0021] In an optional embodiment, the outer edges of the chip substrate are enclosed to form a chamfered rectangle.

[0022] In an optional embodiment, at least four flow channels are provided.

[0023] In an optional embodiment, the chip substrate has a width of 64±0.07 mm and a length of 153±0.07 mm, the length of the flow channel is 135±0.05 mm, and the width of the flow channel is 11.8±0.07 mm; the length of the middle section is 117±0.07 mm, and the width of the middle section is 116-116.5 mm; and the spacing between any two adjacent flow channels is 2.2 mm.

[0024] In an optional embodiment, the invention further comprises: a cover glass, wherein the cover glass covers a surface of the connection layer on a side away from the chip substrate; and / or

[0025] A chip frame, the chip frame being arranged outside the chip substrate and the cover glass to fix the chip and the cover glass; and / or

[0026] A gasket is attached to a side of the chip substrate away from the connection layer, and the gasket is provided with drainage holes corresponding to and communicating with the first end and the second end in a one-to-one manner.

[0027] In an optional embodiment, the side of the gasket facing the chip substrate is a planar structure; and / or

[0028] A side of the gasket away from the chip substrate is provided with convex parts corresponding to the drainage holes one by one, and the convex parts are arranged around the outer sides of the corresponding drainage holes.

[0029] In an optional embodiment, the chip frame includes: two head end pieces, the two head end pieces are arranged opposite to each other in a first direction of the chip frame;

[0030] Two connecting pieces arranged in parallel, the two ends of the two head end pieces are connected respectively by the two connecting pieces;

[0031] The chip frame has a first surface and a second surface opposite to each other, the connecting member is relatively recessed in the head end member on the first surface, and a first step structure is formed at the connection between the connecting member and the head end member;

[0032] The two head end pieces are recessed at one end close to each other to form a second step structure, and the head end pieces are not recessed in the extension area of ​​the connecting piece; the second step structure has a step wall and a step surface parallel to the second surface, and the depth of the step surface is greater than the thickness of the connecting piece;

[0033] Two ends of the chip substrate in the first direction are engaged in the two second step structures, and the height of the chip substrate at the first surface is between the connecting member and the head end member.

[0034] The beneficial effect of the present application is that by designing the size of the flow channel within the chip, the length of the middle section is designed to be the maximum value while ensuring that the length of a single flow channel meets the usage requirements, so that more detection units can be provided for detection in each row in the flow channel. While meeting the flux requirements, the number of rows of detection units can be reduced accordingly by increasing the number of detection units in each row, thereby reducing the number of row changes of the fluorescence detection device during detection and improving detection efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 An exploded diagram of a chip in one embodiment of the present application;

[0036] Figure 2 This is a flow chart of a method for preparing a chip substrate in one embodiment of the present application;

[0037] Figure 3a A schematic diagram of a cutting track on a wafer in one embodiment of the present application;

[0038] Figure 3b A schematic diagram of a cutting track on a wafer in another embodiment of the present application;

[0039] Figure 3c A schematic diagram of a cutting track on a wafer in another embodiment of the present application;

[0040] Figure 4a This is a schematic diagram of an embodiment of the present application in which the first chamfer is a chamfered angle;

[0041] Figure 4b This is a schematic diagram of another embodiment of the present application in which the first chamfer is a chamfered angle;

[0042] Figure 5a This is a schematic diagram of an embodiment of the present application in which the first chamfer is a rounded corner;

[0043] Figure 5b This is a schematic diagram of an embodiment of the present application in which the first chamfer is a rounded corner;

[0044] Figure 6 This is an enlarged view of the first chamfer of the cutting track unit in one embodiment of the present application;

[0045] Figure 7 This is a schematic diagram of a chip substrate in one embodiment of the present application;

[0046] Figure 8 An exploded view of a chip substrate and a connection layer in one embodiment of the present application;

[0047] Fig. 9 A top view of a chip substrate and a connection layer in one embodiment of the present application;

[0048] Fig.10 This is a three-dimensional schematic diagram of the first surface of the chip frame in one embodiment of the present application;

[0049] Fig.11 This is a three-dimensional schematic diagram of the second surface of the chip frame in one embodiment of the present application;

[0050] Fig.12 A side cross-sectional view of a second step structure in one embodiment of the present application;

[0051] Fig.13 This is a three-dimensional enlarged view of the second step structure in one embodiment of the present application;

[0052] Fig.14 This is a three-dimensional schematic diagram of a chip frame in another embodiment of the present application;

[0053] Fig.15 This is a schematic diagram of the reverse side of a chip in another embodiment of the present application.

[0054] Reference numerals: chip 100, chip body 10, chip substrate 11, chamfered structure 111, first through hole 112, second through hole 113, connecting layer 12, flow channel 121, first end 121a, middle section 121b, second end 121c, preset field of view 122, cover glass 13, chip frame 14, first surface 14a, second surface 14b, head end piece 141, connecting piece 142, first step structure 143, second step structure 144, step surface 1441, step wall 1442 442, first step wall 1442a, second step wall 1442b, longitudinal wall 14421, transverse wall 14422, chamfered wall 14423, first limit piece 1443, second limit piece 1444, first hole 145, second hole 146, guide slot 147, adjustment slot 148, gasket 15, drainage hole 151, protrusion 152, first adhesive 16, second adhesive 17, wafer 2, cutting track 21, cutting track unit 211, first chamfer 212, substrate 3. DETAILED DESCRIPTION

[0055] The present invention is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein, similar elements in different embodiments adopt associated similar element numbers. In the following embodiments, many detailed descriptions are intended to enable the present application to be better understood. However, those skilled in the art can easily recognize that some of the features can be omitted in different situations, or can be replaced by other elements, materials, methods. In some cases, some operations related to the present application are not shown or described in the specification, in order to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations according to the description in the specification and the general technical knowledge in the art.

[0056] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. At the same time, the steps or actions in the method description can also be interchanged or adjusted in a manner that is obvious to those skilled in the art. Therefore, the various sequences in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a required sequence, unless otherwise specified that a certain sequence must be followed.

[0057] The serial numbers of the components in this document, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings).

[0058] In the present application, the term "sequencing" refers to sequence determination, which has the same meaning as "nucleic acid sequencing" or "gene sequencing", and refers to the determination of the base order in a nucleic acid sequence; it includes synthesis sequencing (sequencing by synthesis, SBS) and / or ligation sequencing (sequencing by ligation, SBL); it includes DNA sequencing and / or RNA sequencing; it includes double-end sequencing, single-end sequencing and / or paired-end sequencing, etc. The so-called double-end sequencing or paired-end sequencing can refer to the reading of any two segments or two parts of the same nucleic acid molecule that do not completely overlap.

[0059] The so-called "sequencing" includes the process of binding nucleotides (including nucleotide analogs) to nucleic acid templates and collecting corresponding reaction signals. In some sequencing platforms that allow nucleotides to bind to nucleic acid templates and collect corresponding reaction signals asynchronously, the order of multiple nucleotides / bases on the template is generally determined by multiple rounds of sequencing. One round of sequencing (cycle) is also called a sequencing round, which can be defined as a base extension of four nucleotides / bases. In other words, it can be defined as the process of completing the determination of the base type at any specified position on the nucleic acid template. For sequencing platforms that achieve sequencing based on controlled polymerization or ligation reactions, one round of sequencing includes the process of achieving four nucleotides binding to the so-called nucleic acid template once and collecting corresponding reaction signals; for platforms that achieve sequencing based on polymerization reactions, the reaction system includes reaction substrate nucleotides, polymerases and nucleic acid templates, so that a preset sequence (sequencing primer) is bound to the nucleic acid template. Based on the base pairing principle and the polymerization reaction principle, the added reaction substrate (nucleotide) is controllably connected to the 3' end of the sequencing primer under the catalysis of the polymerase to achieve pairing with the base at the corresponding position of the nucleic acid template. Generally, one round of sequencing may include one or more base extensions (repeat). For example, four nucleotides are added to the reaction system in sequence, and base extension and corresponding reaction signal collection are performed respectively. In this case, one round of sequencing includes four base extensions. For another example, any combination of the four nucleotides is added to the reaction system, such as two-by-two combinations or one-by-three combinations, and base extension and corresponding reaction signal collection are performed for two combinations respectively. In this case, one round of sequencing includes two base extensions. For another example, the four nucleotides are added to the reaction system at the same time for base extension and reaction signal collection. One round of sequencing includes one base extension.

[0060] In this article, the so-called "FOV" (Field of View) refers to the field of view. The process of collecting biological surface signals based on optical imaging includes the process of using an optical camera to perform multiple rounds of optical imaging (photographing) of a fixed area on the surface. The area photographed by the optical camera each time can be called FOV (field of view).

[0061] The embodiment of the present application provides a chip that can be used in the field of sequencing. Specifically, the chip can play the role of a substrate for carrying nucleic acid templates; at the same time, it can also provide a reaction site for base extension. However, it should be understood that gene sequencing is an application scenario of the chip and is not used to limit the scope of application of the chip. The chip can also be used in other fields besides sequencing, including but not limited to fields such as chemical molecule detection, protein detection, and enzyme detection. Different from sequencing applications, when the chip is used in other fields such as chemical molecule detection, protein detection, and enzyme detection, the substances carried on the surface of the chip may be chemical molecules, biological molecules, proteins, enzymes, etc. that are different from nucleic acid molecules, or may be nucleic acid molecules; in addition, the biochemical reactions occurring on the surface of the chip may also vary based on different detection methods.

[0062] In this application, the so-called "chip" is a reaction chamber with a space for accommodating liquid and / or gas, which can be used to fix the sample to be tested, also known as a flow pool, flow tank or flow cell. In the field of sequencing, the so-called "chip" can also be called a sequencing slide, sequencing chip or biochip.

[0063] In the embodiments disclosed in the present application, the chip includes a first sheet and a second sheet stacked with the first sheet, and a channel / fluid channel (channel) is provided between the first sheet and the second sheet, so that the channel / fluid channel (channel, hereinafter referred to as flow channel) provided between the first sheet and the second sheet enables the reagent solution to flow in the chip. Taking a sequencing chip as an example, the sheet structure formed by the first sheet, the flow channel and the first sheet is used to carry the nucleic acid molecules to be tested and provide a reaction site for the detection reaction of the nucleic acid molecules to be tested.

[0064] Taking the sequencing chip as an example, the structure of the chip and its preparation method are described below. In order to facilitate the description of this application, the workflow of the gene sequencing chip will be briefly described: the chip includes a flow channel formed between two sheets, and a nucleic acid template is bound to the surface of the region corresponding to the flow channel of at least one sheet. In the sequencing method using an optical signal as a detection signal, during each round of base extension reaction, the nucleic acid template in the flow channel area binds to a nucleotide or nucleotide analog by base complementarity, and the bound nucleotide or nucleotide analog generates an optical signal at its position, which appears as a bright spot or bright spot on the optical image. The flow channel area is imaged by an optical camera to collect optical signals. By detecting the optical signal, the type of introduced nucleotide or nucleotide analog can be determined. Repeat this step in sequence to achieve gene sequencing.

[0065] See also Figure 1 The chip provided in the embodiment of the present application includes the following parts:

[0066] Chip substrate 11

[0067] In the embodiment disclosed in the present application, the first sheet is a chip substrate 11. Figure 1 As shown, the chip 100 includes a chip substrate 11 .

[0068] The material of the chip substrate 11 may include at least one of silicon dioxide, crystal, and quartz glass, and may also include at least one of plastic, ceramic, PET (polyterephthalic acid), and PMMA (polymethyl methacrylate). It may also be a composite material produced by at least one of silicon dioxide, crystal, and quartz glass and at least one of plastic, ceramic, PET (polyterephthalic acid), and PMMA (polymethyl methacrylate). It can be understood that the chip substrate 11 is made of one or more of the above materials. In some embodiments, the chip substrate 11 is made of one of the above materials. Exemplarily, the chip substrate 11 is a silicon dioxide substrate, a crystal substrate, a quartz glass substrate, etc. Of course, the chip substrate 11 can also be formed by stacking multiple substrate units made of the same or different materials. In this embodiment, the stacking method can be stacked in sequence along a direction perpendicular to one surface of the substrate unit; it can also be stacked in sequence along a direction parallel to one surface of the substrate unit. Exemplarily, the chip substrate 11 is a composite substrate, including a silicon dioxide substrate unit, and a quartz glass layer formed on the surface of one side of the silicon dioxide substrate unit. When the chip substrate 11 includes a plurality of substrate units, the number of substrate units is not strictly limited and can be adjusted according to the expected size of the chip substrate 11 , such as thickness.

[0069] In the embodiment of the present application, the shape of the chip substrate 11 can be a rectangle, a square, a diamond, other polygons, an irregular shape with an arc periphery, etc. In some embodiments, in order to match the structural setting of accommodating and fixing the chip 100 in the instruments of most current sequencing platforms, the overall shape of the chip substrate 11 is set to be a rectangle.

[0070] In the embodiments disclosed in this application, Figure 1 and Figure 7 As shown, the chip substrate 11 is rectangular. Figure 8 and Fig. 9 As shown, the chip substrate 11 includes a first through hole 112 and a second through hole 113 which are respectively arranged at both ends in the length direction and penetrate the chip substrate 11 in the thickness direction.

[0071] In the embodiment of the present application, the number of the first through holes 112 and the second through holes 113 corresponds to the number of the flow channels 121 provided on the chip 100. The shapes of the first through holes 112 and the second through holes 113 are not strictly limited and can be square holes, round holes or other types of holes, which are not specifically limited in the present application. Exemplarily, the first through holes 112 and the second through holes 113 are circular holes, in which case it is understood that the cross-sections of the first through holes 112 and the second through holes 113 along the plane direction of the chip substrate 11 are circular.

[0072] In the embodiment of the present application, the chip substrate 11 can be prepared by cutting the wafer 2 .

[0073] Compared with other semiconductor chips such as mobile phone chips, sequencing chips usually have a larger surface area (such as a rectangular chip with a length of 6-20 cm and a width of 4-8 cm) to provide a larger area to bind more nucleic acid molecules to be tested, thereby increasing the sequencing throughput. Due to the increase in the area of ​​a single chip, the number of chip substrates 11 obtained when cutting chips on a wafer 2 with a certain area decreases, and at the same time, the problem of increased unusable area remaining after cutting reduces the utilization rate of the wafer 2 to a certain extent. As people's expectations for sequencing throughput increase, the demand for large-area chips increases, the number of chip substrates 11 that can be cut from a wafer 2 within a limited area decreases, and the loss of wafer 2 increases. For example, taking a rectangular chip substrate 11 with a length of 153 mm and a width of 64 mm as an example, when cutting on the wafer 2, taking into account the safety area reserved between adjacent chip substrates 11 (in order to ensure the quality of the cut product, it is usually necessary to reserve a certain space between adjacent cutting tracks 21, which can be understood as a safety area), a wafer 2 with a diameter of 200 mm can only be cut to obtain one chip substrate 11. At this time, there are still a large number of residual areas on the wafer 2 after cutting out the chip substrate 11, resulting in a large area of ​​wafer 2 being wasted, reducing the effective utilization rate of the wafer 2.

[0074] To this end, the embodiment of the present application provides a method for cutting a substrate on a wafer 2, which is applicable to the preparation of a sequencing chip, that is, cutting a sequencing chip substrate on a wafer 2. However, it can be understood that the method disclosed in the embodiment of the present application is not only applicable to sequencing chips, but can also be extended to other chips, especially other chips with an area of ​​not less than 10 cm 2 Preparation of the chip.

[0075] Combination Figure 2-6 , a method for cutting a substrate 3 on a wafer 2 comprises the following steps:

[0076] Step S1 : Based on the area of ​​the required substrate 3 and the area of ​​the wafer 2 , a cutting track 21 corresponding to the required substrate 3 is preset on the wafer 2 .

[0077] In this step, the cutting track 21 refers to the cutting path for cutting the substrate 3 from the wafer 2, and the cutting track 21 also constitutes the contour shape of the edges of all substrates 3 cut from the wafer 2. That is, by cutting along the cutting track 21, the substrate 3 can be separated from the wafer 2.

[0078] This embodiment can use existing drawing or modeling software to design a cutting track on the wafer 2. The embodiment of the present application does not specifically limit the drawing or modeling software used to design the cutting track 21. It can be understood that the step of designing the cutting track 21 can be performed when preparing the current substrate 3, that is, the cutting track 21 of the current substrate 3 is designed before the cutting operation; or the corresponding execution method can be saved when the cutting of the substrate 311 of the same specification is performed for the first time, and the previously saved execution method can be called in the step of cutting the substrate 3 of the same specification on the wafer 2 of the same specification in the future, and the existing cutting track 21 design scheme can be used.

[0079] In this step, a cutting track 21 can be set on the wafer 2 based on the area of ​​the required substrate 3 and the area of ​​the wafer 2, and one or more substrates 3 can be cut along the cutting track 21. It should be understood that the cutting track 21 can include one or more cutting track units, and cutting along each cutting track unit can correspond to a substrate 3. The number of cutting track units on the wafer 2 is determined based on the area of ​​the required substrate 3 and the area of ​​the wafer 2. In an effective embodiment, the number of cutting track units is the maximum number of substrates 3 that can be obtained within the effective area of ​​the wafer 2. In a possible embodiment, a cutting track unit corresponding to the edge shape of the substrate 3 is set on the wafer 2, and no matter how the cutting track unit is set, other areas outside the cutting track unit are not enough to form a second completely identical cutting track unit. In another possible embodiment, two cutting track units corresponding to the edge shape of the substrate 3 are set on the wafer 2, and no matter how the cutting track unit is set, other areas outside the two cutting track units are not enough to form a third completely identical cutting track unit. In another possible embodiment, n cutting track units corresponding to the edge shape of the substrate 3 are set on the wafer 2, and no matter how the cutting track units are set, other areas outside the n cutting track units are not sufficient to form the n+1th completely identical cutting track unit.

[0080] In one embodiment, Figure 3aAs shown, the cutting track 21 includes at least two mutually independent and closed cutting track units 211. In some embodiments, two cutting track units 211 are preset on the wafer 2, and the wafer 2 is located in an area outside the two cutting track units 211, which is not enough to set the third cutting track unit 211. In some embodiments, the cutting track 21 includes two cutting track units 211 of the same shape and area. In one embodiment, the two cutting track units 211 are symmetrical along at least one diameter of the wafer 2.

[0081] By way of example, taking the example of cutting a substrate 3 with a length of 153 mm and a width of 64 mm from a wafer 2 with a diameter of 200 mm, in an optional example, a closed cutting track unit 211 matching the edge size of the substrate 3 can be set, and by cutting along the cutting track 211, a substrate 3 of a desired size can be obtained.

[0082] In some embodiments, the cutting track unit 211 is a rectangular cutting track unit 211. In order to increase the number of cutting track units 211 while ensuring the yield of the substrate 3, that is, to increase the number of substrates obtained after cutting, the rectangular cutting track unit 211 is provided with one or more chamfers. Of course, this setting may also make it possible to obtain a substrate 3 by cutting a wafer 2 that is not originally sufficient to cut out a substrate, because the four corners of the rectangular cutting track unit 211 close to the edge of the wafer 1 are optimized.

[0083] In the embodiment of the present application, the chamfer at least includes one or more corners formed in the rectangular cutting track unit 211 and having the smallest distance from the edge of the wafer 2, that is, one or more corners in the rectangular cutting track unit 211 closest to the edge of the wafer 2 are set as chamfers. In the embodiment of the present application, this type of chamfer (the chamfer formed at the position where one or more corners in the rectangular cutting track unit 211 with the smallest distance from the edge of the wafer 2) is named the first chamfer 212, for example Figure 3a to Figure 3c It should be understood that the rectangular cutting track unit 211 may have only one corner with the smallest distance from the edge of the wafer 2, and the chamfer formed by the corner is the first chamfer 212. Figure 3bAs shown, when four rectangular substrates of the same specifications are formed on the surface of the wafer 2, and any two adjacent rectangular substrates are symmetrical images on the surface of the wafer, there is only one corner with the smallest distance between the cutting track unit 211 corresponding to the rectangular substrate and the edge of the wafer 2. At this time, the corner in the rectangular substrate is set to the first chamfer 212. Of course, the corner with the smallest distance between the rectangular cutting track unit 211 and the edge of the wafer 2 may also include two corners. At this time, the first chamfer 212 may be a chamfer formed by one of the corners, or may include a chamfer formed by two corners. Exemplarily, when two rectangular substrates of the same specifications are formed on the surface of the wafer 2, and the two rectangular substrates are symmetrical images on the surface of the wafer, there are two corners with the smallest distance between the rectangular cutting track unit 211 corresponding to the rectangular substrate and the edge of the wafer 2. At this time, one or both of the two corners may be set as chamfers, and the chamfer is the first chamfer 212, as shown in FIG. Figure 3b Of course, there is another situation. Figure 3c As shown, only a rectangular substrate is formed on the surface of the wafer 2. At this time, the distances between the four corners of the rectangular cutting track unit 211 corresponding to the rectangular substrate and the edge of the wafer are equal. One or more of the four corners can be set as chamfers, which are first chamfers 212. The rectangular substrate may have up to four first chamfers 212.

[0084] In the embodiments disclosed in the present application, the first chamfer 212 may be, but is not limited to, a chamfer and / or a rounded corner. A chamfer is sometimes referred to as a bevel; a rounded corner is sometimes referred to as a fillet or a rounded chamfer. Figure 4a-Figure 6 As shown, d 1 represents the minimum distance between the first chamfer 212 and the outer tangent line of the edge of the wafer 2. Figure 4a and Figure 4b In one embodiment, the first chamfer 212 is a chamfered angle. Figure 4a As shown, the chamfer uses a line segment to connect the endpoints of two adjacent sides of the rectangular substrate (e.g. Figure 4a The chamfer is formed at the middle point o to replace the original right angle formed by the extension of two adjacent sides. It should be understood that the number of line segments forming the chamfer can be one, or two or more. Figure 4b As shown, when there are multiple line segments forming the chamfer, the multiple line segments are sequentially connected to form a regular or irregular line, and the two ends of the regular or irregular line are respectively connected to the end points of two adjacent sides of the chamfered position in the rectangular substrate. In order to reduce the complexity of the cutting process of the substrate 3, and at the same time reduce the difficulty of processing other workpieces matching with the substrate 3 when the substrate 3 is used, such as Figure 4aAs shown, the line segment forming the chamfer is mostly one. When the first chamfer 212 is a chamfer, the minimum distance between the first chamfer 212 and the tangent line of the edge of the wafer 2 is the shortest distance from the first chamfer 212 to the edge of the wafer 2, which can also be understood as the minimum distance between the hypotenuse of the first chamfer 212 and the tangent line parallel to the edge of the wafer 2. Figure 5a and Figure 5b As shown, in another embodiment, the first chamfer 212 is a rounded corner, for example, as shown in FIG. 5 , the rounded corner uses an arc to connect the endpoints of two adjacent edges of the rectangular substrate (for example Figure 5a The chamfer is formed at point o in the figure to replace the right angle formed by the original two adjacent sides. It should be understood that the number of arcs forming the chamfer can be one, or two or more. When the arcs forming the chamfer include multiple arcs, for example Figure 5b As shown, multiple arcs are sequentially connected to form a regular or irregular curve, and the two ends of the regular or irregular curve are respectively connected to the end points of two adjacent sides of the chamfered position in the rectangular substrate. In order to reduce the complexity of the cutting process of the substrate 3, and at the same time reduce the difficulty of processing other workpieces that match the substrate 3 when the substrate 3 is used, such as Figure 5a When the first chamfer 212 is a rounded corner, the minimum distance between the first chamfer 212 and the tangent line of the edge of the wafer 2 is the distance from the end point of the rounded corner closest to the edge of the wafer 2 to the shortest straight line of the edge of the wafer 2, which can also be understood as the minimum distance between the end point of the rounded corner closest to the edge of the wafer 2 and the tangent line of the edge of the wafer 2.

[0085] Of course, it should be understood that in some embodiments, the first chamfer 212 may also contain line segments and circular arcs at the same time, that is, the line segments and circular arcs are sequentially connected in a certain order to form a regular or irregular curve, and the two ends of the regular or irregular curve are respectively connected to the endpoints of the two adjacent edges of the rectangular substrate 3 where the first chamfer 212 is located.

[0086] In this embodiment, if Figure 3a As shown, d 2 It should be understood that the minimum distance d between two adjacent cutting track units 211 is 2It refers to the minimum distance between adjacent substrates 3 during the cutting process when the cutting quality standard is met, provided that the size of the substrate 3 is fixed and the cutting process is operable. It can also be understood as the minimum distance between adjacent substrates 3 during the cutting process without being damaged by processing, provided that the cutting quality standard is met. The damage caused by the processing may include physical damage visible to the naked eye, such as cracks visible to the naked eye, and damage that requires identification with the aid of other equipment such as fiber equipment, such as microcracks, and other situations where the application of the substrate 3 is affected by the cutting and does not meet the requirements. In some embodiments, the above d 2 It can be understood that when cutting the substrate 3, there is a minimum distance between two adjacent cutting track units 211 that can keep the cut substrate 3 intact. Here, one understanding of keeping intact includes that the cut substrate 3 has no cracks visible to the naked eye.

[0087] In this embodiment, d 1 d 2 The following conditions must be met at the same time:

[0088] (a)d 2 >20μm;

[0089] (b)d 1 Not less than d 2 ;

[0090] (c) The minimum distance between the intersection of the extended lines of the two sides adjacent to the first chamfer 212 and the tangent line of the edge of the wafer 2 is less than d 2 , or the intersection is located outside the wafer 2.

[0091] The above condition (a) is used to obtain a safe distance between adjacent cutting tracks, so that during the wafer 2 cutting process, the cutting operation does not damage the cut substrate 3, so as to meet the substrate yield of the wafer 2 cut. The damage referred to is based on the quality standard that the cut substrate needs to meet. The quality standards of substrates with different requirements are different, and the degree of damage may be different. In the embodiment of the present application, the minimum distance d between two adjacent cutting track units 211 is 2 Including the width of the cutting path, overall, d 2 >20μm, to meet the minimum requirement for safe cutting at normal cutting levels.

[0092] In some embodiments, the thickness of the wafer is T, d 2 Satisfaction:d 2 >(20+0.0035T) μm. At this time, the minimum distance between two adjacent cutting track units is greater than the width of the cutting line, and a certain amount of reserve is provided on this basis, which can improve the yield of the cut substrate 3 to a certain extent.

[0093] In some embodiments, the thickness of the wafer 2 is T, the diameter is D, the length of the cutting track unit 211 is L, and the width is W. 2 Meets: (20+0.0035T) d 2 >(20+0.0035T)μm, which is beneficial to improving the cutting yield of substrate 3. On this basis, This is beneficial to releasing the area of ​​part of the wafer 2 and providing the possibility of increasing the number of substrates 3 .

[0094] For example, taking the case of cutting a substrate of 153 mm in length and 64 mm in width on a wafer 2 of 725 μm in thickness and 202 mm in diameter, the value range of d2 is 22.5 μm to 3890 μm. At this time, the distance between the cutting track 21 and the edge of the wafer 2 has a good safety distance, which can reduce the impact of the cutting on the quality of the substrate 3 and improve the product processing yield; at the same time, it can maximize the utilization area of ​​the wafer 2, and ultimately improve the effective utilization rate of the wafer 2. In some embodiments, d 2 The cutting quality is taken into consideration while maximizing the effective utilization of wafer 2.

[0095] In the embodiment of the present application, the setting of the first chamfer 212 needs to satisfy both condition (b) and condition (c).

[0096] According to the above condition (b), the minimum distance d between the first chamfer 212 and the outer tangent line of the edge of the wafer 2 is designed. 1 Greater than or equal to the minimum distance d between two adjacent cutting track units 211 2 , so that when the first chamfer 212 is cut along the cutting track unit 211 , the cutting quality at the location of the first chamfer 212 is taken into consideration, and the performance of the wafer 2 as a whole is consistent.

[0097] In some embodiments, d 1 The value range of d is 1.0~5.0mm. 1 The value of is within this range, which is beneficial to reduce the cutting quality risk of the first chamfer 212 during the wafer 2 cutting process. On this basis, it is beneficial to extend the cutting track unit 211 corresponding to the substrate 3 toward the edge of the wafer 2, thereby improving the effective utilization rate of the wafer 2. For example, d 1 The value of may be 1.0 mm, 1.2 mm, 1.5 mm, 2.0 mm, 2.2 mm, 2.5 mm, 3.0 mm, 3.5 mm, 4.0 mm, 4.5 mm, and 5.0 mm. In some embodiments, d 1The value range of is 1.5 to 5.0 mm, which further improves the cutting quality of the first chamfer 212.

[0098] The above condition (c) includes two situations. In the first situation, the intersection point of the extension lines of the two sides adjacent to the first chamfer 212 (such as Figure 4a or Figure 5a The intersection point P is located inside wafer 2, but the minimum distance between the intersection point p and the tangent line of the edge of wafer 2 is less than d 2 .

[0099] As a second case, the intersection of the extended lines of the two adjacent sides of the first chamfer 212 is located outside the wafer 2, that is, the intersection is not inside the wafer 2. Figure 6 As shown in point P.

[0100] This means that, for the situation satisfying the above condition (c), when the cutting track unit 211 includes four direct rectangular cutting units, the corresponding substrate 3 cannot be cut from the wafer 2 .

[0101] The embodiment of the present application is based on the above-mentioned condition (c). When the wafer is cut, one or more corners formed in the rectangular cutting track and with the smallest distance from the edge of the wafer are set as the first chamfer, and the above-mentioned conditions (a) and (b) are met at the same time. This allows the usable area of ​​the wafer 2 to extend as far as possible toward the outer edge of the wafer 2, thereby increasing the effective utilization area of ​​the wafer 2 and improving the effective utilization rate of the wafer 2.

[0102] For ease of understanding, the following is a diagrammatic illustration. Figure 3a , Figure 4a , Figure 5a and Figure 6 As shown, the area of ​​the wafer 2 is sufficient to ensure the second minimum spacing d between the two cutting tracks 21. 2 Under the premise of satisfying condition (a), if the cutting track without the first chamfer 212 is used for cutting, the distance between the corner of the substrate 3 and the edge of the wafer 2 is not less than the distance d 2 , which will damage the integrity of the substrate 3. In order to reduce this risk, it is necessary to reduce the distance from the edge of the cutting track unit 211 to the edge of the wafer 2. Since the length and width of the substrate 3 are fixed, when the first chamfer 212 is not set, if a larger substrate 3 needs to be cut, the number of substrates 3 cut on the wafer 2 can only be reduced, which greatly reduces the utilization efficiency of the wafer 2. The embodiment of the present application is different. By designing the corner of the cutting track 21 close to the edge of the wafer 2 as the first chamfer 212, when cutting the substrate 3, by setting the first chamfer 212 on the cutting track 21, the distance between the corner of the cutting track 21 and the edge of the wafer 2 can be increased, so that the distance d between the first chamfer 212 of the cutting track 21 and the edge of the wafer 2 is1 Greater than or equal to d 2 , so that the cutting requirements are met while the length and width of the substrate 3 remain unchanged, and two complete substrates 3 are cut out to maximize the use of the area of ​​the wafer 2. At this time, the space outside the wafer 2 is not enough to set a third cutting track 21 of the same area.

[0103] The following is an explanation with reference to a specific embodiment: when cutting substrates with a length of 153 mm and a width of 64 mm on a wafer 2 with a diameter of 200 mm, compared with the number of substrates 3 obtained by cutting along a rectangular cutting trajectory without chamfered corners, setting a cutting trajectory 21 that satisfies conditions (a), (b) and (c) can reduce the number of substrates 3 cut from the wafer 2 from one to two, thereby greatly improving the utilization rate of the wafer 2.

[0104] In some optional examples, such as Figure 3a As shown, the first chamfer 212 can be set at other corners of the cutting track 21 in addition to being set at the corners of the cutting track close to the edge of the wafer 2, so that each corner of the substrate 3 formed is a chamfer structure 111. Exemplarily, the shape of the cutting track 21 is a chamfered rectangle. Specifically, the cutting track 21 includes two parallel long sides and two parallel short sides, and the short sides are perpendicular to the long sides, wherein the two short sides are respectively located between the two long sides and at both ends of the long sides, and the chamfer structure 111 is formed between adjacent short sides and long sides to connect the adjacent short sides and long sides to form a closed figure, which is a chamfered rectangle. The substrate cut out of this is as shown in FIG. Figure 7 shown.

[0105] In the embodiments disclosed in the present application, in one implementation scenario, the first chamfer 212 is a chamfer, which is formed by connecting the endpoints of two adjacent sides of the rectangular cutting line with a line segment or a plurality of line segments connected in sequence. At this time, each line segment has a certain angle with the two adjacent sides of the cutting track unit 212. The embodiment of the present application refers to the angle as the angle of the chamfer, and the present application has no strict restrictions on the size of the angle. For example, Figure 4a As shown, when cutting the substrate 3, when the first chamfer 212 is a chamfer, the chamfer is formed by a line segment connecting the endpoints of two adjacent sides of the rectangular cutting line, and the angle formed by the chamfer and the first direction and the second direction is 45°, and its length is The first direction is the width direction of the formed substrate 3 , and the second direction is the length direction of the formed substrate 3 .

[0106] In another embodiment, the first chamfer 212 is a rounded corner, and the size of the rounded corner is represented by the diameter of the arc, which is the rounded corner diameter. For example, taking the length of the substrate 3 to be cut as 153 mm and the width as 64 mm, Figure 5a As shown, when the first chamfer 212 is a rounded corner, the diameter of the rounded corner is 0.5 mm. It should be understood that when the rounded corner includes multiple arcs, the diameter of the rounded corner can be understood as the diameter of the arc obtained by smoothing the curve formed by connecting multiple arcs or even line segments.

[0107] according to Figure 5a and Figure 6 As shown, compared with the chamfer, since the rounded corner is arc-shaped, the whole will still protrude toward the edge of the wafer 2, while the chamfer does not have a shape that protrudes toward the edge of the wafer 2, so the use of the chamfer can provide more gaps between the cutting track 21 and the edge of the wafer 2; at the same time, the chamfer occupies less space than the rounded corner, so the use of the chamfer in the first chamfer structure 212 is also more conducive to the subsequent installation and assembly process.

[0108] In one embodiment, the length of the cutting track unit 211 does not exceed 2.5 times the width of the cutting track unit 211, that is, it is ensured that the length of the prepared substrate 3 does not exceed 2.5 times the width. In this way, the difference between the length and width of the substrate 3 can be reduced, the risk of bending and deformation of the core substrate 3 during use can be reduced, and the flatness of the substrate 3, especially the flatness of the substrate 3 during use, can be improved. The substrate 3 obtained in this way is particularly suitable for chip substrates that need to be heated during use, such as biochip substrates. It should be understood that in this application, the "length" defined is the longest straight-line distance between the edges in the described structure, and the "width" defined in this application is the shortest straight-line distance between the edges in the described structure; taking the shape of the cutting track unit 211 as a chamfered rectangle as an example, the length of the cutting track unit 211 refers to the distance between the two short sides of the cutting track unit 211, and the width of the cutting track unit 211 refers to the distance between the two long sides of the cutting track unit 211.

[0109] Step S2: cutting is performed on the wafer 2 along the preset cutting track 21 , and then the area enclosed by the cutting track 21 is removed to obtain the substrate 3 .

[0110] In some embodiments, the substrate 3 prepared by the above method is used as the chip substrate 11. Figure 7As shown, one or more corners of the chip substrate 11 are chamfered structures 111. Compared with the right-angle structure, the chamfered structure 111 has a low stress concentration, which can increase the strength of the corners of the chip substrate 11 and reduce the risk of corner collapse to a certain extent. When the chip substrate 11 is clamped in a rectangular frame that matches the chip substrate 11, the risk of damage to the chip substrate 11 can be reduced, and the processing yield of the chip 100 can be improved. It should be understood that there is no strict limit to the number of chamfered structures 111 of the chip substrate 11. One corner of the chip substrate 11 can be set as a chamfered structure 111, two corners of the chip substrate 11 can be set as a chamfered structure 111, and three corners or all corners of the chip substrate 11 can also be set as chamfered structures 111. In some specific embodiments, the four corners of the chip substrate 11 are chamfered structures 111 to improve its machinability.

[0111] Cover glass 13

[0112] like Figure 1 As shown, the chip 100 includes a cover glass 13. In this case, the second sheet material is the cover glass 13. The shape of the cover glass 13 can be a square, a rectangle, a diamond, a circle, a triangle, and other regular shapes. Of course, the cover glass 13 can also be an irregular shape. In one embodiment, the cover glass 13 is a rectangle. In some embodiments, the shape of the cover glass 13 is the same as that of the chip substrate 11. In some embodiments, the cover glass 13 has the same shape as that of the chip substrate 11.

[0113] In some embodiments, the area of ​​the cover glass 13 is smaller than the area of ​​the chip substrate 11. As an example, Figure 1 As shown, at least in the first direction of the chip 100 , both ends of the cover glass 13 are retracted toward the middle area, so that both ends of the chip 100 in the first direction are left empty relative to the cover glass 13 .

[0114] In some embodiments, the thickness of the cover glass 13 is smaller than the thickness of the chip substrate 11 .

[0115] The cover glass 13 includes a first surface of the cover glass 13 and a second surface of the cover glass 13 facing each other, wherein the first surface of the cover glass 13 faces the chip substrate 11 , and the second surface of the cover glass 13 faces away from the first surface of the cover glass 13 .

[0116] In one embodiment, the chip 100 includes a cover glass 13, which is bonded to one surface of the chip substrate 11; in another embodiment, the chip 100 includes two cover glasses 13, which are respectively bonded to two surfaces of the chip substrate 11, that is, the upper and lower surfaces of the chip substrate 11 are respectively covered with the cover glasses 13.

[0117] The cover glass 13 can be made of glass, silicon dioxide, crystal, quartz glass, plastic, ceramic, PET (polyethylene terephthalate), PMMA (polymethyl methacrylate) or any other suitable material. It should be understood that at least one of the two sheets of chip substrate 11 and cover glass 13 is an optically transparent sheet.

[0118] In some embodiments, the chip substrate 11 and / or the cover glass 13 are made of glass. In this way, the chip substrate 11 and / or the cover glass 13 made of glass make the liquid more fluid, and the liquid is not easy to adhere to the inside of the chip 100, thereby improving the accuracy of the chip 100 detection. Specifically, glass is an amorphous inorganic non-metallic material, which is generally made of a variety of inorganic minerals such as quartz sand, borax, boric acid, barite, barium carbonate, limestone, feldspar, soda ash, etc. as the main raw materials, and a small amount of auxiliary raw materials are added. Its main components are silicon dioxide and other oxides.

[0119] Connection layer 12

[0120] See also Figure 1 In some embodiments, a connection layer 12 is provided between the first surface of the cover glass 13 and the chip substrate 11, for connecting the chip substrate 11 and the cover glass 13. At the same time, the connection layer 12 is provided with a flow channel 121, which can be used as a fluid reagent circulation and biochemical reaction site. In some embodiments, as Figure 1 As shown, a connection layer 12 with a partially hollowed-out area is provided between the cover glass 13 and the chip substrate 11, and the hollowed-out area forms a flow channel 121. In this way, the reaction in the chip 100 is ensured to proceed normally.

[0121] Specifically, the connection layer 12 is combined with at least one side surface of the chip substrate 11, so that the thickness direction of the connection layer 12 is perpendicular to the surface of the chip substrate 11. It should be understood that the connection layer 12 is combined with at least one side surface of the chip substrate 11, including two situations. Specifically, as the first situation: the connection layer 12 is combined with one surface of the chip substrate 11. At this time, the sample to be detected is fixed on the surface of the chip substrate 11 where the connection layer 12 is set. More specifically, the sample to be detected is fixed on the area of ​​the chip substrate 11 surface where the connection layer 12 is not combined. As the second situation: the connection layer 12 is combined with two opposite surfaces of the chip substrate 11. At this time, both surfaces of the chip substrate 11 where the connection layer 12 is set, specifically the area of ​​the chip substrate 11 where the connection layer 12 is not combined, can be combined with the sample to be detected. This method can sequence the upper and lower surfaces of a chip, and even sequence the two surfaces simultaneously, thereby increasing the sequencing throughput and sequencing efficiency.

[0122] In some embodiments, the area of ​​the connection layer 12 is smaller than the area of ​​the chip substrate 11. As an example, Figure 1As shown, at least in the first direction of the chip 100, the two ends of the connection layer 12 are retracted toward the middle area, so that the two ends of the chip substrate 11 in the first direction are left empty, that is, the two ends of the chip substrate 11 in the first direction are not combined with the connection layer 12. As an embodiment, the connection layer 12 has the same shape and size as the outer edge of the cover glass 13.

[0123] In some embodiments, the material of the connecting layer 12 may include at least one of epoxy resin in epoxy adhesive, acrylic resin in acrylate adhesive, OCA (Optically Clear Adhesive) optical adhesive, PSA (Pressure Sensitive Adhesive) pressure-sensitive adhesive, PI (Polyimide) double-sided adhesive, etc. As a result, the connecting layer 12 can be bonded to at least one side surface of the chip substrate 11 through its own bonding properties. Specifically, the connecting layer 12 can bond the chip substrate 11 and the cover glass 13. In this way, the chip substrate 11 and the cover glass 13 are connected by bonding, so that the chip substrate 11 is fixedly connected to the cover glass 13.

[0124] In some embodiments, the material of the connecting layer 12 may include other materials that form an adhesive layer on the surface, such as PE foam double-sided tape. At this time, the connecting layer 12 can be attached to at least one side surface of the chip substrate 11 by forming an adhesive layer on the surface. It should be understood that the adhesive layer formed on the surface can be set in the partial area where the connecting layer 12 is combined with the chip substrate 11, or the adhesive material can be set in all areas where the connecting layer 12 is combined with the chip substrate 11. In one embodiment, the adhesive material is set in all areas where the connecting layer 12 is combined with the chip substrate 11, which can reduce the risk of cross-talk of reaction reagents or solutions in different flow channels, thereby reducing the impact on the accuracy of the detection results. In addition, by fully bonding the connecting layer 12 to the chip substrate 11, the infiltration of reagents in unbonded areas can also be reduced, thereby reducing the loss of reagents.

[0125] In some embodiments, the chip 100 is a biochip. Figure 8 As shown, the connection layer 12 is provided with a flow channel 121 penetrating the connection layer 12 in the thickness direction, that is, the flow channel 121 penetrates the connection layer 12 along the thickness direction of the connection layer 12. In the embodiment of the present application, the flow channel 11 can have a regular shape, of course, it can also be an irregular shape. As an implementation scenario, taking the chip substrate 11 placed horizontally as an example, the connection layer 12 is attached to the surface of the chip substrate 11, and the flow channel 121 penetrates the upper and lower sides of the connection layer 12 and extends in the horizontal direction.

[0126] In some embodiments, Figure 8 and Fig. 9As shown, the flow channel 121 is extended along the first direction; and / or, the flow channel 121 is arranged in an array along the second direction. The first direction is perpendicular to the second direction, and both the first direction and the second direction are perpendicular to the thickness direction of the chip substrate 100. In this way, the general shape of the flow channel 121 formed in the chip 100 is standardized, which is conducive to controlling the fluid in the flow channel 121 and facilitating the positioning and imaging of these areas of the chip 100.

[0127] In one embodiment, the flow channels 121 are arranged in such a manner that they extend along a first direction of the chip 100 and are arranged in an array along a second direction of the chip 100. In particular, the arrangement of multiple flow channels 121 can make the sequencing process more efficient. At the same time, the arrangement of the array can make the intervals of the flow channels 121 uniform, so that the fluids such as reaction reagents pumped into the flow channels 121 are uniform. Fig. 9 As shown, the dimension of the flow channel 121 in the first direction is greater than its dimension in the second direction, the first direction is perpendicular to the second direction, and both the first direction and the second direction are perpendicular to the thickness direction of the sheet assembly 10 .

[0128] In some embodiments, the flow channel 121 includes a middle section 121b, a first end 121a, and a second end 121c, wherein the first end 121a and the second end 121c are respectively located at two ends of the flow channel 121, so that the first end 121a, the middle section 121b, and the second end 121c are sequentially arranged along the first direction of the chip substrate 11. The middle section 121b is used for providing sample solution and / or reagents for corresponding reactions; the first end 121a can be set as a liquid inlet area for providing sample solution and / or reagents to flow into the flow channel 121, and the second end 121c can be set as a liquid outlet area for providing sample solution and / or reagents to discharge from the flow channel 121. Of course, it should be understood that the positions of the first end 121a and the second end 121c can be interchanged. Therefore, the above-mentioned flow channel 121 can also be configured as follows: the second end 121c is a liquid inlet area for allowing sample solution and / or reagent to flow into the flow channel 121, and the first end 121a is a liquid outlet area for allowing sample solution and / or reagent to discharge from the flow channel 121.

[0129] In some embodiments, the size of the middle section 121b in the second direction is constant. That is, the length of the middle section 121b in the second direction is equal everywhere. Specifically, the middle section 121b is a long narrow rectangle, that is, the length of the middle section 121b in the second direction is equal everywhere, so it can be concluded that the size of the middle section 121b in the second direction is constant.

[0130] In the embodiment of the present application, the middle section 121b is used as a reaction area for biochemical reactions. Taking gene sequencing as an example, this area is the area where nucleic acid molecules undergo base extension reactions. This area is composed of a plurality of area units 122, and each area unit 122 corresponds to the size of the imaging field of view FOV of the optical camera during optical imaging. That is, when the middle section 121b is optically imaged, the middle section 121b is understood as an area composed of a plurality of area units 122 that are consistent with the preset field of view size according to the imaging area of ​​each imaging of the optical camera, such as Fig. 9 However, it should be understood that the preset field of view 122 is an area corresponding to the FOV of the optical camera, rather than a physical structure actually existing in the flow channel 121. It should be understood that Fig. 9 For the sake of convenience, the area unit 122 in the flow channel 121 is illustrated, but this does not represent the actual area proportion of the area unit 122 in the flow channel. In fact, the area proportion of the area unit 122 in the flow channel is much smaller than that shown in the figure.

[0131] In the embodiment disclosed in the present application, the length of the middle section 121b is an integer multiple of the length of a single area unit 122, that is, the length of the middle section 121b is an integer multiple of the length of a single FOV. Specifically, l' is the length of a single area unit 122 in the first direction, that is, the length corresponding to a single FOV, and the length l of the middle section 121b satisfies: Among them, N 1 Is a positive integer.

[0132] By designing the length of the middle section 121b of the flow channel 121, the middle section 121b is made as long as possible while meeting the usage requirements, and the length of the middle section 121b is made to be an integer multiple of the length of a single FOV, thereby ensuring that the FOV (or area unit 122) can cover the entire middle section 121b in the first direction of the middle section 121b, thereby avoiding waste of space.

[0133] Similarly, in order to avoid wasting space, in some embodiments, the width of the middle segment 121b in the second direction is also set to an integer multiple of the width of a single area unit 122, that is, the width w of the middle segment 121b satisfies: Wherein, w′ is the width of a single area unit 122, N 2 By designing the width of the middle section 121b of the flow channel 121 so that the width of the middle section 121b is exactly an integer multiple of the width of a single FOV (or area unit 122), it is ensured that when the optical camera performs line-by-line shooting along the second direction of the flow channel 121, each line can capture a complete and non-repetitive image, and waste of space can be avoided.

[0134] In some embodiments, a dimension of the first end 121 a in the second direction and / or a dimension of the second end 121 c in the second direction is smaller than a dimension of the middle section 121 b in the second direction.

[0135] In the embodiment of the present application, there is no strict limitation on the shapes of the first end 121a, the second end 121c and the middle section 121b. The shapes of the first end 121a and the second end 121c may be the same or different, as long as the first end 121a and the second end 121c are respectively located at the two ends of the middle section 121b, and the dimensions of the first end 121a and the second end 121c in the second direction are smaller than the dimensions of the middle section 121b in the second direction.

[0136] In one embodiment, the first end 121a and the second end 121c are symmetrically arranged at the two ends of the flow channel 121, and the first end 121a and the second end 121c have the same shape and are both triangular, and the middle section 121b is in the shape of a long narrow rectangle, which means that the dimensions of the first end 121a and the second end 121c in the second direction are smaller than the dimensions of the middle section 121b in the second direction.

[0137] In the embodiment disclosed in the present application, the first through hole 112 and the second through hole 113 of the chip substrate 11 are respectively connected to the end portions of the first end 121a and the second end 121c of the flow channel 121, so that the sample solution and / or reagent can enter from one end of the flow channel 121 and flow out from the other end. Specifically, the first through hole 112 is connected to the first end 121a of the flow channel 121, and the second through hole 113 is connected to the second end 121c of the flow channel 121.

[0138] In a specific example, Figure 8 As shown, taking the chip substrate 11 placed horizontally as an example, the first through hole 112 and the second through hole 113 pass through the upper and lower surfaces of the chip substrate 11; from the top view of the chip, as shown Fig. 9 As shown, the first through hole 112 is connected to the flow channel 121, and is connected to the first end 121a at an end away from the middle section 121b, and the second through hole 113 is connected to the flow channel 121, and is connected to the second end 121c at an end away from the middle section 121b. Thus, the first through hole 112 and the second through hole 113 are connected through the middle section 121b. At this time, when the chip 100 is used for gene sequencing, the sample solution and / or reagent is injected into the flow channel 121 through the first through hole 112, and then the sample solution and / or reagent will pass through the first end 121a, the middle section 121b and the second end 121c in sequence, and finally flow out through the second through hole 113.

[0139] In some embodiments, the width of the first end 121a gradually decreases along a direction away from the middle section 121b, and an end of the first end 121a away from the middle section 121b has a first angle α.

[0140] In a specific example, Fig. 9 As shown, from the top view of the chip assembly after the chip substrate 11 and the connecting layer 12 are combined, the distance between the two sides of the first end 121a gradually expands from the first through hole 112 toward the middle section 121b, and the angle formed by the first end 121a at the end away from the middle section 121b is the first angle α; similarly, the distance between the two sides of the second end 121c gradually expands from the second through hole 113 toward the middle section 121b, and the angle formed by the second end 121c at the end away from the middle section 121b is the second angle β. By forming the first angle α at the first end 121a, after the liquid enters from the first through hole 112, it can be evenly diffused through the fan-shaped area of ​​the first end 121a and enter the middle section 121b, thereby filling the entire reaction area 221b; by forming the second angle β at the second end 121c, it is beneficial for the sample solution and / or reagent to converge, thereby being discharged from the flow channel 121.

[0141] In some embodiments, the first angle α is 35° to 75°. For example, the first angle α can be 35°, 36°, 37°, 38°, 39°, 40°, 41°, 42°, 43°, 44°, 45°, 46°, 47°, 48°, 49°, 50°, 51°, 52°, 53°, 54°, 55°, 56°, 57°, 58°, 59°, 60°, 61°, 62°, 63°, 64°, 65°, 66°, 67°, 68°, 69°, 70°, 71°, 72°, 73°, 74°, 75°, and angles within the range of ±0.5° formed on this basis. In some embodiments, the first angle α is 65°±5°.

[0142] In some embodiments, the second angle β is 35 to 75°. For example, the second angle β can be 35°, 36°, 37°, 38°, 39°, 40°, 41°, 42°, 43°, 44°, 45°, 46°, 47°, 48°, 49°, 50°, 51°, 52°, 53°, 54°, 55°, 56°, 57°, 58°, 59°, 60°, 61°, 62°, 63°, 64°, 65°, 66°, 67°, 68°, 69°, 70°, 71°, 72°, 73°, 74°, 75°, and an angle within the range of ±0.5° formed on this basis. In some embodiments, the second angle β is 65°±5°.

[0143] In some examples of the above embodiments, see Fig. 9 As shown, L is the length of the chip substrate 11, l is the length of the middle section 121b, and w is the width of a single flow channel 121. It represents the distance between the middle section 121b of the flow channel 121 and the adjacent edge of the chip substrate 11 in the first direction. The length l of the middle section 121b satisfies the following conditions:

[0144] (1)

[0145] (2) Under the premise of satisfying condition (1), l takes the maximum value.

[0146] On the one hand, in the first direction, the distance between the middle section 121b of the flow channel 121 and the adjacent edge of the chip substrate 11 is not less than the width of a single flow channel 121. At this time, sufficient distance can be reserved on the connection layer 12 to set the area for the sample solution and / or reagent to diffuse into and converge and discharge, that is, the first end 121a and the second end 121c. On the other hand, under the premise of satisfying condition (1), l takes the maximum value, so that when the length of the chip substrate 11 is constant, the length l of the middle section 121b is maximized. At this time, when the chip 100 is used for sequencing, the FOV experienced by the optical camera when shooting sequentially in the first direction increases, thereby reducing the number of times the optical camera switches lines when optically imaging the middle section 121b per unit area, thereby reducing the time occupied by the optical camera due to line switching (the optical camera usually takes a long time to switch lines each time), saving sequencing time.

[0147] In some embodiments, in the second direction, the distance between the flow channel 121 adjacent to the outer edge of the chip substrate 11 and the outer edge of the chip substrate 11 is not less than 2.5 mm, that is, the distance between the two sides of the chip substrate 11 in the second direction and the edgemost flow channel 121 is not less than 2.5 mm, so as to ensure that the edge of the chip substrate 11 does not interfere with the detection. At the same time, there is a sufficient gap between the edge of the connecting layer 12 and the flow channel 121, which can prevent the sample solution and / or reagent from overflowing to the outside of the chip substrate 11 to a certain extent.

[0148] In addition, the experimenters found that the edge glue of the area located at the edge of the middle section 121b in the first direction is at risk of release, which may affect the biochemical reaction performance of the chip; in the process of optical imaging of the chip 100 after the sequencing reaction, the area located at the edge of the middle section 121b in the first direction is affected by the chip assembly tolerance, and the imaging acquisition may capture the glue edge, affecting the recognition of the sequencing results. In order to reduce the impact of the edge effect on the sequencing performance of the chip, a certain 121d edge space area should be reserved as a non-photographing area. Based on this, in some optional designs of the embodiments of the present application, such as Fig. 9As shown, the edge areas of the middle section 121b on both sides of the first direction are respectively set as blank areas 221d. The blank area 221d can be used as a non-reaction area by, for example, not setting a sample to be tested. Of course, it should be understood that the blank area 221d can also be used as a reaction area, but when the optical camera is used to perform optical imaging on the middle section 121b, the optical signal of the area is not collected. In some embodiments, the width of the blank area 221d is 1-0.5mm. At this time, the influence of the sequencing data generated by the blank area 221d on the sequencing results can be effectively reduced, and the sequencing accuracy can be improved; at the same time, it can prevent the blank area 221d from being too wide, which will reduce the waste of space in the reaction area and reduce the effective utilization rate of the middle section 121b. Exemplarily, the width of the blank area 221d can be 1mm, 0.95mm, 0.9mm, 0.85mm, 0.8mm, 0.75mm, 0.7mm, 0.65mm, 0.6mm, 0.55mm, 0.5mm, etc. Of course, the width of the blank area 221d can have a deviation within the range of ±20% based on the above specific circumstances.

[0149] In one embodiment, the interval between any two adjacent flow channels 121 in the first direction is not less than 1 mm. In this case, the risk of cross-flow between adjacent flow channels 121 can be reduced or even avoided. Moreover, for samples to be tested that require the use of optical signals to determine the reaction type, such as nucleic acid samples to be sequenced, by setting the interval between the flow channels 121 to be not less than 1 mm, the optical interference caused by adjacent flow channels 121 can be reduced when collecting optical signals in the flow channels 121, thereby improving the accuracy of optical detection.

[0150] In the embodiment of the present application, the number of the circulation 11 can be one or more. In some embodiments, the number of the flow channel 121 is multiple. In some embodiments, as Figure 8 and Fig. 9 As shown, at least four flow channels 121 are provided. For example, the flow channels 121 can be provided in four, five or six forms. Furthermore, there are four flow channels 121 in total. The four flow channels 121 are parallel to each other, and the spacing between any two adjacent flow channels 121 is the same. The provision of four flow channels 121 can achieve higher detection efficiency while meeting the flux requirements.

[0151] The present application further provides an embodiment of a chip substrate 11 and a flow channel 121 with specific parameters. In this embodiment, the width of the above-mentioned chip substrate 11 is 64±0.07mm and the length is 153±0.07mm. The length of the above-mentioned flow channel 121 is 135±0.05mm, and the width of the flow channel 121 is 11.8±0.07mm; the length of the middle section 121b is 117±0.07mm, and the width of the middle section 121b is 116-116.5mm; the spacing between any two adjacent flow channels 121 is 2.2mm.

[0152] See also Figure 1 As shown, it should be understood that the cover glass 13 covers the surface of the side of the connection layer 12 away from the chip substrate 11, and its purpose is to close the side of the flow channel 121 away from the chip substrate 11, that is, the top surface of the flow channel 121, and at the same time enable the liquid sample to form a uniform thickness, which is convenient for observation under a microscope. In some optional examples, the side of the cover glass 13 facing the flow channel 121 is provided with a flow channel groove corresponding to the flow channel 121. Through the setting of the flow channel groove, the thickness of the flow channel 121 can be increased to a certain extent. It can be understood that in the example where the chip substrate 11 is provided with a chamfered structure 111, when the cover glass 13 is combined with the chip substrate 11, the cover glass 13 also needs to be set to a chamfered structure 111 corresponding to the structure of the chip substrate 11, so that the cover glass 13 and the chip substrate 11 form a completely fitted whole when they are attached. For the convenience of description, in the following embodiments, the present application defines the whole composed of the chip substrate 11, the connection layer 12 and the cover glass 13 as the chip body 10.

[0153] Chip frame 14

[0154] like Figure 1 As shown, the chip 100 includes a chip frame 14, which is arranged on the side of the chip body 10 away from the chip substrate 11, so as to facilitate the placement and removal of the chip body 10 formed by the chip substrate 11, the connection layer 12 and the cover glass 13, and avoid leaving fingerprints or other residual fluids on the chip surface when directly contacting the chip body 10, which affects the collection of the optical signal generated in the chip 100. In addition, by setting the structure of the chip frame 14, the chip 100 can be fixed in a specific area of ​​the test instrument to detect the sample to be tested fixed in the chip 100. For example, the chip 100 is fixed on the surface of the chip carrier of the sequencing platform to achieve stable sequencing.

[0155] Specifically, Fig.10 and Fig.11As shown, the chip outer frame 14 is mainly composed of two head end pieces 141 and two connecting pieces 142. Among them, the two head end pieces 141 are arranged oppositely in the first direction of the chip outer frame 14; the two connecting pieces 142 are arranged oppositely in the second direction of the chip outer frame 14, and the two ends of the two head end pieces 141 are connected by two connecting pieces 142 respectively, so that the head end pieces 141 and the connecting pieces 142 are sequentially connected in the circumferential direction and closed to form a chip outer frame 14 with a hollow portion in the middle. Exemplarily, the overall top view of the chip outer frame 14 is roughly rectangular, and the head end pieces 141 and the connecting pieces 142 are enclosed to form the above-mentioned hollow portion in the middle, which is used for the light path to pass through, so that the optical camera can directly capture the chip body 10. Exemplarily, the hollow portion can be, but not limited to, circular, elliptical, diamond-shaped, etc. It can be understood that the above-mentioned hollow portion can be adaptively adjusted based on the structure of the chip substrate 11.

[0156] In an embodiment of the present application, the head end piece 141 and the connecting piece 142 are an integral structure, which can be prepared by one-piece processing and molding. For example, when the chip outer frame 14 is a plastic part, the chip outer frame 14 can be integrally molded by injection molding. When the chip outer frame 14 is a metal part, the chip outer frame 14 can be integrally molded by casting. It can be understood that the chip housing 14 can be processed by other one-piece molding methods; in an optional example, the head end piece 141 and the connecting piece 142 can also be obtained by separate processing and then assembled, and the present application does not make specific limitations on this.

[0157] like Fig.10 and Fig.11 As shown, the chip frame 14 has a first surface 14a and a second surface 14b opposite to each other. The first surface 14a and the second surface 14b are two side surfaces of the chip frame 14 in the thickness direction respectively. More specifically, the first surface 14a is the side facing the optical camera during sequencing, and the second surface 14b is the side used to fit with the chip supporting platform.

[0158] The connecting member 142 is relatively recessed in the head end member 141 on the first surface 14 a , and a first step structure 143 is formed at the connection between the connecting member 142 and the head end member 141 by the height difference between the connecting member 142 and the head end member 141 on the first surface.

[0159] Specific as Fig.10 As shown, the connecting member 142 is recessed relative to the head end member 141 on the first surface 14a. At this time, the thickness of the connecting member 142 is smaller than the thickness on the head end member 141, so that a first step structure 143 is formed at the connection between the connecting member 142 and the head end member 141.

[0160] like Fig.11 As shown, the lower surfaces of the connecting member 142 and the head end member 141 are flush with the second surface 14 b , and the two head end members 141 are recessed into the second surface 14 b at the ends close to each other to form a second step structure 144 .

[0161] Specifically, the head end pieces 141 on both sides form a recessed portion away from the second surface 14b at the portions close to each other, and the recess is defined as a second step structure 144. Fig.11 The directions shown are for exemplary purposes only. Fig.11 In the figure, the right part of the head end piece 141 on the left side and the left part of the head end piece 141 on the right side both have a part that is recessed toward the first surface 14a, and these two recessed parts are respectively defined as two second step structures 144. When the chip body 10 is installed, the two ends of the chip body 10 are respectively engaged and fixed on the inner side of the two second step structures 144. At the same time, in order to prevent the chip body 10 from being separated from the second step structure 144 in the second direction of the chip frame 14, the head end piece 141 is not recessed in the extension area of ​​the connecting piece 142.

[0162] In some embodiments, the second step structure 144 has a step surface 1441 parallel to the second surface 14b, and a step wall 1442 extending from the second surface 14b to the step surface 1441. The distance between the step surface 1441 and the second surface 14b is greater than or equal to the thickness of the connector 142, and the step wall 1442 is enclosed on the side of the step surface 1441 away from the hollow portion, and on both sides of the step surface 1441 in the second direction, so that the step wall 1442 forms a U-shaped structure with an opening facing the hollow portion. In one embodiment, the step surface 1441 is flush with the step surface of the first step structure 143; in another embodiment, the plane where the step surface 1441 is located is between the plane where the step surface of the first step structure 143 is located and the first surface 14a. Therefore, when the chip is used for sequencing, the side of the chip body 10 used to collect the fluorescent signal is not interfered by the connector 142, thereby effectively reducing the interference of the chip frame 14, especially the connector 142, on the optical signal generated by the chip body 10. Specifically, when an imaging device is used to collect signals from the edge area of ​​the chip body 10 close to the connector 142 , signal interference from the chip frame 14 , especially the connector 142 , to the edge area of ​​the chip body 10 close to the connector 142 can be reduced.

[0163] In the embodiment disclosed in the present application, the length of the chip substrate 11 in the first direction is greater than the length of the hollow portion in the first direction, and the length of the chip substrate 11 in the second direction is less than the length of the hollow portion in the second direction. Therefore, when the chip body 10 composed of the chip substrate 11, the connecting layer 12 and the cover glass 13 is assembled into the chip housing 14, the chip body 10 is loaded into the chip outer frame 14 via the second surface 14b, that is, the two ends of the chip body 10 are respectively fixed in the chip outer frame 14 through the second step structure 144. At this time, the chip body 10 is limited by the head end piece 141. In one embodiment, the thickness of the chip body 10 is less than or equal to the distance between the step surface 1441 and the second surface 14b, that is, the surface of the chip body 10 facing the second surface 14b is between the first surface 14a and the second surface 14b, or is flush with the second surface 14b. In one embodiment, the cover glass 13 faces the first surface 14a, and the chip substrate 11 faces the second surface 14b.

[0164] By setting the chip outer frame 14, since both ends of the chip body 10 are engaged in the second step structure 144, and the surface of the chip body 10 facing the first surface 14a is flush with the step surface 1441, and the surface facing the second surface 14b is between the first surface 14a and the second surface 14b, the chip body 10 can be stably fixed in the chip outer frame 14 and is not easy to detach from the chip outer frame 14.

[0165] In an optional embodiment, the step wall 1442 may be a step wall formed in a plane, and a certain angle is formed between the step wall 1442 and the step surface 1441, and the range of the angle may be selected between 0 and 180 degrees. In some embodiments, the angle between the step wall 1442 and the step surface 1441 is greater than or equal to 90 degrees. Exemplarily, the step wall 1442 is perpendicular to the step surface 1441, and an angle of 90 degrees is formed therebetween; or, the step wall 1442 is inclined relative to the step surface 1441, and an angle of more than 90 degrees is formed therebetween.

[0166] In an optional embodiment, the step wall 1442 is formed by connecting two or more wall surfaces in sequence. In one embodiment, the two or more wall surfaces may be planes or curved surfaces. When the two or more wall surfaces are planes, the angles between the multiple wall surfaces connected in sequence and the step surface 1441 gradually decrease or increase. When the two or more wall surfaces are curved surfaces, the multiple curved surfaces connected in sequence gradually move away from the head end portion 14 where they are located.

[0167] For example, Fig.12The cross-sectional view of the step wall 1442 in the thickness direction is shown. The step wall 1442 is formed by connecting the first step wall 1442a and the second step wall 1442b. The second step wall 1442b and the step surface 1441 are connected by the first step wall 1442a. That is, from top to bottom, the second step wall 1442b, the first step wall 1442a and the step surface 1441 are connected in sequence. Among them, the second step wall 1442b can be an inclined straight wall, and it can also be an arc-shaped wall with a certain curvature. Exemplarily, the first step wall 1442a is perpendicular to the step surface 1441, and the second step wall 1442b and the step surface 1441 have an angle greater than 90°.

[0168] In an optional embodiment, in order to better fix and install the chip body 10, the chip body 10 is usually placed in the second step structure 144 with a certain margin, but in order to prevent the chip body 10 from shaking in the second step structure 144, a limiting component is also provided in the second step structure 144, and the chip body 10 can be limited in the first direction and the second direction through the limiting component.

[0169] In specific implementation, Fig.11 and Fig.13 As shown, the above-mentioned limiting assembly includes a first limiting member 1443 and a second limiting member 1444. The first limiting member 1443 and the second limiting member 1444 can be protrudingly arranged on the step surface 1441 and / or the step wall 1442; Fig.11 and Fig.13 In the example, the first limiting member 1443 and the second limiting member 1444 are both fixed and protrude from the step wall 1442; wherein the first limiting member 1443 is used to limit the chip body 10 in the first direction, and the second limiting member 1444 is used to limit the chip body 10 in the second direction.

[0170] The first stopper 1443 and the second stopper 1444 may be provided in multiple groups. Fig.11 As shown, the above-mentioned first limiting members 1443 are respectively provided with two groups, wherein each second step structure 144 is provided with a group of first limiting members 1443, and the two groups of first limiting members 1443 are located on the side away from each other in the two second step structures 144 and are arranged opposite to each other, so that when the chip body 10 is placed, the two groups of first limiting members 1443 can engage and limit the two ends of the chip body 10; each second step structure 144 is respectively provided with two second limiting members 1444, and the two second limiting members 1444 are located in the second direction of the chip outer frame 14 and are arranged opposite to each other, so that when the chip body 10 is placed, the second limiting members 1444 located in the second step structure 144 can engage and limit the second direction of the chip body 10. Fig.13As shown, from the inside of a single second step structure 144, in the first direction of the chip outer frame 14, the first stopper 1443 is located on the side of the second stopper 1444 away from the connecting member 142; in the second direction of the chip outer frame 14, at least two second stoppers 1444 are provided and are respectively provided on both sides of the second step structure 144, and in the second direction of the chip outer frame 14, the first stopper 1443 is located between the second stoppers 1444. In a specific implementation, the first stopper 1443 and the second stopper 1444 need to avoid the chamfered structure 111 of the chip substrate 11, that is, when the chip substrate 11 is fixed by the first stopper 1443 and the second stopper 1444, the first stopper 1443 and the second stopper 1444 will not contact the chamfered structure 111 of the chip substrate 11.

[0171] On the basis of the above, the first limit piece 1443 and the second limit piece 1444 both protrude from the first step wall 1442a; further, the lengths of the first limit piece 1443 and the second limit piece 1444 protruding from the first step wall 1442a are the same; in addition, considering that if the distance between the adjacent first limit piece 1443 and the second limit piece 1444 exceeding the first step wall 1442a is too narrow, it will be inconvenient for processing and limiting. If the distance exceeding the first step wall 1442a is designed to be too wide, the overall external dimensions of the chip frame 14 will be increased, resulting in waste of space and materials, etc. Therefore, further, the length of the first limit piece 1443 and the second limit piece 1444 protruding from the inner side of the first step wall 1442a is 0.3mm to 1mm.

[0172] In some optional embodiments, such as Fig.13 As shown, the present application defines the three step walls 1442 surrounding the second step surface 1441 as a transverse wall 14422, a chamfered wall 14423 and a longitudinal wall 14421, wherein the longitudinal wall 14421 extends along the second direction of the chip outer frame 14, and is arranged on the side of the step surface 1441 away from the hollow portion in the first direction of the chip outer frame 14; the above-mentioned transverse wall 14422 extends along the first direction of the chip outer frame 14, and two transverse walls 14422 are provided and are located on opposite sides of the chip outer frame 14 in the second direction, and the above-mentioned transverse walls 14422 are perpendicular to the longitudinal wall 14421, and the transverse wall 14422 and the longitudinal wall 14421 are connected by the chamfered wall 14423.

[0173] To explain more clearly, Fig.13, the step wall 1442 located in the middle of the second step structure 144 is the longitudinal wall 14421, the step walls 1442 located on the left and right sides of the second step structure 144 are the transverse walls 14422, and the corners connecting the longitudinal wall 14421 and the transverse wall 14422 are the chamfered walls 14423. Correspondingly, the chamfered walls 14423 are located between the adjacent first stopper 1443 and the second stopper 1444 in the same second step structure 144. By providing the chamfered walls 14423, the chamfered structure 111 of the chip substrate 11 can be prevented from contacting with the step wall 1442 of the second step structure 144, thereby preventing the chamfered structure 111 of the chip substrate 11 from being damaged.

[0174] It can be understood that the above-mentioned longitudinal wall 14421, transverse wall 14422 and chamfered wall 14423 are the circumferential components of the step wall 1442, while the first step wall 1442a and the second step wall 1442b are the components of the step wall 1442 in the thickness direction. The above-mentioned two embodiments can exist simultaneously or separately, and the present application does not limit this.

[0175] In some optional embodiments, the head end piece 141 is further provided with a first hole 145; illustratively, the first hole 145 can be used as a positioning hole, that is, when the chip frame 14 is placed on the sequencing platform, it is used to cooperate with the positioning column on the sequencing platform to ensure that the chip can be accurately placed on the sequencing platform. Fig.10 , Fig.11 and Fig.14 As shown, two first holes 145 are provided and are respectively opened on the two head end pieces 141. The first holes 145 are located on the central axis of the first direction of the chip outer frame 14. By setting symmetrical first holes 145 on the central axis of the first direction of the chip outer frame 14 of the two head end pieces 141, the chip outer frame 14 can be positioned more accurately.

[0176] In some optional embodiments, any head end piece 141 is further provided with a second hole 146. For example, the second hole 146 is used to prevent the chip frame 14 from being placed upside down when the chip frame 14 is placed on the sequencing platform, for example Fig.14 In the example, the second hole 146 can be arranged on a head end piece and located on one side of the first hole 145. When the chip is placed on the sequencing platform, if the chip is flipped, the fool-proof hole cannot cooperate with the corresponding fool-proof piece, making it difficult to load into the sequencing platform. In some other examples, the second hole 146 can also be arranged on the two head end pieces 141 in an asymmetric manner. At this time, when the chip is flipped, the asymmetric second hole 146 can also hinder the chip from fitting with the sequencing platform.

[0177] In some optional embodiments, see Fig.10 , Fig.11 and Fig.14 As shown, in order to facilitate the transplantation of the chip outer frame 14, a plurality of slots are also provided on the chip outer frame 14, and the plurality of slots are symmetrically arranged on both sides of each head end piece 141 in the second direction of the chip outer frame 14, and the slots are used for being grasped by the transplanting robot. Specifically, the slots include guide slots 147 and adjustment slots 148 based on the parts required to cooperate with the robot; illustratively, the guide slots 147 are symmetrically arranged in the second direction and opened on any head end piece 141; the adjustment slots 148 are symmetrically arranged in the second direction and opened on the other head end piece 141. In a specific embodiment, the width of the above-mentioned guide slot 147 gradually decreases from the edge of the head end piece 141 toward the inner side of the head end piece 141, that is, the guide slot 147 as a whole presents a triangular structure. When the above-mentioned guide slot 147 cooperates with the robot, the robot can guide and clamp the chip frame 14 by grabbing the guide slot 147; the width of the above-mentioned adjustment slot 148 remains consistent from the edge of the head end piece 141 toward the inner side of the head end piece 141, and the adjustment slot 148 presents a rectangular structure as a whole. When the adjustment slot 148 cooperates with the robot, the robot can clamp and adjust the balance of the chip frame 14 by grabbing the adjustment slot 148.

[0178] Gasket 15

[0179] In some embodiments, Figure 1 As shown, the chip 100 further includes a pad 15. Figure 1 and Fig.15 As shown, the gasket 15 is attached to the side of the chip substrate 11 away from the connecting layer 12. For example, the upper surface of the gasket 15 is a relatively flat plane structure. The gasket 15 is adhered to the second adhesive 17 (for example, the second adhesive 17 can be but not limited to double-sided adhesive, AB adhesive, etc.) on its upper surface. The gasket 15 is adhered to the lower surface of the chip substrate 11 through the second adhesive 17. The gasket 15 is used to dock with the sequencing platform. In order to facilitate the injection of sample liquid into the flow channel 121, the gasket 15 is also provided with a drainage hole 151 corresponding to and connected to the first end 121a and the second end 121c. Figure 1 and Fig.15As shown, the above-mentioned gasket 15 is provided with two, wherein the upper end of the drainage hole 151 in the right gasket 15 is connected with the lower end of the first through hole 112, and the lower end of the drainage hole 151 in the gasket 15 is used for the sample solution and / or reagent to flow in; the upper end of the drainage hole 151 in the left gasket 15 is connected with the lower end of the second through hole 113, and the lower end of the drainage hole 151 in the gasket 15 is used for the sample solution and / or reagent to flow out. When in use, the sample solution and / or reagent will sequentially pass through the right drainage hole 151, the first through hole 112, the first end 121a, the middle section 121b, the second end 121c, the second through hole 113 and the left drainage hole 151.

[0180] Further, such as Fig.15 As shown, a convex portion 152 corresponding to the drainage hole 151 is provided on one side of the gasket 15 away from the chip substrate 11, and the convex portion 152 surrounds the outer side of the corresponding drainage hole 151. The convex portion 152 protrudes from the above-mentioned chip substrate 11 and is used to seal the gap between the drainage hole 151 and the sequencing platform, so as to prevent the sample solution and / or reagent from leaking through the gap between the drainage hole 151 and the sequencing platform during liquid flow. The convex portion 152 can be a sealing member with a certain elasticity, such as a rubber sealing ring, a silicone sealing ring, etc. In addition, when the gasket 15 is made of the same material as the above-mentioned gasket 15, the above-mentioned convex portion 152 can also be formed by integral molding with the gasket 15.

[0181] At both ends of the chip 100 in the first direction, a first adhesive 16 is disposed between the chip substrate 11 and the chip frame 14, and the first adhesive 16 is used to bond the chip substrate 11 and the chip frame 14. Exemplarily, the first adhesive 16 can be a viscous material such as water-based adhesive or double-sided adhesive tape.

[0182] The above specific examples are used to illustrate the present invention, which is only used to help understand the present invention and is not intended to limit the present invention. For those skilled in the art, according to the concept of the present invention, some simple deductions, modifications or substitutions can be made.

Claims

1. A chip, characterized in that: include: Chip substrate; A connection layer is attached to a side surface of the chip substrate, a flow channel is provided on the connection layer and passes through the connection layer in a thickness direction, the flow channel has a middle section, a first end and a second end, the first end and the second end are respectively arranged at two ends of the middle section in a first direction of the chip, The length of the middle segment is the maximum value when the following formula is satisfied: Wherein, L is the length of the chip substrate, l is the length of the middle section, and w is the width of a single flow channel.

2. The chip according to claim 1, characterized in that: The length of the chip substrate is no more than 2.5 times the width of the chip substrate.

3. The chip according to claim 1, characterized in that: In the second direction, the distance between the flow channel adjacent to the outer edge of the chip substrate and the outer edge of the chip substrate is not less than 2.5 mm.

4. The chip according to any one of claims 1 to 3, characterized in that: The flow channel also has a blank area, and the blank area is located on both sides of the middle section in the second direction; Optionally, the width of the blank area is 1-0.5 mm.

5. The chip according to any one of claims 1 to 3, characterized in that: The interval between any two adjacent flow channels in the second direction is not less than 1 mm; Optionally, the chip substrate is provided with a first through hole and a second through hole penetrating the chip substrate in the thickness direction; the first through hole is connected to the first end at one end close to the connection layer, and the second through hole is connected to the second end at one end close to the connection layer; the first through hole is connected to the second through hole through the middle section; Optionally, the first end has a first angle on both sides of the first end in the second direction, and the distance between the two sides of the first end in the second direction gradually decreases as it moves away from the middle section; Optionally, the first angle is 35 to 75°; Optionally, the first angle is 65°±5°.

6. The chip according to any one of claims 1 to 3, characterized in that: The second end has a second angle on both sides in the second direction, and the distance between the two sides in the second direction gradually decreases as it moves away from the middle section; Optionally, the second angle is 35 to 75°; Optionally, the second angle is 65°±5°.

7. The chip according to any one of claims 1 to 6, characterized in that: The middle section has a plurality of preset fields of view, and the length of the middle section is an integer multiple of the length of a single preset field of view; Optionally, the width of the middle section is an integer multiple of the width of a single preset field of view; Optionally, the outer edges of the chip substrate are enclosed to form a chamfered rectangle.

8. The chip according to any one of claims 1 to 7, characterized in that: The flow channels are provided with at least four; Optionally, the width of the chip substrate is 64±0.07mm and the length is 153±0.07mm, the length of the flow channel is 135±0.05mm, and the width of the flow channel is 11.8±0.07mm; the length of the middle section is 117±0.07mm, and the width of the middle section is 116-116.5mm; the spacing between any two adjacent flow channels is 2.2mm.

9. The chip according to any one of claims 1 to 8, characterized in that: Also includes: A cover glass, the cover glass covering a surface of the connection layer away from the chip substrate; and / or A chip frame, the chip frame being arranged outside the chip substrate and the cover glass to fix the chip and the cover glass; and / or A gasket is attached to a side of the chip substrate away from the connection layer, and the gasket is provided with drainage holes corresponding to and communicating with the first end and the second end in a one-to-one manner.

10. The chip according to claim 9, characterized in that: The side of the gasket facing the chip substrate is a planar structure; and / or The gasket is provided with a convex portion corresponding to the drainage holes one by one on a side away from the chip substrate, and the convex portion is arranged around the outer side of the corresponding drainage hole; Optionally, the chip frame includes: two head end pieces, the two head end pieces are arranged opposite to each other in a first direction of the chip frame; Two connecting pieces arranged in parallel, the two ends of the two head end pieces are connected respectively by the two connecting pieces; The chip frame has a first surface and a second surface opposite to each other, the connecting member is relatively recessed in the head end member on the first surface, and a first step structure is formed at the connection between the connecting member and the head end member; The two head end pieces are recessed at one end close to each other to form a second step structure, and the head end pieces are not recessed in the extension area of ​​the connecting piece; the second step structure has a step wall and a step surface parallel to the second surface, and the depth of the step surface is greater than the thickness of the connecting piece; Two ends of the chip substrate in the first direction are engaged in the two second step structures, and the height of the chip substrate at the first surface is between the connecting member and the head end member.

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